mirror of https://github.com/PCSX2/pcsx2.git
fixed some possible allocation problems... Fixes rockstar games that were broken in the last revisions..
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@163 a6443dda-0b58-4228-96e9-037be469359c
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@ -3668,16 +3668,13 @@ PCSX2_ALIGNED16(u64 DIV_TEMP_XMM[2]);
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void recVUMI_DIV(VURegs *VU, int info)
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{
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int t1reg, t1boolean, vftemp;
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int t1reg, t1boolean;
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u8* pjmp, * pjmp1;
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u32* pjmp2, * pjmp32;
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//SysPrintf("VU DIV Opcode \n");
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AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags
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vftemp = ALLOCTEMPX86(MODE_8BITREG);
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if (vftemp < 0) {SysPrintf("VU: SQRT allocation error!!!\n"); vftemp = EAX;}
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t1reg = _vuGetTempXMMreg(info);
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if( t1reg < 0 ) {
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for (t1reg = 0; ( (t1reg == EEREC_TEMP) || (t1reg == EEREC_S)|| (t1reg == EEREC_T) ); t1reg++)
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@ -3691,16 +3688,16 @@ void recVUMI_DIV(VURegs *VU, int info)
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SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // Clear EEREC_TEMP
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SSE_CMPEQSS_XMM_to_XMM(EEREC_TEMP, EEREC_T); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32( vftemp, EEREC_TEMP); // Move the sign bits of the previous calculation
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SSE_MOVMSKPS_XMM_to_R32( EAX, EEREC_TEMP); // Move the sign bits of the previous calculation
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AND32ItoR( vftemp, (1<<_Ftf_) ); // Grab "Is Zero" bits from the previous calculation
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AND32ItoR( EAX, (1<<_Ftf_) ); // Grab "Is Zero" bits from the previous calculation
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pjmp32 = JZ32(0); // Skip if none are
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SSE_XORPS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP); // Clear EEREC_TEMP
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SSE_CMPEQSS_XMM_to_XMM(EEREC_TEMP, EEREC_S); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(vftemp, EEREC_TEMP); // Move the sign bits of the previous calculation
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SSE_MOVMSKPS_XMM_to_R32(EAX, EEREC_TEMP); // Move the sign bits of the previous calculation
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AND32ItoR( vftemp, (1<<_Fsf_) ); // Grab "Is Zero" bits from the previous calculation
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AND32ItoR( EAX, (1<<_Fsf_) ); // Grab "Is Zero" bits from the previous calculation
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pjmp = JZ8(0);
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OR32ItoM( VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410 ); // Set invalid flag (0/0)
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pjmp1 = JMP8(0);
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@ -3740,8 +3737,6 @@ void recVUMI_DIV(VURegs *VU, int info)
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if (t1boolean) SSE_MOVAPS_M128_to_XMM( t1reg, (uptr)&DIV_TEMP_XMM[0] ); // restore t1reg data
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else _freeXMMreg(t1reg); // free t1reg
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_freeX86reg(vftemp); // free vftemp
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}
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void recVUMI_SQRT( VURegs *VU, int info )
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@ -3756,17 +3751,12 @@ void recVUMI_SQRT( VURegs *VU, int info )
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AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags
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if (CHECK_VU_EXTRA_FLAGS) {
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vftemp = ALLOCTEMPX86(MODE_8BITREG);
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if (vftemp < 0) {SysPrintf("VU: SQRT allocation error!!!\n"); vftemp = EAX;}
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/* Check for negative divide */
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SSE_MOVMSKPS_XMM_to_R32(vftemp, EEREC_TEMP);
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SSE_MOVMSKPS_XMM_to_R32(EAX, EEREC_TEMP);
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AND32ItoR(vftemp, 1); //Check sign
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pjmp = JZ8(0); //Skip if none are
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OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); //Invalid Flag - Negative number sqrt
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x86SetJ8(pjmp);
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_freeX86reg(vftemp);
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}
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SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (u32)const_clip); //Do a cardinal sqrt
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@ -3783,7 +3773,7 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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{
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u8* ajmp8;
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u32* ajmp32, * bjmp32;
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int t1reg, vftemp;
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int t1reg;
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if( _Ftf_ ) _unpackVFSS_xyzw(EEREC_TEMP, EEREC_T, _Ftf_);
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else SSE_MOVSS_XMM_to_XMM(EEREC_TEMP, EEREC_T);
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@ -3791,12 +3781,9 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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AND32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0xFCF); // Clear D/I flags
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if (CHECK_VU_EXTRA_FLAGS) {
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vftemp = ALLOCTEMPX86(MODE_8BITREG);
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if (vftemp < 0) { SysPrintf("VU: RSQRT allocation error!!!\n"); vftemp = EAX; }
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/* Check for negative divide */
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SSE_MOVMSKPS_XMM_to_R32(vftemp, EEREC_TEMP);
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AND32ItoR(vftemp, 1); //Check sign
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SSE_MOVMSKPS_XMM_to_R32(EAX, EEREC_TEMP);
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AND32ItoR(EAX, 1); //Check sign
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ajmp8 = JZ8(0); //Skip if none are
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OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x410); //Invalid Flag - Negative number sqrt
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x86SetJ8(ajmp8);
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@ -3818,9 +3805,9 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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SSE_CMPEQSS_XMM_to_XMM(t1reg, EEREC_TEMP); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(vftemp, t1reg); // Move the sign bits of the previous calculation
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation
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AND32ItoR( vftemp, 0x01 ); // Grab "Is Zero" bits from the previous calculation
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AND32ItoR( EAX, 0x01 ); // Grab "Is Zero" bits from the previous calculation
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ajmp32 = JZ32(0); // Skip if none are
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OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820); // Zero divide flag
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@ -3838,10 +3825,7 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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vuFloat2(t1reg, t1reg, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), t1reg);
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if (CHECK_VU_EXTRA_FLAGS) {
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x86SetJ32(bjmp32);
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_freeX86reg(vftemp);
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}
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if (CHECK_VU_EXTRA_FLAGS) x86SetJ32(bjmp32);
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_freeXMMreg(t1reg);
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}
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@ -3855,12 +3839,11 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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if (CHECK_VU_EXTRA_FLAGS) {
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// Ft can still be zero here! so we need to check if its zero and set the correct flag.
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SSE_XORPS_XMM_to_XMM(t1reg, t1reg); // Clear t1reg
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//XOR32RtoR(vftemp, vftemp);
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SSE_CMPEQSS_XMM_to_XMM(t1reg, EEREC_TEMP); // Set all F's if each vector is zero
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SSE_MOVMSKPS_XMM_to_R32(vftemp, t1reg); // Move the sign bits of the previous calculation
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SSE_MOVMSKPS_XMM_to_R32(EAX, t1reg); // Move the sign bits of the previous calculation
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AND32ItoR( vftemp, 0x01 ); // Grab "Is Zero" bits from the previous calculation
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AND32ItoR( EAX, 0x01 ); // Grab "Is Zero" bits from the previous calculation
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ajmp32 = JZ32(0); // Skip if none are
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OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820); // Zero divide flag
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@ -3879,10 +3862,7 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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vuFloat2(t1reg, t1reg, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), t1reg);
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if (CHECK_VU_EXTRA_FLAGS) {
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x86SetJ32(bjmp32);
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_freeX86reg(vftemp);
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}
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if (CHECK_VU_EXTRA_FLAGS) x86SetJ32(bjmp32);
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SSE_MOVAPS_M128_to_XMM( t1reg, (uptr)&RSQRT_TEMP_XMM[0] ); // restore t1reg data
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}
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