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A few small lower opcode fixes/optimizations; Also aligned text in Speedhacks dialog to show correctly on my PC :p 

git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@20 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
cottonvibes 2008-08-14 04:43:36 +00:00 committed by Gregory Hainaut
parent 954323ea80
commit a946596554
3 changed files with 15 additions and 17 deletions
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2
pcsx2/windows/WinMain.c
View File

@ -738,7 +738,7 @@ BOOL APIENTRY HacksProc(HWND hDlg, UINT message, WPARAM wParam, LPARAM lParam) {
Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_OVERFLOWHACK_EXTRA) ? 0x40 : 0;
Config.Hacks |= IsDlgButtonChecked(hDlg, IDC_FASTBRANCHES) ? 0x80 : 0;
SaveConfig();
SaveConfig();
EndDialog(hDlg, TRUE);
} else

12
pcsx2/windows/pcsx2.rc
View File

@ -950,20 +950,20 @@ BEGIN
CONTROL "Disable All Overflow Checks - Doesn't check for overflow at all in the VU Recs.",IDC_OVERFLOWHACK,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,63,373,10
CTEXT "These hacks will effect the speed of PCSX2 but possibly comprimise on compatability",IDC_HACKDESC,7,7,391,8
CONTROL "Tighter SPU2 Sync ( FFXII vids) - slower, not usefull anymore",IDC_SOUNDHACK,
CONTROL "Tighter SPU2 Sync ( FFXII vids) - Slower, not useful anymore.",IDC_SOUNDHACK,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,197,323,10
CONTROL "IOP Sync Hack (x2) - Doubles the cycle rate of the IOP.",IDC_SYNCHACK2,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,128,270,10
CONTROL "EE/IOP Sync Hack (x3) - Makes EE and IOP hacks triple the cycle rate (not recommended)",IDC_SYNCHACK3,
CONTROL "EE/IOP Sync Hack (x3) - Makes EE and IOP hacks triple the cycle rate ( Not Recommended! )",IDC_SYNCHACK3,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,142,359,10
CONTROL "Disable Extra Overflow Checks - Disables extra overflow checks used to help stop SPS.",IDC_OVERFLOWHACK_EXTRA,
CONTROL "Disable Extra Overflow Checks - Disables extra overflow checks used to help stop SPS. ( Big Speedup! )",IDC_OVERFLOWHACK_EXTRA,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,50,377,10
CONTROL "EE/IOP Fast Branches - Quick branching (very small speedup, use only when you need every fps)",IDC_FASTBRANCHES,
CONTROL "EE/IOP Fast Branches - Quick branching ( Very small speedup, use only when you need every fps! )",IDC_FASTBRANCHES,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,183,351,10
CTEXT "If you have problems, disable all these and try again",IDC_STATIC,7,22,391,8
GROUPBOX "Overflow and Underflow",IDC_STATIC,7,36,391,60
CONTROL "Denormals are Zero - Makes very small numbers equal zero. (Big speedup on Intel CPUs) (Restart the emu!)",IDC_DENORMALS,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,76,364,10
CONTROL "Denormals are Zero - Makes very small numbers equal zero. ( Big speedup on Intel CPUs ) ( Needs Restart! )",IDC_DENORMALS,
"Button",BS_AUTOCHECKBOX | WS_TABSTOP,14,76,377,10
GROUPBOX "Sync Hacks",IDC_STATIC,7,101,391,59
GROUPBOX "Miscellaneous",IDC_STATIC,7,168,391,46
END

18
pcsx2/x86/iVUmicro.c
View File

@ -3851,6 +3851,7 @@ void recVUMI_SQRT( VURegs *VU, int info )
SSE_MAXSS_M32_to_XMM(EEREC_TEMP, (uptr)&g_minvals[0]);
SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)&g_maxvals[0]);
vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP);
_freeX86reg(vftemp);
@ -3964,11 +3965,7 @@ void recVUMI_RSQRT(VURegs *VU, int info)
}
}
//if( CHECK_OVERFLOW ) {
SSE_MAXSS_M32_to_XMM(EEREC_TEMP, (uptr)&g_minvals[0]);
SSE_MINSS_M32_to_XMM(EEREC_TEMP, (uptr)&g_maxvals[0]);
//}
vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP);
_freeX86reg(vftemp);
@ -3989,7 +3986,7 @@ void _addISIMMtoIT(VURegs *VU, s16 imm, int info)
fsreg = ALLOCVI(_Fs_, MODE_READ);
ftreg = ALLOCVI(_Ft_, MODE_WRITE);
if (ftreg == fsreg) {
if ( _Ft_ == _Fs_ ) {
if (imm != 0 ) {
ADD16ItoR(ftreg, imm);
}
@ -4009,13 +4006,14 @@ void recVUMI_IADDI(VURegs *VU, int info)
if ( _Ft_ == 0 ) return;
imm = ( VU->code >> 6 ) & 0x1f;
imm = ( imm & 0x10 ? 0xfff0 : 0) | ( imm & 0xf );
imm = ( imm & 0x10 ? 0xfff0 : 0) | ( imm & 0xf ); // This is one's complement
//imm = ( imm & 0x10 ) ? ( ( ~( imm & 0xf ) ) + 1 ) : ( imm ); // This is two's complement
_addISIMMtoIT(VU, imm, info);
}
void recVUMI_IADDIU(VURegs *VU, int info)
{
int imm;
s16 imm;
if ( _Ft_ == 0 ) return;
@ -4057,7 +4055,7 @@ void recVUMI_IADD( VURegs *VU, int info )
}
}
else {
ADD_VI_NEEDED(_Ft_);
//ADD_VI_NEEDED(_Ft_);
fsreg = ALLOCVI(_Fs_, MODE_READ);
ftreg = ALLOCVI(_Ft_, MODE_READ);
@ -4200,7 +4198,7 @@ void recVUMI_ISUBIU( VURegs *VU, int info )
imm = ( ( VU->code >> 10 ) & 0x7800 ) | ( VU->code & 0x7ff );
imm = -imm;
_addISIMMtoIT(VU, (u32)imm & 0xffff, info);
_addISIMMtoIT(VU, imm, info);
}
void recVUMI_MOVE( VURegs *VU, int info )