mirror of https://github.com/PCSX2/pcsx2.git
SPU2ghz: Third try's the charm? This is an even better yet fix for the crackling sound in SO3. Note: This revision upgrades spu2ghz savestates to 0x101. Old states should still load fine for the most part.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@682 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
Jake.Stine
Gregory Hainaut
parent
ef489b45bd
commit
a92fc9900f
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@ -220,27 +220,6 @@ void DoDMAWrite(int core,u16 *pMem,u32 size)
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Cores[core].TSA &= 0xfffff;
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u32 buff1end = Cores[core].TSA + size;
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// Pcm Cache Invalidation!
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// Ideally we would only mask bits actually written to, but it's a complex algorithm
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// that is way more work than it's worth. Masking out bytes would in theory work a
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// little more effiently, but was buggy in practice for some reason. So a dumb and
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// dirty 32-bit mask will suffice.
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// Note: When clearing cache flags, the *endpoint* needs to be rounded upward.
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// just rounding the count upward could cause problems if both start and end
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// points are mis-aligned.
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// indexer scalar - 8 addresses per block, and 32 bits per dword:
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const u32 indexer_scalar = 8*32;
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const int roundUp = indexer_scalar-1;
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const int flagTSA = Cores[core].TSA / indexer_scalar;
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int flagTDA = (buff1end + roundUp) / indexer_scalar; // endpoint, rounded up
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u8* cache = (u8*)pcm_cache_flags;
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memset( &pcm_cache_flags[flagTSA], 0, (flagTDA - flagTSA) * 4 );
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u32 buff2end=0;
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if( buff1end > 0x100000 )
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{
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@ -248,6 +227,60 @@ void DoDMAWrite(int core,u16 *pMem,u32 size)
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buff1end = 0x100000;
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}
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const int cacheIdxStart = Cores[core].TSA / pcm_WordsPerBlock;
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const int cacheIdxEnd = (buff1end+pcm_WordsPerBlock-1) / pcm_WordsPerBlock;
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PcmCacheEntry* cacheLine = &pcm_cache_data[cacheIdxStart];
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PcmCacheEntry& cacheEnd = pcm_cache_data[cacheIdxEnd];
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do
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{
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cacheLine->Validated = false;
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cacheLine++;
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} while ( cacheLine != &cacheEnd );
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#if 0
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// Pcm Cache Invalidation!
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// It's a requirement that we mask bits for the blocks that are written to *only*,
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// because doing anything else can cause the cache to fail, thanks to the progressive
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// nature of the SPU2's ADPCM encoding. (the same thing that makes it impossible
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// to use SSE optimizations on it).
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u8* cache = (u8*)pcm_cache_flags;
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// Step 1: Clear bits in the front remainder.
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const int pcmTSA = Cores[core].TSA / pcm_WordsPerBlock;
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const int pcmTDA = buff1end / pcm_WordsPerBlock;
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const int remFront = pcmTSA & 31;
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const int remBack = ((buff1end+pcm_WordsPerBlock-1)/pcm_WordsPerBlock) & 31; // round up to get the end remainder
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int flagTSA = pcmTSA / 32;
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if( remFront )
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{
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// need to clear some upper bits of this u32
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uint mask = (1ul<<remFront)-1;
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cache[flagTSA++] &= mask;
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}
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// Step 2: Clear the middle run
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const int flagClearLen = pcmTDA-pcmTSA;
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memset( &cache[flagTSA], 0, flagClearLen );
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// Step 3: Clear bits in the end remainder.
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if( remBack )
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{
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// need to clear some lower bits in this u32
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uint mask = ~(1ul<<remBack)-1;
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cache[flagTSA + flagClearLen] &= mask;
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}
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#endif
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//ConLog( " * SPU2 : Cache Clear Range! TSA=0x%x, TDA=0x%x (low8=0x%x, high8=0x%x, len=0x%x)\n",
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// Cores[core].TSA, buff1end, flagTSA, flagTDA, clearLen );
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// First Branch needs cleared:
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// It starts at TSA and goes to buff1end.
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@ -128,7 +128,7 @@ static void __forceinline XA_decode_block(s16* buffer, const s16* block, s32& pr
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pcm = data>>shift;
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pcm+=((pred1*prev1)+(pred2*prev2))>>6;
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if(pcm> 32767) pcm= 32767;
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if(pcm<-32768) pcm=-32768;
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else if(pcm<-32768) pcm=-32768;
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*(buffer++) = pcm;
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}
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@ -140,7 +140,7 @@ static void __forceinline XA_decode_block(s16* buffer, const s16* block, s32& pr
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pcm2 = data>>shift;
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pcm2+=((pred1*pcm)+(pred2*prev1))>>6;
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if(pcm2> 32767) pcm2= 32767;
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if(pcm2<-32768) pcm2=-32768;
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else if(pcm2<-32768) pcm2=-32768;
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*(buffer++) = pcm2;
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}
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@ -203,9 +203,10 @@ static void __forceinline IncrementNextA( const V_Core& thiscore, V_Voice& vc )
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vc.NextA&=0xFFFFF;
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}
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u32 *pcm_cache_flags = NULL;
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s16 *pcm_cache_data = NULL;
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// decoded pcm data, used to cache the decoded data so that it needn't be decoded
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// multiple times. Cache chunks are decoded when the mixer requests the blocks, and
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// invalided when DMA transfers and memory writes are performed.
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PcmCacheEntry *pcm_cache_data = NULL;
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#ifndef PUBLIC
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int g_counter_cache_hits=0;
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@ -249,16 +250,20 @@ static void __forceinline __fastcall GetNextDataBuffered( V_Core& thiscore, V_Vo
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s16* memptr = GetMemPtr(vc.NextA&0xFFFFF);
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vc.LoopFlags = *memptr >> 8; // grab loop flags from the upper byte.
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int nexta = vc.NextA / 8; // 8 words per encoded block.
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vc.SBuffer = &pcm_cache_data[nexta * 28];
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const u32 flagbitmask = 1ul<<(nexta & 31); // 32 flags per array entry
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nexta /= 32;
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const int cacheIdx = vc.NextA / pcm_WordsPerBlock;
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PcmCacheEntry& cacheLine = pcm_cache_data[cacheIdx];
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vc.SBuffer = cacheLine.Sampledata;
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if( pcm_cache_flags[nexta] & flagbitmask )
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if( cacheLine.Validated )
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{
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// Cached block! Read from the cache directly (ie, do nothing)
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// Cached block! Read from the cache directly.
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// Make sure to propagate the prev1/prev2 ADPCM:
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vc.Prev1 = vc.SBuffer[27];
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vc.Prev2 = vc.SBuffer[26];
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//ConLog( " * SPU2 : Cache Hit! NextA=0x%x, cacheIdx=0x%x\n", vc.NextA, cacheIdx );
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#ifndef PUBLIC
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g_counter_cache_hits++;
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@ -267,19 +272,20 @@ static void __forceinline __fastcall GetNextDataBuffered( V_Core& thiscore, V_Vo
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else
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{
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// Only flag the cache if it's a non-dynamic memory range.
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if( nexta >= (SPU2_DYN_MEMLINE / (8*32)) )
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pcm_cache_flags[nexta] |= flagbitmask;
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if( vc.NextA >= SPU2_DYN_MEMLINE )
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cacheLine.Validated = true;
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#ifndef PUBLIC
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if( nexta < (SPU2_DYN_MEMLINE / (8*32)) )
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if( vc.NextA < SPU2_DYN_MEMLINE )
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g_counter_cache_ignores++;
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else
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g_counter_cache_misses++;
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#endif
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// saturated decoder
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s16* sbuffer = cacheLine.Sampledata;
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XA_decode_block(vc.SBuffer, memptr, vc.Prev1, vc.Prev2);
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// saturated decoder
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XA_decode_block( sbuffer, memptr, vc.Prev1, vc.Prev2 );
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// [Air]: Testing use of a new unsaturated decoder. (benchmark needed)
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// Chances are the saturation isn't needed, but for a very few exception games.
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@ -288,7 +294,6 @@ static void __forceinline __fastcall GetNextDataBuffered( V_Core& thiscore, V_Vo
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// heavy use of the SPU2 via music or sfx will mostly use the cache anyway.
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//XA_decode_block_unsaturated( vc.SBuffer, memptr, vc.Prev1, vc.Prev2 );
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}
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vc.SCurrent = 0;
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@ -1173,8 +1178,8 @@ void __fastcall Mix()
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}
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// Commit Core 0 output to ram before mixing Core 1:
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ExtL>>=13;
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ExtR>>=13;
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ExtL>>=14;
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ExtR>>=14;
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spu2M_WriteFast( 0x800 + OutPos, ExtL>>3 );
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spu2M_WriteFast( 0xA00 + OutPos, ExtR>>3 );
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@ -226,11 +226,10 @@ __inline void __fastcall spu2M_Write( u32 addr, s16 value )
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addr &= 0xfffff;
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if( addr >= SPU2_DYN_MEMLINE )
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{
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const u32 nexta = addr >> 3; // 8 words per encoded block.
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const u32 flagbitmask = 1ul<<(nexta & 31); // 31 flags per array entry
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pcm_cache_flags[nexta/32] &= ~flagbitmask;
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const int cacheIdx = addr / pcm_WordsPerBlock;
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pcm_cache_data[cacheIdx].Validated = false;
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ConLog( " * SPU2 : PcmCache Block Clear at 0x%x (idx=0x%x, bit=%d)\n", addr, nexta, nexta & 31);
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ConLog( " * SPU2 : PcmCache Block Clear at 0x%x (cacheIdx=0x%x)\n", addr, cacheIdx);
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}
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*GetMemPtr( addr ) = value;
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}
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@ -327,11 +326,6 @@ void CoreReset(int c)
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extern void LowPassFilterInit();
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// number of cachable ADPCM blocks (any blocks above the SPU2_DYN_MEMLINE)
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static const int pcm_BlockCount = 0x100000 / 8; // (0x100000-SPU2_DYN_MEMLINE) / 8;
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static const int pcm_DecodedSamplesPerBlock = 28;
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EXPORT_C_(s32) SPU2init()
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{
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#define MAKESURE(a,b) \
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@ -374,11 +368,10 @@ EXPORT_C_(s32) SPU2init()
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// Expanded: 16 bytes expands to 56 bytes [3.5:1 ratio]
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// Resulting in 2MB * 3.5.
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pcm_cache_flags = (u32*)calloc( pcm_BlockCount / 32, sizeof(u32) );
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pcm_cache_data = (s16*)calloc( pcm_BlockCount * pcm_DecodedSamplesPerBlock, sizeof(s16) );
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pcm_cache_data = (PcmCacheEntry*)calloc( pcm_BlockCount, sizeof(PcmCacheEntry) );
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if( (spu2regs == NULL) || (_spu2mem == NULL) ||
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(pcm_cache_data == NULL) || (pcm_cache_flags == NULL) )
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(pcm_cache_data == NULL) )
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{
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SysMessage("SPU2: Error allocating Memory\n"); return -1;
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}
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@ -543,12 +536,10 @@ EXPORT_C_(void) SPU2shutdown()
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SAFE_FREE(spu2regs);
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SAFE_FREE(_spu2mem);
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SAFE_FREE( pcm_cache_flags );
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SAFE_FREE( pcm_cache_data );
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spu2regs = NULL;
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_spu2mem = NULL;
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pcm_cache_flags = NULL;
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pcm_cache_data = NULL;
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#ifdef SPU2_LOG
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@ -1705,12 +1696,6 @@ EXPORT_C_(u16) SPU2read(u32 rmem)
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return ret;
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}
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struct cacheFreezeData
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{
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u32 flags[pcm_BlockCount/32];
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s16 startData;
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};
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typedef struct
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{
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// compatibility with zerospu2 removed...
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@ -1734,7 +1719,7 @@ typedef struct
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int lClocks;
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cacheFreezeData cacheData;
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PcmCacheEntry cacheData;
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} SPU2freezeData;
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@ -1747,7 +1732,7 @@ typedef struct
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// Increment this if changes to V_Core or V_Voice structs are made.
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// Chances are we'll never explicitly support older save versions,
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// but might as well version them anyway. Could come in handly someday!
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#define SAVE_VERSION 0x0100
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#define SAVE_VERSION 0x0101
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static int getFreezeSize()
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{
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@ -1759,9 +1744,8 @@ static int getFreezeSize()
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for( int bidx=0; bidx<pcm_BlockCount; bidx++ )
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{
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const u32 flagmask = 1ul << (bidx & 31);
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if( pcm_cache_flags[bidx/32] & flagmask )
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size += pcm_DecodedSamplesPerBlock*sizeof(s16);
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if( pcm_cache_data[bidx].Validated )
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size += pcm_DecodedSamplesPerBlock*sizeof(PcmCacheEntry);
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}
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return size;
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}
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@ -1769,17 +1753,19 @@ static int getFreezeSize()
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static void wipe_the_cache()
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{
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memset( pcm_cache_flags, 0, pcm_BlockCount/32 * sizeof(u32) );
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memset( pcm_cache_data, 0, pcm_BlockCount * pcm_DecodedSamplesPerBlock * sizeof(s16) );
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memset( pcm_cache_data, 0, pcm_BlockCount * sizeof(PcmCacheEntry) );
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}
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static s16 old_state_sBuffer[pcm_DecodedSamplesPerBlock] = {0};
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EXPORT_C_(s32) SPU2freeze(int mode, freezeData *data)
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{
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if (mode == FREEZE_LOAD)
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{
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const SPU2freezeData *spud = (SPU2freezeData*)data->data;
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if( spud->id != SAVE_ID || spud->version != SAVE_VERSION )
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if( spud->id != SAVE_ID || spud->version < 0x100 )
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{
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printf("\n*** SPU2Ghz Warning:\n");
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printf(" The savestate you are trying to load was not made with this plugin.\n");
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@ -1826,36 +1812,51 @@ EXPORT_C_(s32) SPU2freeze(int mode, freezeData *data)
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// Load the ADPCM cache:
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const cacheFreezeData &cfd = spud->cacheData;
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const s16* pcmSrc = &cfd.startData;
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memcpy( pcm_cache_flags, cfd.flags, (pcm_BlockCount/32) * sizeof(u32) );
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int blksLoaded=0;
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for( int bidx=0; bidx<pcm_BlockCount; bidx++ )
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wipe_the_cache();
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if( spud->version == 0x100 ) // don't support 0x100 cache anymore.
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{
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const u32 flagmask = 1ul << (bidx & 31);
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if( cfd.flags[bidx/32] & flagmask )
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printf("\n*** SPU2Ghz Warning:\n");
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printf("\tSavestate version is from an older version of this plugin.\n");
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printf("\tAudio may not recover correctly.");
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const PcmCacheEntry* pcmSrc = &spud->cacheData;
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int blksLoaded=0;
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for( int bidx=0; bidx<pcm_BlockCount; bidx++ )
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{
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// load a cache block!
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memcpy( &pcm_cache_data[bidx*pcm_DecodedSamplesPerBlock],
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pcmSrc, pcm_DecodedSamplesPerBlock*sizeof(s16) );
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pcmSrc += pcm_DecodedSamplesPerBlock;
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blksLoaded++;
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if( pcm_cache_data[bidx].Validated )
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{
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// load a cache block!
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memcpy( &pcm_cache_data[bidx], pcmSrc, sizeof(PcmCacheEntry) );
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pcmSrc++;
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blksLoaded++;
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}
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}
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// Go through the V_Voice structs and recalculate SBuffer pointer from
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// the NextA setting.
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for( int c=0; c<2; c++ )
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{
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for( int v=0; v<24; v++ )
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{
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const int cacheIdx = Cores[c].Voices[v].NextA / pcm_WordsPerBlock;
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Cores[c].Voices[v].SBuffer = pcm_cache_data[cacheIdx].Sampledata;
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}
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}
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}
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else
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{
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// We don't support the cache, so make sure the SBuffer pointers
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// are safe (don't want any GPFs reading bad data)
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for( int c=0; c<2; c++ )
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{
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for( int v=0; v<24; v++ )
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Cores[c].Voices[v].SBuffer = old_state_sBuffer;
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}
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}
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// Go through the V_Voice structs and replace the SBuffer pointer
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// with an absolute address into our cache buffer this session.
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for( int c=0; c<2; c++ )
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{
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for( int v=0; v<24; v++ )
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{
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Cores[c].Voices[v].SBuffer = (s16*) ((uptr)spud->Cores[c].Voices[v].SBuffer + (uptr)pcm_cache_data );
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}
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}
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//printf( " * SPU2 > FreezeLoad > Loaded %d cache blocks.\n", blksLoaded++ );
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}
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@ -1905,36 +1906,20 @@ EXPORT_C_(s32) SPU2freeze(int mode, freezeData *data)
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// decoded blocks currently in use by active voices. This allows
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// voices to resume seamlessly on load.
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cacheFreezeData &cfd = spud->cacheData;
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s16* pcmDst = &cfd.startData;
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memcpy( cfd.flags, pcm_cache_flags, sizeof(cfd.flags) );
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PcmCacheEntry* pcmDst = &spud->cacheData;
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int blksSaved=0;
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for( int bidx=0; bidx<pcm_BlockCount; bidx++ )
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{
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const u32 flagmask = 1ul << (bidx & 31);
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if( cfd.flags[bidx/32] & flagmask )
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if( pcm_cache_data[bidx].Validated )
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{
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// save a cache block!
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memcpy( pcmDst, &pcm_cache_data[bidx*pcm_DecodedSamplesPerBlock],
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pcm_DecodedSamplesPerBlock*sizeof(s16) );
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pcmDst += pcm_DecodedSamplesPerBlock;
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||||
memcpy( pcmDst, &pcm_cache_data[bidx], sizeof(PcmCacheEntry) );
|
||||
pcmDst++;
|
||||
blksSaved++;
|
||||
}
|
||||
}
|
||||
|
||||
// Time to go through the V_Voice structs and replace the SBuffer pointer
|
||||
// with a relative address that can be applied later on when the state is loaded.
|
||||
|
||||
for( int c=0; c<2; c++ )
|
||||
{
|
||||
for( int v=0; v<24; v++ )
|
||||
{
|
||||
spud->Cores[c].Voices[v].SBuffer =
|
||||
(s16*) ((uptr)spud->Cores[c].Voices[v].SBuffer - (uptr)pcm_cache_data );
|
||||
}
|
||||
}
|
||||
//printf( " * SPU2 > FreezeSave > Saved %d cache blocks.\n", blksSaved++ );
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -138,22 +138,35 @@ default: \
|
|||
# define SAFE_RELEASE(p) { if(p) { (p)->Release(); (p)=NULL; } }
|
||||
#endif
|
||||
|
||||
// The SPU2 has a dynamic memory range which is used for several internal operations, such as
|
||||
// registers, CORE 1/2 mixing, AutoDMAs, and some other fancy stuff. We exclude this range
|
||||
// from the cache here:
|
||||
static const s32 SPU2_DYN_MEMLINE = 0x2800;
|
||||
|
||||
// 8 short words per encoded PCM block. (as stored in SPU2 ram)
|
||||
static const int pcm_WordsPerBlock = 8;
|
||||
|
||||
// number of cachable ADPCM blocks (any blocks above the SPU2_DYN_MEMLINE)
|
||||
static const int pcm_BlockCount = 0x100000 / pcm_WordsPerBlock;
|
||||
|
||||
// 28 samples per decoded PCM block (as stored in our cache)
|
||||
static const int pcm_DecodedSamplesPerBlock = 28;
|
||||
|
||||
struct PcmCacheEntry
|
||||
{
|
||||
bool Validated;
|
||||
s16 Sampledata[pcm_DecodedSamplesPerBlock];
|
||||
};
|
||||
|
||||
extern void spdif_set51(u32 is_5_1_out);
|
||||
extern u32 spdif_init();
|
||||
extern void spdif_shutdown();
|
||||
extern void spdif_get_samples(s32 *samples); // fills the buffer with [l,r,c,lfe,sl,sr] if using 5.1 output, or [l,r] if using stereo
|
||||
|
||||
// The SPU2 has a dynamic memory range which is used for several internal operations, such as
|
||||
// registers, CORE 1/2 mixing, AutoDMAs, and some other fancy stuff. We exclude this range
|
||||
// from the cache here:
|
||||
static const s32 SPU2_DYN_MEMLINE = 0x2800;
|
||||
|
||||
extern short *spu2regs;
|
||||
extern short *_spu2mem;
|
||||
|
||||
extern u32 *pcm_cache_flags;
|
||||
extern s16 *pcm_cache_data;
|
||||
extern PcmCacheEntry* pcm_cache_data;
|
||||
|
||||
extern s16 __forceinline * __fastcall GetMemPtr(u32 addr);
|
||||
extern s16 __forceinline __fastcall spu2M_Read( u32 addr );
|
||||
|
|
|
|||
Loading…
Reference in New Issue