mirror of https://github.com/PCSX2/pcsx2.git
Slightly pedantic change to OPH clearing and added a condition to an FQC assignment statement (there are far too many of these) which I think would interfere with reversed VIF1 operation.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2974 96395faa-99c1-11dd-bbfe-3dabce05a288
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96b1935c5f
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a8b7c03845
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@ -73,15 +73,11 @@ void __fastcall ReadFIFO_page_5(u32 mem, u64 *out)
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{
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{
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GetMTGS().WaitGS();
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GetMTGS().WaitGS();
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GSreadFIFO(&psHu64(VIF1_FIFO));
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GSreadFIFO(&psHu64(VIF1_FIFO));
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}
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vif1.GSLastDownloadSize--;
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if(vif1Regs->stat.FQC > 0)
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if (vif1.GSLastDownloadSize <= 16)
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{
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gifRegs->stat.OPH = false;
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--vif1.GSLastDownloadSize;
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vif1Regs->stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
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vif1Regs->stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
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}
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}
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if(vif1Regs->stat.FQC == 0) //We're out of data now so clear this..
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gifRegs->stat.OPH = false;
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}
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}
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out[0] = psHu64(VIF1_FIFO);
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out[0] = psHu64(VIF1_FIFO);
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@ -197,7 +197,7 @@ void GIFdma()
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}
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}
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clearFIFOstuff(true);
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clearFIFOstuff(true);
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
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//Path2 gets priority in intermittent mode
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//Path2 gets priority in intermittent mode
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if (GSTransferStatus.PTH1 != STOPPED_MODE || GSTransferStatus.PTH2 != STOPPED_MODE)
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if (GSTransferStatus.PTH1 != STOPPED_MODE || GSTransferStatus.PTH2 != STOPPED_MODE)
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@ -218,7 +218,7 @@ void GIFdma()
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if ((gif->chcr.MOD == CHAIN_MODE) && gif->chcr.STR)
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if ((gif->chcr.MOD == CHAIN_MODE) && gif->chcr.STR)
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{
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{
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ptag = ReadTag();
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ptag = ReadTag();
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
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if (ptag == NULL) return;
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if (ptag == NULL) return;
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GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx tadr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr, gif->tadr);
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GIF_LOG("PTH3 MASK gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx tadr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr, gif->tadr);
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@ -234,7 +234,7 @@ void GIFdma()
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if (gif->qwc == 0) CPU_INT(DMAC_GIF, 16);
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if (gif->qwc == 0) CPU_INT(DMAC_GIF, 16);
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return;
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return;
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}
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}
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
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//Check with Path3 masking games
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//Check with Path3 masking games
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if (gif->qwc > 0) {
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if (gif->qwc > 0) {
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GIF_LOG("PTH3 MASK Transferring");
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GIF_LOG("PTH3 MASK Transferring");
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@ -253,7 +253,7 @@ void GIFdma()
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{
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{
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Console.WriteLn("DMA Stall Control on GIF normal");
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Console.WriteLn("DMA Stall Control on GIF normal");
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}
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}
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
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//Check with Path3 masking games
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//Check with Path3 masking games
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if (gif->qwc > 0) {
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if (gif->qwc > 0) {
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GIFchain(); //Transfers the data set by the switch
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GIFchain(); //Transfers the data set by the switch
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@ -271,7 +271,7 @@ void GIFdma()
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ptag = ReadTag();
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ptag = ReadTag();
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if (ptag == NULL) return;
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if (ptag == NULL) return;
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GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx tadr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr, gif->tadr);
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GIF_LOG("gifdmaChain %8.8x_%8.8x size=%d, id=%d, addr=%lx tadr=%lx", ptag[1]._u32, ptag[0]._u32, gif->qwc, ptag->ID, gif->madr, gif->tadr);
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
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if (dmacRegs->ctrl.STD == STD_GIF)
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if (dmacRegs->ctrl.STD == STD_GIF)
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{
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{
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// there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall
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// there are still bugs, need to also check if gif->madr +16*qwc >= stadr, if not, stall
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@ -312,7 +312,7 @@ void GIFdma()
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CPU_INT(DMAC_GIF, gscycles * BIAS);
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CPU_INT(DMAC_GIF, gscycles * BIAS);
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gscycles = 0;
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gscycles = 0;
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}
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}
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // OPH=1 | APATH=3]
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gifRegs->stat.FQC = min((u16)0x10, gif->qwc);// FQC=31, hack ;) (for values of 31 that equal 16) [ used to be 0xE00; // APATH=3]
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}
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}
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void dmaGIF()
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void dmaGIF()
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@ -589,7 +589,7 @@ void gifMFIFOInterrupt()
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gspath3done = false;
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gspath3done = false;
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gscycles = 0;
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gscycles = 0;
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gifRegs->stat.clear_flags(GIF_STAT_APATH3 | GIF_STAT_P3Q | GIF_STAT_FQC); // OPH, APATH, P3Q, FQC = 0
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gifRegs->stat.clear_flags(GIF_STAT_APATH3 | GIF_STAT_P3Q | GIF_STAT_FQC); // APATH, P3Q, FQC = 0
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vif1Regs->stat.VGW = false;
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vif1Regs->stat.VGW = false;
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gif->chcr.STR = false;
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gif->chcr.STR = false;
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@ -107,14 +107,18 @@ void vif1TransferToMemory()
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g_vifCycles += vif1ch->qwc * 2;
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g_vifCycles += vif1ch->qwc * 2;
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vif1ch->madr += vif1ch->qwc * 16; // mgs3 scene changes
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vif1ch->madr += vif1ch->qwc * 16; // mgs3 scene changes
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if(vif1.GSLastDownloadSize > vif1ch->qwc)
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if(vif1.GSLastDownloadSize >= vif1ch->qwc)
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{
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{
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vif1.GSLastDownloadSize -= vif1ch->qwc;
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vif1.GSLastDownloadSize -= vif1ch->qwc;
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vif1Regs->stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
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vif1Regs->stat.FQC = min((u32)16, vif1.GSLastDownloadSize);
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if (vif1.GSLastDownloadSize <= 16)
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gifRegs->stat.OPH = false;
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}
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}
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else
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else
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{
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{
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vif1Regs->stat.FQC = 0;
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vif1Regs->stat.FQC = 0;
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vif1.GSLastDownloadSize = 0;
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gifRegs->stat.OPH = false;
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}
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}
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vif1ch->qwc = 0;
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vif1ch->qwc = 0;
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@ -377,7 +381,7 @@ void dmaVIF1()
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vif1.dmamode = VIF_CHAIN_MODE;
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vif1.dmamode = VIF_CHAIN_MODE;
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}
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}
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vif1Regs->stat.FQC = min((u16)0x10, vif1ch->qwc);
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if (vif1ch->chcr.DIR) vif1Regs->stat.FQC = min((u16)0x10, vif1ch->qwc);
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// Chain Mode
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// Chain Mode
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vif1Interrupt();
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vif1Interrupt();
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