From a8094d578626b69ce5b49167e694717ea16c1608 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Sun, 24 May 2009 12:20:33 +0000 Subject: [PATCH] microVU: - Implemented an idea by Jake to use a GPR as a reg-offset index to save a few bytes from reg-moves (only did it for VI regs, didn't have enough free GPR's to do it for VF regs) - Fixed a minor problem with micro-program logs git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1254 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Alloc.inl | 6 +++--- pcsx2/x86/microVU_Compile.inl | 3 +-- pcsx2/x86/microVU_Execute.inl | 3 +-- pcsx2/x86/microVU_Flags.inl | 3 +-- pcsx2/x86/microVU_Lower.inl | 31 +++++++++++++++++-------------- pcsx2/x86/microVU_Misc.h | 4 +++- pcsx2/x86/microVU_Misc.inl | 3 +-- 7 files changed, 27 insertions(+), 26 deletions(-) diff --git a/pcsx2/x86/microVU_Alloc.inl b/pcsx2/x86/microVU_Alloc.inl index 34a2732195..e54a0b2046 100644 --- a/pcsx2/x86/microVU_Alloc.inl +++ b/pcsx2/x86/microVU_Alloc.inl @@ -716,9 +716,9 @@ microVUt(void) mVUallocCFLAGb(int reg, int fInstance) { microVUt(void) mVUallocVIa(int GPRreg, int _reg_) { microVU* mVU = mVUx; - if (!_reg_ || _reg_>15) { XOR32RtoR(GPRreg, GPRreg); } + if (!_reg_) { XOR32RtoR(GPRreg, GPRreg); } else if (isMMX(_reg_)) { MOVD32MMXtoR(GPRreg, mmVI(_reg_)); } - else { MOVZX32M16toR(GPRreg, (uptr)&mVU->regs->VI[_reg_].UL); } + else { MOVZX32Rm16toR(GPRreg, gprR, (_reg_ - 9) * 16); } } microVUt(void) mVUallocVIb(int GPRreg, int _reg_) { @@ -731,7 +731,7 @@ microVUt(void) mVUallocVIb(int GPRreg, int _reg_) { } if (_reg_ == 0) { return; } else if (isMMX(_reg_)) { MOVD32RtoMMX(mmVI(_reg_), GPRreg); } - else if (_reg_ < 16) { MOV16RtoM((uptr)&mVU->regs->VI[_reg_].UL, GPRreg); } + else if (_reg_ < 16) { MOV32RtoRm(gprR, GPRreg, (_reg_ - 9) * 16); } } //------------------------------------------------------------------ diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index db6a44131e..af92930a10 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -190,11 +190,10 @@ microVUt(void) mVUtestCycles() { iPC = mVUstartPC; CMP32ItoM((uptr)&mVU->cycles, 0); u8* jmp8 = JG8(0); - PUSH32R(gprR); MOV32ItoR(gprT2, xPC); if (!vuIndex) CALLFunc((uptr)mVUwarning0); else CALLFunc((uptr)mVUwarning1); - POP32R(gprR); + MOV32ItoR(gprR, Roffset); // Restore gprR mVUendProgram(0, 0, sI, 0, cI); x86SetJ8(jmp8); SUB32ItoM((uptr)&mVU->cycles, mVUcycles); diff --git a/pcsx2/x86/microVU_Execute.inl b/pcsx2/x86/microVU_Execute.inl index 148e0fd0c5..5c61f33ca6 100644 --- a/pcsx2/x86/microVU_Execute.inl +++ b/pcsx2/x86/microVU_Execute.inl @@ -42,7 +42,7 @@ microVUt(void) mVUdispatcherA() { SSE_LDMXCSR((uptr)&g_sseVUMXCSR); // Load Regs - MOV32MtoR(gprR, (uptr)&mVU->regs->VI[REG_R].UL); + MOV32ItoR(gprR, Roffset); // Load VI Reg Offset MOV32MtoR(gprF0, (uptr)&mVU->regs->VI[REG_STATUS_FLAG].UL); AND32ItoR(gprF0, 0xffff); MOV32RtoR(gprF1, gprF0); @@ -81,7 +81,6 @@ microVUt(void) mVUdispatcherB() { SSE_LDMXCSR((uptr)&g_sseMXCSR); // Save Regs (Other Regs Saved in mVUcompile) - MOV32RtoM((uptr)&mVU->regs->VI[REG_R].UL, gprR); SSE_MOVAPS_XMM_to_M128((uptr)&mVU->regs->ACC.UL[0], xmmACC); for (int i = 1; i < 16; i++) { diff --git a/pcsx2/x86/microVU_Flags.inl b/pcsx2/x86/microVU_Flags.inl index 95f4527efb..2e3e13e6ea 100644 --- a/pcsx2/x86/microVU_Flags.inl +++ b/pcsx2/x86/microVU_Flags.inl @@ -157,7 +157,6 @@ microVUt(void) mVUsetupFlags(int* xStatus, int* xMac, int* xClip, int cycles) { if (__Status && !mVUflagHack) { int bStatus[4]; sortFlag(xStatus, bStatus, cycles); - PUSH32R(gprR); // Backup gprR MOV32RtoR(gprT1, getFlagReg1(bStatus[0])); MOV32RtoR(gprT2, getFlagReg1(bStatus[1])); MOV32RtoR(gprR, getFlagReg1(bStatus[2])); @@ -165,7 +164,7 @@ microVUt(void) mVUsetupFlags(int* xStatus, int* xMac, int* xClip, int cycles) { MOV32RtoR(gprF0, gprT1); MOV32RtoR(gprF1, gprT2); MOV32RtoR(gprF2, gprR); - POP32R(gprR); // Restore gprR + MOV32ItoR(gprR, Roffset); // Restore gprR } if (__Mac) { diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 9a192c958f..3362827ce5 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -990,29 +990,30 @@ microVUf(void) mVU_RINIT() { pass1 { mVUanalyzeR1(_Fs_, _Fsf_); } pass2 { if (_Fs_ || (_Fsf_ == 3)) { - getReg8(gprR, _Fs_, _Fsf_); - AND32ItoR(gprR, 0x007fffff); - OR32ItoR (gprR, 0x3f800000); + getReg8(gprT1, _Fs_, _Fsf_); + AND32ItoR(gprT1, 0x007fffff); + OR32ItoR (gprT1, 0x3f800000); + MOV32RtoM(Rmem, gprT1); } - else MOV32ItoR(gprR, 0x3f800000); + else MOV32ItoM(Rmem, 0x3f800000); } pass3 { mVUlog("RINIT R, vf%02d%s", _Fs_, _Fsf_String); } } -microVUt(void) mVU_RGET_() { +microVUt(void) mVU_RGET_(int Rreg) { microVU* mVU = mVUx; if (!noWriteVF) { - if (_X) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[0], gprR); - if (_Y) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[1], gprR); - if (_Z) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[2], gprR); - if (_W) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[3], gprR); + if (_X) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[0], Rreg); + if (_Y) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[1], Rreg); + if (_Z) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[2], Rreg); + if (_W) MOV32RtoM((uptr)&mVU->regs->VF[_Ft_].UL[3], Rreg); } } microVUf(void) mVU_RGET() { microVU* mVU = mVUx; pass1 { mVUanalyzeR2(_Ft_, 1); } - pass2 { mVU_RGET_(); } + pass2 { MOV32MtoR(gprT1, Rmem); mVU_RGET_(gprT1); } pass3 { mVUlog("RGET.%s vf%02d, R", _XYZW_String, _Ft_); } } @@ -1021,6 +1022,7 @@ microVUf(void) mVU_RNEXT() { pass1 { mVUanalyzeR2(_Ft_, 0); } pass2 { // algorithm from www.project-fao.org + MOV32MtoR(gprR, Rmem); MOV32RtoR(gprT1, gprR); SHR32ItoR(gprT1, 4); AND32ItoR(gprT1, 1); @@ -1034,7 +1036,8 @@ microVUf(void) mVU_RNEXT() { XOR32RtoR(gprR, gprT1); AND32ItoR(gprR, 0x007fffff); OR32ItoR (gprR, 0x3f800000); - mVU_RGET_(); + mVU_RGET_(gprR); + MOV32ItoR(gprR, Roffset); // Restore gprR } pass3 { mVUlog("RNEXT.%s vf%02d, R", _XYZW_String, _Ft_); } } @@ -1046,7 +1049,7 @@ microVUf(void) mVU_RXOR() { if (_Fs_ || (_Fsf_ == 3)) { getReg8(gprT1, _Fs_, _Fsf_); AND32ItoR(gprT1, 0x7fffff); - XOR32RtoR(gprR, gprT1); + XOR32RtoM(Rmem, gprT1); } } pass3 { mVUlog("RXOR R, vf%02d%s", _Fs_, _Fsf_String); } @@ -1128,8 +1131,8 @@ microVUf(void) mVU_XGKICK() { //------------------------------------------------------------------ #define setBranchA(x, _x_) { \ - pass1 { if (_Imm11_ == 1 && !_x_) { mVUinfo |= _isNOP; return; } mVUbranch = x; } \ - pass2 { mVUbranch = x; } \ + mVUbranch = x; \ + pass1 { if (_Imm11_ == 1 && !_x_) { mVUinfo |= _isNOP; mVUbranch = 0; return; } } \ } microVUf(void) mVU_B() { diff --git a/pcsx2/x86/microVU_Misc.h b/pcsx2/x86/microVU_Misc.h index 306e9d5686..bcd5ae2afa 100644 --- a/pcsx2/x86/microVU_Misc.h +++ b/pcsx2/x86/microVU_Misc.h @@ -129,7 +129,7 @@ declareAllVariables #define gprT1 0 // Temp Reg #define gprT2 1 // Temp Reg -#define gprR 2 // R Reg +#define gprR 2 // VI Reg Offset #define gprF0 3 // Status Flag 0 #define gprESP 4 // Don't use? #define gprF1 5 // Status Flag 1 @@ -177,6 +177,8 @@ declareAllVariables #define bSaveAddr (((xPC + (2 * 8)) & ((vuIndex) ? 0x3ff8:0xff8)) / 8) #define branchAddr ((xPC + 8 + (_Imm11_ * 8)) & ((vuIndex) ? 0x3ff8:0xff8)) #define shufflePQ (((mVU->p) ? 0xb0 : 0xe0) | ((mVU->q) ? 0x01 : 0x04)) +#define Rmem (uptr)&mVU->regs->VI[REG_R].UL +#define Roffset (uptr)&mVU->regs->VI[9].UL // Flag Info #define __Status (mVUflagInfo & (0xf<<0)) diff --git a/pcsx2/x86/microVU_Misc.inl b/pcsx2/x86/microVU_Misc.inl index 0011b852cb..e0927813ca 100644 --- a/pcsx2/x86/microVU_Misc.inl +++ b/pcsx2/x86/microVU_Misc.inl @@ -286,7 +286,6 @@ microVUt(void) mVUbackupRegs() { microVU* mVU = mVUx; SSE_MOVAPS_XMM_to_M128((uptr)&mVU->regs->ACC.UL[0], xmmACC); SSE_MOVAPS_XMM_to_M128((uptr)&mVU->xmmPQb[0], xmmPQ); - PUSH32R(gprR); // Backup EDX } // Restore Volatile Regs @@ -296,7 +295,7 @@ microVUt(void) mVUrestoreRegs() { SSE_MOVAPS_M128_to_XMM(xmmPQ, (uptr)&mVU->xmmPQb[0]); SSE_MOVAPS_M128_to_XMM(xmmMax, (uptr)mVU_maxvals); SSE_MOVAPS_M128_to_XMM(xmmMin, (uptr)mVU_minvals); - POP32R(gprR); // Restore EDX + MOV32ItoR(gprR, Roffset); // Restore gprR } // Reads entire microProgram and finds out if Status Flag is Used