mirror of https://github.com/PCSX2/pcsx2.git
gsdx: add atomic for transaction scope object
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@ -30,30 +30,31 @@ class TransactionScope
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public:
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class Lock
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{
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volatile long state;
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std::atomic<bool> state;
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public:
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Lock()
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: state(0)
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Lock()
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: state(false)
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{
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}
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void lock()
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{
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while(_InterlockedCompareExchange(&state, 1, 0) != 0)
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bool expected_value = false;
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while(state.compare_exchange_strong(expected_value, true))
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{
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do {_mm_pause();} while(state == 1);
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do {_mm_pause();} while(state);
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}
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}
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void unlock()
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void unlock()
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{
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_InterlockedExchange(&state, 0);
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state = false;
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}
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bool isLocked() const
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bool isLocked() const
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{
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return state == 1;
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return state.load();
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}
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};
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@ -63,7 +64,7 @@ private:
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TransactionScope();
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public:
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TransactionScope(Lock& fallBackLock_, int max_retries = 3)
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TransactionScope(Lock& fallBackLock_, int max_retries = 3)
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: fallBackLock(fallBackLock_)
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{
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// The TSX (RTM/HLE) instructions on Intel AVX2 CPUs may either be
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@ -74,7 +75,7 @@ public:
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#if (_M_SSE >= 0x501 && !defined(__GNUC__)) || defined(__RTM__)
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int nretries = 0;
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while(1)
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{
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++nretries;
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@ -85,7 +86,7 @@ public:
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{
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if(!fallBackLock.isLocked()) return;
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_xabort(0xff);
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_xabort(0xff);
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}
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if((status & _XABORT_EXPLICIT) && _XABORT_CODE(status) == 0xff && !(status & _XABORT_NESTED))
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@ -97,7 +98,7 @@ public:
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break;
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}
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if(nretries >= max_retries)
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if(nretries >= max_retries)
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{
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break;
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}
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