From a3695f1cfd057653b300fed9b3c119b364e18381 Mon Sep 17 00:00:00 2001
From: GovanifY <gauvain@govanify.com>
Date: Thu, 29 Oct 2020 23:38:06 +0100
Subject: [PATCH] JIT: fix FPU IEEE float conversion on x64

---
 pcsx2/x86/iFPUd.cpp | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/pcsx2/x86/iFPUd.cpp b/pcsx2/x86/iFPUd.cpp
index fb592a1317..9c97daa1b9 100644
--- a/pcsx2/x86/iFPUd.cpp
+++ b/pcsx2/x86/iFPUd.cpp
@@ -198,7 +198,11 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc, bool addsub)
 	u8 *to_underflow = JB8(0);
 
 	xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); //simply convert
+#ifdef __M_X86_64
+	u32* end = JMP32(0);
+#else
 	u8 *end = JMP8(0);
+#endif
 
 	x86SetJ8(to_complex);
 	xUCOMI.SD(xRegisterSSE(absreg), ptr[&s_const.dbl_ps2_overflow]);
@@ -207,7 +211,11 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc, bool addsub)
 	xPSUB.Q(xRegisterSSE(reg), ptr[&s_const.dbl_one_exp]); //lower exponent
 	xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg)); //convert
 	xPADD.D(xRegisterSSE(reg), ptr[s_const.one_exp]); //raise exponent
-	u8 *end2 = JMP8(0);
+#ifdef __M_X86_64
+	u32 *end2 = JMP32(0);
+#else
+	u8* end2 = JMP8(0);
+#endif
 
 	x86SetJ8(to_overflow);
 	xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg));
@@ -246,8 +254,13 @@ void ToPS2FPU_Full(int reg, bool flags, int absreg, bool acc, bool addsub)
 	xCVTSD2SS(xRegisterSSE(reg), xRegisterSSE(reg));
 	xAND.PS(xRegisterSSE(reg), ptr[s_const.neg]); //flush to zero
 
+#ifdef __M_X86_64
+	x86SetJ32(end);
+	x86SetJ32(end2);
+#else
 	x86SetJ8(end);
 	x86SetJ8(end2);
+#endif
 	x86SetJ8(end3);
 	if (flags && FPU_FLAGS_UNDERFLOW && addsub)
 		x86SetJ8(end4);