mirror of https://github.com/PCSX2/pcsx2.git
VIF: Put in a check to make sure VIF doesn't break during a FIFO write.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5565 96395faa-99c1-11dd-bbfe-3dabce05a288
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8c86009a27
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@ -125,7 +125,7 @@ __fi void vif0FBRST(u32 value) {
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// just stoppin the VIF (linuz).
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vif0Regs.stat.VSS = true;
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vif0Regs.stat.VPS = VPS_IDLE;
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vif0.vifstalled.enabled = true;
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vif0.vifstalled.enabled = VifStallEnable(vif0ch);
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vif0.vifstalled.value = VIF_IRQ_STALL;
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}
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@ -231,7 +231,7 @@ __fi void vif1FBRST(u32 value) {
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vif1Regs.stat.VFS = true;
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vif1Regs.stat.VPS = VPS_IDLE;
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cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_IRQ_STALL;
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Console.WriteLn("vif1 force break");
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}
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@ -243,7 +243,7 @@ __fi void vif1FBRST(u32 value) {
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vif1Regs.stat.VSS = true;
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vif1Regs.stat.VPS = VPS_IDLE;
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cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_IRQ_STALL;
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}
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@ -241,6 +241,8 @@ static VIFregisters& vif1Regs = (VIFregisters&)eeHw[0x3C00];
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#define MTVU_VifX (idx ? ((THREAD_VU1) ? vu1Thread.vif : vif1) : (vif0))
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#define MTVU_VifXRegs (idx ? ((THREAD_VU1) ? vu1Thread.vifRegs : vif1Regs) : (vif0Regs))
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#define VifStallEnable(vif) vif.chcr.STR ? true : false;
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extern void dmaVIF0();
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extern void dmaVIF1();
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extern void mfifoVIF1transfer(int qwc);
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@ -28,7 +28,7 @@ __fi void vif0FLUSH()
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if(vif0Regs.stat.VEW == true)
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{
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vif0.waitforvu = true;
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vif0.vifstalled.enabled = true;
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vif0.vifstalled.enabled = VifStallEnable(vif0ch);
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vif0.vifstalled.value = VIF_TIMING_BREAK;
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}
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return;
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@ -28,7 +28,7 @@ __fi void vif1FLUSH()
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if(vif1Regs.stat.VEW == true)
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{
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vif1.waitforvu = true;
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_TIMING_BREAK;
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}
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}
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@ -54,7 +54,7 @@ __ri void vifExecQueue(int idx)
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else { startcycles = ((VU1.cycle-startcycles) + ( vif1ch.qwc - (vif1.vifpacketsize >> 2) )); CPU_INT(VIF_VU1_FINISH, 1/*startcycles * BIAS*/); }
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//DevCon.Warning("Ran VU%x, VU0 Cycles %x, VU1 Cycles %x, start %x cycle %x", idx, g_vu0Cycles, g_vu1Cycles, startcycles, VU1.cycle);
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//GetVifX.vifstalled.enabled = true;
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//GetVifX.vifstalled.enabled = VifStallEnable(vifXch);
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//GetVifX.vifstalled.value = VIF_TIMING_BREAK;
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}
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@ -153,7 +153,7 @@ template<int idx> __fi int _vifCode_Direct(int pass, const u8* data, bool isDire
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if (size != ret) { // Stall if gif didn't process all the data (path2 queued)
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GUNIT_WARN("Vif %s: Stall! [size=%d][ret=%d]", name, size, ret);
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//gifUnit.PrintInfo();
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_TIMING_BREAK;
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vif1Regs.stat.VGW = true;
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return 0;
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@ -161,7 +161,7 @@ template<int idx> __fi int _vifCode_Direct(int pass, const u8* data, bool isDire
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if (vif1.tag.size == 0) {
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vif1.cmd = 0;
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vif1.pass = 0;
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_TIMING_BREAK;
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}
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return ret / 4;
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@ -190,7 +190,7 @@ vifOp(vifCode_Flush) {
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GUNIT_WARN("Vif Flush: Stall!");
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//gifUnit.PrintInfo();
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vif1Regs.stat.VGW = true;
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_TIMING_BREAK;
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return 0;
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}
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@ -215,7 +215,7 @@ vifOp(vifCode_FlushA) {
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{
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GUNIT_WARN("Vif FlushA: Stall!");
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vif1Regs.stat.VGW = true;
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vif1.vifstalled.enabled = true;
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vif1.vifstalled.enabled = VifStallEnable(vif1ch);
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vif1.vifstalled.value = VIF_TIMING_BREAK;
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return 0;
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@ -236,7 +236,7 @@ vifOp(vifCode_FlushA) {
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}
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/*if (doStall) {
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vif1Regs.stat.VGW = true;
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vifX.vifstalled.enabled = true;
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vifX.vifstalled.enabled = VifStallEnable(vifXch);
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vifX.vifstalled.value = VIF_TIMING_BREAK;
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return 0;
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}
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@ -380,7 +380,7 @@ vifOp(vifCode_MSCALF) {
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if (u32 a = gifUnit.checkPaths(1,1,0)) {
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GUNIT_WARN("Vif MSCALF: Stall! [%d,%d]", !!(a&1), !!(a&2));
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vif1Regs.stat.VGW = true;
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vifX.vifstalled.enabled = true;
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vifX.vifstalled.enabled = VifStallEnable(vifXch);
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vifX.vifstalled.value = VIF_TIMING_BREAK;
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}
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if(vifX.waitforvu == false)
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@ -438,7 +438,7 @@ vifOp(vifCode_Nop) {
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{
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if(((data[1] >> 24) & 0x7f) == 0x6) //is mskpath3 next
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{
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GetVifX.vifstalled.enabled = true;
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GetVifX.vifstalled.enabled = VifStallEnable(vifXch);
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GetVifX.vifstalled.value = VIF_TIMING_BREAK;
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}
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}
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@ -455,7 +455,7 @@ vifOp(vifCode_Null) {
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if (!(vifXRegs.err.ME1)) { // Ignore vifcode and tag mismatch error
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Console.WriteLn("Vif%d: Unknown VifCmd! [%x]", idx, vifX.cmd);
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vifXRegs.stat.ER1 = true;
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vifX.vifstalled.enabled = true;
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vifX.vifstalled.enabled = VifStallEnable(vifXch);
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vifX.vifstalled.value = VIF_IRQ_STALL;
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//vifX.irq++;
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}
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@ -86,7 +86,7 @@ _vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) {
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vifXRegs.stat.VIS = true; // Note: commenting this out fixes WALL-E?
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}
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//Always needs to be set to return to the correct offset if there is data left.
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vifX.vifstalled.enabled = true;
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vifX.vifstalled.enabled = VifStallEnable(vifXch);
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vifX.vifstalled.value = VIF_IRQ_STALL;
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}
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