VIF: Put in a check to make sure VIF doesn't break during a FIFO write.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5565 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
refraction@gmail.com 2013-02-18 21:17:35 +00:00
parent 8c86009a27
commit a1bc42fa92
6 changed files with 17 additions and 15 deletions

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@ -125,7 +125,7 @@ __fi void vif0FBRST(u32 value) {
// just stoppin the VIF (linuz).
vif0Regs.stat.VSS = true;
vif0Regs.stat.VPS = VPS_IDLE;
vif0.vifstalled.enabled = true;
vif0.vifstalled.enabled = VifStallEnable(vif0ch);
vif0.vifstalled.value = VIF_IRQ_STALL;
}
@ -231,7 +231,7 @@ __fi void vif1FBRST(u32 value) {
vif1Regs.stat.VFS = true;
vif1Regs.stat.VPS = VPS_IDLE;
cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_IRQ_STALL;
Console.WriteLn("vif1 force break");
}
@ -243,7 +243,7 @@ __fi void vif1FBRST(u32 value) {
vif1Regs.stat.VSS = true;
vif1Regs.stat.VPS = VPS_IDLE;
cpuRegs.interrupt &= ~((1 << 1) | (1 << 10)); //Stop all vif1 DMA's
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_IRQ_STALL;
}

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@ -241,6 +241,8 @@ static VIFregisters& vif1Regs = (VIFregisters&)eeHw[0x3C00];
#define MTVU_VifX (idx ? ((THREAD_VU1) ? vu1Thread.vif : vif1) : (vif0))
#define MTVU_VifXRegs (idx ? ((THREAD_VU1) ? vu1Thread.vifRegs : vif1Regs) : (vif0Regs))
#define VifStallEnable(vif) vif.chcr.STR ? true : false;
extern void dmaVIF0();
extern void dmaVIF1();
extern void mfifoVIF1transfer(int qwc);

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@ -28,7 +28,7 @@ __fi void vif0FLUSH()
if(vif0Regs.stat.VEW == true)
{
vif0.waitforvu = true;
vif0.vifstalled.enabled = true;
vif0.vifstalled.enabled = VifStallEnable(vif0ch);
vif0.vifstalled.value = VIF_TIMING_BREAK;
}
return;

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@ -28,7 +28,7 @@ __fi void vif1FLUSH()
if(vif1Regs.stat.VEW == true)
{
vif1.waitforvu = true;
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_TIMING_BREAK;
}
}

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@ -54,7 +54,7 @@ __ri void vifExecQueue(int idx)
else { startcycles = ((VU1.cycle-startcycles) + ( vif1ch.qwc - (vif1.vifpacketsize >> 2) )); CPU_INT(VIF_VU1_FINISH, 1/*startcycles * BIAS*/); }
//DevCon.Warning("Ran VU%x, VU0 Cycles %x, VU1 Cycles %x, start %x cycle %x", idx, g_vu0Cycles, g_vu1Cycles, startcycles, VU1.cycle);
//GetVifX.vifstalled.enabled = true;
//GetVifX.vifstalled.enabled = VifStallEnable(vifXch);
//GetVifX.vifstalled.value = VIF_TIMING_BREAK;
}
@ -153,7 +153,7 @@ template<int idx> __fi int _vifCode_Direct(int pass, const u8* data, bool isDire
if (size != ret) { // Stall if gif didn't process all the data (path2 queued)
GUNIT_WARN("Vif %s: Stall! [size=%d][ret=%d]", name, size, ret);
//gifUnit.PrintInfo();
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_TIMING_BREAK;
vif1Regs.stat.VGW = true;
return 0;
@ -161,7 +161,7 @@ template<int idx> __fi int _vifCode_Direct(int pass, const u8* data, bool isDire
if (vif1.tag.size == 0) {
vif1.cmd = 0;
vif1.pass = 0;
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_TIMING_BREAK;
}
return ret / 4;
@ -190,7 +190,7 @@ vifOp(vifCode_Flush) {
GUNIT_WARN("Vif Flush: Stall!");
//gifUnit.PrintInfo();
vif1Regs.stat.VGW = true;
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_TIMING_BREAK;
return 0;
}
@ -215,7 +215,7 @@ vifOp(vifCode_FlushA) {
{
GUNIT_WARN("Vif FlushA: Stall!");
vif1Regs.stat.VGW = true;
vif1.vifstalled.enabled = true;
vif1.vifstalled.enabled = VifStallEnable(vif1ch);
vif1.vifstalled.value = VIF_TIMING_BREAK;
return 0;
@ -236,7 +236,7 @@ vifOp(vifCode_FlushA) {
}
/*if (doStall) {
vif1Regs.stat.VGW = true;
vifX.vifstalled.enabled = true;
vifX.vifstalled.enabled = VifStallEnable(vifXch);
vifX.vifstalled.value = VIF_TIMING_BREAK;
return 0;
}
@ -380,7 +380,7 @@ vifOp(vifCode_MSCALF) {
if (u32 a = gifUnit.checkPaths(1,1,0)) {
GUNIT_WARN("Vif MSCALF: Stall! [%d,%d]", !!(a&1), !!(a&2));
vif1Regs.stat.VGW = true;
vifX.vifstalled.enabled = true;
vifX.vifstalled.enabled = VifStallEnable(vifXch);
vifX.vifstalled.value = VIF_TIMING_BREAK;
}
if(vifX.waitforvu == false)
@ -438,7 +438,7 @@ vifOp(vifCode_Nop) {
{
if(((data[1] >> 24) & 0x7f) == 0x6) //is mskpath3 next
{
GetVifX.vifstalled.enabled = true;
GetVifX.vifstalled.enabled = VifStallEnable(vifXch);
GetVifX.vifstalled.value = VIF_TIMING_BREAK;
}
}
@ -455,7 +455,7 @@ vifOp(vifCode_Null) {
if (!(vifXRegs.err.ME1)) { // Ignore vifcode and tag mismatch error
Console.WriteLn("Vif%d: Unknown VifCmd! [%x]", idx, vifX.cmd);
vifXRegs.stat.ER1 = true;
vifX.vifstalled.enabled = true;
vifX.vifstalled.enabled = VifStallEnable(vifXch);
vifX.vifstalled.value = VIF_IRQ_STALL;
//vifX.irq++;
}

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@ -86,7 +86,7 @@ _vifT static __fi bool vifTransfer(u32 *data, int size, bool TTE) {
vifXRegs.stat.VIS = true; // Note: commenting this out fixes WALL-E?
}
//Always needs to be set to return to the correct offset if there is data left.
vifX.vifstalled.enabled = true;
vifX.vifstalled.enabled = VifStallEnable(vifXch);
vifX.vifstalled.value = VIF_IRQ_STALL;
}