From a0e619bcd718636794c6479851a49d4350d19344 Mon Sep 17 00:00:00 2001 From: Gregory Hainaut Date: Sun, 7 Feb 2016 12:02:43 +0100 Subject: [PATCH] VTLB: disable MMX optimization memory copy will be done in SSE or X86 only. It is very unlikely that it was used anyway (need 64 bits transfer and no XMM register available) Remove the now useless _allocMMXreg and _getFreeMMXreg too --- pcsx2/x86/iCore.h | 2 - pcsx2/x86/ix86-32/iCore-32.cpp | 144 --------------------------------- pcsx2/x86/ix86-32/recVTLB.cpp | 24 ++---- 3 files changed, 5 insertions(+), 165 deletions(-) diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h index a72d89b82a..5700c6072b 100644 --- a/pcsx2/x86/iCore.h +++ b/pcsx2/x86/iCore.h @@ -312,8 +312,6 @@ struct _mmxregs { }; void _initMMXregs(); -int _getFreeMMXreg(); -int _allocMMXreg(int MMXreg, int reg, int mode); int _checkMMXreg(int reg, int mode); void _clearNeededMMXregs(); void _deleteMMXreg(int reg, int flush); diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp index 8e1eef77c4..c42eb7aba9 100644 --- a/pcsx2/x86/ix86-32/iCore-32.cpp +++ b/pcsx2/x86/ix86-32/iCore-32.cpp @@ -500,150 +500,6 @@ __fi void* _MMXGetAddr(int reg) return NULL; } -int _getFreeMMXreg() -{ - uint i; - int tempi = -1; - u32 bestcount = 0x10000; - - for (i=0; iregs[mmxregs[i].reg-MMX_GPR] & (EEINST_LIVE0)) ) { - _freeMMXreg(i); - return i; - } - if( !(g_pCurInstInfo->regs[mmxregs[i].reg-MMX_GPR]&EEINST_USED) ) { - _freeMMXreg(i); - return i; - } - } - } - - // check for future xmm usage - for (i=0; i= 0 ) { - xMOVH.PS(ptr[(void*)((uptr)_MMXGetAddr(reg)+8)], xRegisterSSE(xmmreg)); - if( mode & MODE_READ ) - xMOVQ(xRegisterMMX(mmxreg), xRegisterSSE(xmmreg)); - - if( xmmregs[xmmreg].mode & MODE_WRITE ) - mmxregs[mmxreg].mode |= MODE_WRITE; - - // don't flush - xmmregs[xmmreg].inuse = 0; - } - else { - if( MMX_ISGPR(reg) ) { - if(mode&(MODE_READHALF|MODE_READ)) _flushConstReg(reg-MMX_GPR); - } - - if( (mode & MODE_READHALF) || (MMX_IS32BITS(reg)&&(mode&MODE_READ)) ) { - xMOVDZX(xRegisterMMX(mmxreg), ptr[(_MMXGetAddr(reg))]); - } - else if( mode & MODE_READ ) { - xMOVQ(xRegisterMMX(mmxreg), ptr[(_MMXGetAddr(reg))]); - } - } - } - - return mmxreg; -} - int _checkMMXreg(int reg, int mode) { uint i; diff --git a/pcsx2/x86/ix86-32/recVTLB.cpp b/pcsx2/x86/ix86-32/recVTLB.cpp index 2296eb28db..2bc96b66e3 100644 --- a/pcsx2/x86/ix86-32/recVTLB.cpp +++ b/pcsx2/x86/ix86-32/recVTLB.cpp @@ -68,11 +68,7 @@ static void iMOV128_SSE( const xIndirectVoid& destRm, const xIndirectVoid& srcRm xMOVDQA( destRm, reg ); } -// Moves 64 bits of data from point B to point A, using either MMX, SSE, or x86 registers -// if neither MMX nor SSE is available to the task. -// -// Optimizations: This method uses MMX is the cpu is in MMX mode, or SSE if it's in FPU -// mode (saving on potential xEMMS uses). +// Moves 64 bits of data from point B to point A, using either SSE, or x86 registers // static void iMOV64_Smart( const xIndirectVoid& destRm, const xIndirectVoid& srcRm ) { @@ -86,20 +82,10 @@ static void iMOV64_Smart( const xIndirectVoid& destRm, const xIndirectVoid& srcR return; } - if( _hasFreeMMXreg() ) - { - xRegisterMMX reg( _allocMMXreg(-1, MMX_TEMP, 0) ); - xMOVQ( reg, srcRm ); - xMOVQ( destRm, reg ); - _freeMMXreg( reg.Id ); - } - else - { - xMOV( eax, srcRm ); - xMOV( destRm, eax ); - xMOV( eax, srcRm+4 ); - xMOV( destRm+4, eax ); - } + xMOV( eax, srcRm ); + xMOV( destRm, eax ); + xMOV( eax, srcRm+4 ); + xMOV( destRm+4, eax ); } /*