mirror of https://github.com/PCSX2/pcsx2.git
IPU: Stop early IPUProcessInterrupt fires.
This commit is contained in:
parent
5c15d57f5f
commit
9f4bf4267d
|
@ -58,7 +58,7 @@ void tIPU_cmd::clear()
|
|||
|
||||
__fi void IPUProcessInterrupt()
|
||||
{
|
||||
if (ipuRegs.ctrl.BUSY) // && (g_BP.FP || g_BP.IFC || (ipu1ch.chcr.STR && ipu1ch.qwc > 0)))
|
||||
if (ipuRegs.ctrl.BUSY && !CommandExecuteQueued) // && (g_BP.FP || g_BP.IFC || (ipu1ch.chcr.STR && ipu1ch.qwc > 0)))
|
||||
IPUWorker();
|
||||
}
|
||||
|
||||
|
|
|
@ -290,6 +290,7 @@ static IPUregisters& ipuRegs = (IPUregisters&)eeHw[0x2000];
|
|||
|
||||
alignas(16) extern tIPU_cmd ipu_cmd;
|
||||
extern int coded_block_pattern;
|
||||
extern bool CommandExecuteQueued;
|
||||
|
||||
extern void ipuReset();
|
||||
|
||||
|
|
|
@ -20,11 +20,13 @@
|
|||
#include "mpeg2lib/Mpeg.h"
|
||||
|
||||
IPUStatus IPU1Status;
|
||||
bool CommandExecuteQueued;
|
||||
|
||||
void ipuDmaReset()
|
||||
{
|
||||
IPU1Status.InProgress = false;
|
||||
IPU1Status.DMAFinished = true;
|
||||
CommandExecuteQueued = false;
|
||||
}
|
||||
|
||||
void SaveStateBase::ipuDmaFreeze()
|
||||
|
@ -137,6 +139,8 @@ void IPU1dma()
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
CommandExecuteQueued = true;
|
||||
CPU_INT(IPU_PROCESS, totalqwc * BIAS);
|
||||
|
||||
IPU_LOG("Completed Call IPU1 DMA QWC Remaining %x Finished %d In Progress %d tadr %x", ipu1ch.qwc, IPU1Status.DMAFinished, IPU1Status.InProgress, ipu1ch.tadr);
|
||||
|
@ -146,7 +150,8 @@ void IPU0dma()
|
|||
{
|
||||
if(!ipuRegs.ctrl.OFC)
|
||||
{
|
||||
IPUProcessInterrupt();
|
||||
if(!CommandExecuteQueued)
|
||||
IPUProcessInterrupt();
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -183,7 +188,10 @@ void IPU0dma()
|
|||
IPU_INT_FROM( readsize * BIAS );
|
||||
|
||||
if (ipu0ch.qwc > 0)
|
||||
{
|
||||
CommandExecuteQueued = true;
|
||||
CPU_INT(IPU_PROCESS, 4);
|
||||
}
|
||||
}
|
||||
|
||||
__fi void dmaIPU0() // fromIPU
|
||||
|
@ -261,6 +269,7 @@ __fi void dmaIPU1() // toIPU
|
|||
|
||||
void ipuCMDProcess()
|
||||
{
|
||||
CommandExecuteQueued = false;
|
||||
IPUProcessInterrupt();
|
||||
}
|
||||
|
||||
|
|
|
@ -293,23 +293,23 @@ static __fi void _cpuTestInterrupts()
|
|||
/* These are 'pcsx2 interrupts', they handle asynchronous stuff
|
||||
that depends on the cycle timings */
|
||||
|
||||
TESTINT(DMAC_VIF1, vif1Interrupt);
|
||||
TESTINT(DMAC_VIF1, vif1Interrupt);
|
||||
TESTINT(DMAC_GIF, gifInterrupt);
|
||||
TESTINT(DMAC_SIF0, EEsif0Interrupt);
|
||||
TESTINT(DMAC_SIF1, EEsif1Interrupt);
|
||||
TESTINT(IPU_PROCESS, ipuCMDProcess);
|
||||
// Profile-guided Optimization (sorta)
|
||||
// The following ints are rarely called. Encasing them in a conditional
|
||||
// as follows helps speed up most games.
|
||||
|
||||
if (cpuRegs.interrupt & ((1 << DMAC_VIF0) | (1 << DMAC_FROM_IPU) | (1 << DMAC_TO_IPU)
|
||||
| (1 << DMAC_FROM_SPR) | (1 << DMAC_TO_SPR) | (1 << DMAC_MFIFO_VIF) | (1 << DMAC_MFIFO_GIF)
|
||||
| (1 << VIF_VU0_FINISH) | (1 << VIF_VU1_FINISH)))
|
||||
| (1 << VIF_VU0_FINISH) | (1 << VIF_VU1_FINISH) | (1 << IPU_PROCESS)))
|
||||
{
|
||||
TESTINT(DMAC_VIF0, vif0Interrupt);
|
||||
|
||||
TESTINT(DMAC_FROM_IPU, ipu0Interrupt);
|
||||
TESTINT(DMAC_TO_IPU, ipu1Interrupt);
|
||||
TESTINT(IPU_PROCESS, ipuCMDProcess);
|
||||
|
||||
TESTINT(DMAC_FROM_SPR, SPRFROMinterrupt);
|
||||
TESTINT(DMAC_TO_SPR, SPRTOinterrupt);
|
||||
|
|
Loading…
Reference in New Issue