mirror of https://github.com/PCSX2/pcsx2.git
pcsx2-ee: Use a single constructor for BaseBlockArray
Directly reserve the array instead to rely on the reserve function. + add a couple of comments
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@ -33,12 +33,13 @@ struct BASEBLOCKEX
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{
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{
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u32 startpc;
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u32 startpc;
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uptr fnptr;
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uptr fnptr;
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u16 size; // size in dwords
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u16 size; // The size in dwords (equivalent to the number of instructions)
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u16 x86size;
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u16 x86size; // The size in byte of the translated x86 instructions
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#ifdef PCSX2_DEVBUILD
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#ifdef PCSX2_DEVBUILD
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u32 visited; // number of times called
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// Could be useful to instrument the block
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u64 ltime; // regs it assumes to have set already
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//u32 visited; // number of times called
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//u64 ltime; // regs it assumes to have set already
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#endif
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#endif
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};
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};
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@ -60,11 +61,6 @@ class BaseBlockArray {
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pxAssert(blocks != NULL);
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pxAssert(blocks != NULL);
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}
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}
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public:
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public:
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BaseBlockArray() : _Reserved(0),
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_Size(0)
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{
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}
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~BaseBlockArray()
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~BaseBlockArray()
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{
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{
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if(blocks) {
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if(blocks) {
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@ -75,10 +71,7 @@ public:
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BaseBlockArray (s32 size) : _Reserved(0),
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BaseBlockArray (s32 size) : _Reserved(0),
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_Size(0), blocks(NULL)
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_Size(0), blocks(NULL)
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{
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{
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if(size > 0) {
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reserve(size);
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resize(size);
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}
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_Reserved = size;
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}
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}
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BASEBLOCKEX *insert(u32 startpc, uptr fnptr)
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BASEBLOCKEX *insert(u32 startpc, uptr fnptr)
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@ -164,16 +157,14 @@ protected:
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public:
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public:
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BaseBlocks() :
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BaseBlocks() :
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recompiler(0)
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recompiler(0)
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, blocks(0)
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, blocks(0x4000)
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{
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{
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blocks.reserve(0x4000);
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}
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}
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BaseBlocks(uptr recompiler_) :
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BaseBlocks(uptr recompiler_) :
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recompiler(recompiler_),
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recompiler(recompiler_),
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blocks(0)
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blocks(0x4000)
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{
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{
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blocks.reserve(0x4000);
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}
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}
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void SetJITCompile( void (*recompiler_)() )
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void SetJITCompile( void (*recompiler_)() )
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@ -861,6 +861,8 @@ void R5900::Dynarec::OpcodeImpl::recSYSCALL()
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CMP32ItoM((uptr)&cpuRegs.pc, pc);
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CMP32ItoM((uptr)&cpuRegs.pc, pc);
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j8Ptr[0] = JE8(0);
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j8Ptr[0] = JE8(0);
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ADD32ItoM((uptr)&cpuRegs.cycle, eeScaleBlockCycles());
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ADD32ItoM((uptr)&cpuRegs.cycle, eeScaleBlockCycles());
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// Note: technically the address is 0x8000_0180 (or 0x180)
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// (if CPU is booted)
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xJMP( DispatcherReg );
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xJMP( DispatcherReg );
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x86SetJ8(j8Ptr[0]);
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x86SetJ8(j8Ptr[0]);
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//g_branch = 2;
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//g_branch = 2;
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