diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h
index 35f80688a9..71cca928f1 100644
--- a/pcsx2/x86/iCore.h
+++ b/pcsx2/x86/iCore.h
@@ -312,15 +312,9 @@ struct _mmxregs {
 };
 
 void _initMMXregs();
-void _clearNeededMMXregs();
 u8 _hasFreeMMXreg();
 int _getNumMMXwrite();
 
-// returns new index of reg, lower 32 bits already in mmx
-// shift is used when the data is in the top bits of the mmx reg to begin with
-// a negative shift is for sign extension
-extern int _signExtendGPRtoMMX(x86MMXRegType to, u32 gprreg, int shift);
-
 extern _mmxregs mmxregs[iREGCNT_MMX], s_saveMMXregs[iREGCNT_MMX];
 extern u16 x86FpuState;
 
diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp
index 4e814bb959..9ee813d6b8 100644
--- a/pcsx2/x86/ix86-32/iCore-32.cpp
+++ b/pcsx2/x86/ix86-32/iCore-32.cpp
@@ -481,36 +481,6 @@ void _initMMXregs()
 	s_mmxchecknext = 0;
 }
 
-__fi void* _MMXGetAddr(int reg)
-{
-	pxAssert( reg != MMX_TEMP );
-
-	if( reg == MMX_LO ) return &cpuRegs.LO;
-	if( reg == MMX_HI ) return &cpuRegs.HI;
-	if( reg == MMX_FPUACC ) return &fpuRegs.ACC;
-
-	if( reg >= MMX_GPR && reg < MMX_GPR+32 ) return &cpuRegs.GPR.r[reg&31];
-	if( reg >= MMX_FPU && reg < MMX_FPU+32 ) return &fpuRegs.fpr[reg&31];
-	if( reg >= MMX_COP0 && reg < MMX_COP0+32 ) return &cpuRegs.CP0.r[reg&31];
-
-	pxAssume( false );
-	return NULL;
-}
-
-void _clearNeededMMXregs()
-{
-	uint i;
-
-	for (i=0; i<iREGCNT_MMX; i++) {
-		if( mmxregs[i].needed ) {
-			// setup read to any just written regs
-			if( mmxregs[i].inuse && (mmxregs[i].mode&MODE_WRITE) )
-				mmxregs[i].mode |= MODE_READ;
-			mmxregs[i].needed = 0;
-		}
-	}
-}
-
 int _getNumMMXwrite()
 {
 	uint num = 0, i;
@@ -532,18 +502,3 @@ void _signExtendSFtoM(uptr mem)
 	xCWDE();
 	xMOV(ptr[(void*)(mem)], eax);
 }
-
-int _signExtendGPRtoMMX(x86MMXRegType to, u32 gprreg, int shift)
-{
-	pxAssert( to >= 0 && shift >= 0 );
-
-	SetMMXstate();
-
-	if( shift > 0 ) xPSRA.D(xRegisterMMX(to), shift);
-	xMOVD(ptr[&cpuRegs.GPR.r[gprreg].UL[0]], xRegisterMMX(to));
-	xPSRA.D(xRegisterMMX(to), 31);
-	xMOVD(ptr[&cpuRegs.GPR.r[gprreg].UL[1]], xRegisterMMX(to));
-	mmxregs[to].inuse = 0;
-
-	return -1;
-}
diff --git a/pcsx2/x86/ix86-32/iR5900-32.cpp b/pcsx2/x86/ix86-32/iR5900-32.cpp
index 50223dd40c..8f67b88891 100644
--- a/pcsx2/x86/ix86-32/iR5900-32.cpp
+++ b/pcsx2/x86/ix86-32/iR5900-32.cpp
@@ -1309,7 +1309,6 @@ void recompileNextInstruction(int delayslot)
 					case 0: case 1: case 2: case 3: case 0x10: case 0x11: case 0x12: case 0x13:
 						Console.Warning("branch %x in delay slot!", cpuRegs.code);
 						_clearNeededX86regs();
-						_clearNeededMMXregs();
 						_clearNeededXMMregs();
 						return;
 				}
@@ -1318,7 +1317,6 @@ void recompileNextInstruction(int delayslot)
 			case 2: case 3: case 4: case 5: case 6: case 7: case 0x14: case 0x15: case 0x16: case 0x17:
 				Console.Warning("branch %x in delay slot!", cpuRegs.code);
 				_clearNeededX86regs();
-				_clearNeededMMXregs();
 				_clearNeededXMMregs();
 				return;
 		}
@@ -1359,7 +1357,6 @@ void recompileNextInstruction(int delayslot)
 
 	//CHECK_XMMCHANGED();
 	_clearNeededX86regs();
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 
 //	_freeXMMregs();
diff --git a/pcsx2/x86/ix86-32/iR5900Branch.cpp b/pcsx2/x86/ix86-32/iR5900Branch.cpp
index ba984eaf6e..2877ad5bf8 100644
--- a/pcsx2/x86/ix86-32/iR5900Branch.cpp
+++ b/pcsx2/x86/ix86-32/iR5900Branch.cpp
@@ -186,7 +186,6 @@ void recSetBranchEQ(int info, int bne, int process)
 		}
 	}
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 }
 
@@ -211,7 +210,6 @@ void recSetBranchL(int ltz)
 	if( ltz ) j32Ptr[ 0 ] = JGE32( 0 );
 	else j32Ptr[ 0 ] = JL32( 0 );
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 }
 
@@ -586,7 +584,6 @@ void recBLEZ()
 
 	x86SetJ8( j8Ptr[ 0 ] );
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 
 	SaveBranchState();
@@ -634,7 +631,6 @@ void recBGTZ()
 
 	x86SetJ8( j8Ptr[ 0 ] );
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 
 	SaveBranchState();
@@ -807,7 +803,6 @@ void recBLEZL()
 		if( !(g_cpuConstRegs[_Rs_].SD[0] <= 0) )
 			SetBranchImm( pc + 4);
 		else {
-			_clearNeededMMXregs();
 			_clearNeededXMMregs();
 			recompileNextInstruction(1);
 			SetBranchImm( branchTo );
@@ -826,7 +821,6 @@ void recBLEZL()
 
 	x86SetJ32( j32Ptr[ 0 ] );
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 
 	SaveBranchState();
@@ -853,7 +847,6 @@ void recBGTZL()
 		if( !(g_cpuConstRegs[_Rs_].SD[0] > 0) )
 			SetBranchImm( pc + 4);
 		else {
-			_clearNeededMMXregs();
 			_clearNeededXMMregs();
 			recompileNextInstruction(1);
 			SetBranchImm( branchTo );
@@ -872,7 +865,6 @@ void recBGTZL()
 
 	x86SetJ32( j32Ptr[ 0 ] );
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 
 	SaveBranchState();
diff --git a/pcsx2/x86/ix86-32/iR5900Jump.cpp b/pcsx2/x86/ix86-32/iR5900Jump.cpp
index 20b389a0e0..ecaca3ce48 100644
--- a/pcsx2/x86/ix86-32/iR5900Jump.cpp
+++ b/pcsx2/x86/ix86-32/iR5900Jump.cpp
@@ -144,7 +144,6 @@ void recJALR()
 		}
 	}
 
-	_clearNeededMMXregs();
 	_clearNeededXMMregs();
 	recompileNextInstruction(1);