mirror of https://github.com/PCSX2/pcsx2.git
microVU: Fix for Red Faction 2
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4622 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -427,7 +427,7 @@ void* mVUcompile(microVU& mVU, u32 startPC, uptr pState) {
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mVUsetupRange(mVU, startPC, 1); // Setup Program Bounds/Range
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mVU.regAlloc->reset(); // Reset regAlloc
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mVUinitFirstPass(mVU, pState, thisPtr);
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for (int branch = 0; mVUcount < endCount; mVUcount++) {
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for(int branch = 0; mVUcount < endCount; mVUcount++) {
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incPC(1);
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startLoop(mVU);
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mVUincCycles(mVU, 1);
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@ -462,7 +462,7 @@ void* mVUcompile(microVU& mVU, u32 startPC, uptr pState) {
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setCode();
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mVUbranch = 0;
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u32 x = 0;
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for (; x < endCount; x++) {
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for( ; x < endCount; x++) {
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if (mVUinfo.isEOB) { handleBadOp(mVU, x); x = 0xffff; }
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if (mVUup.mBit) { xOR(ptr32[&mVU.regs().flags], VUFLAG_MFLAGSET); }
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mVUexecuteInstruction(mVU);
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@ -168,13 +168,16 @@ void mVUdispatcherD(mV) {
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_mVUt void* __fastcall mVUexecute(u32 startPC, u32 cycles) {
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microVU& mVU = mVUx;
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//DevCon.WriteLn("microVU%x: startPC = 0x%x, cycles = 0x%x", vuIndex, startPC, cycles);
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u32 vuLimit = vuIndex ? 0x3fff : 0xfff;
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if (startPC > vuLimit) {
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DevCon.Warning("microVU%x Warning: startPC = 0x%x, cycles = 0x%x", vuIndex, startPC, cycles);
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}
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mVU.cycles = cycles;
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mVU.cycles = cycles;
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mVU.totalCycles = cycles;
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xSetPtr(mVU.prog.x86ptr); // Set x86ptr to where last program left off
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return mVUsearchProg<vuIndex>(startPC, (uptr)&mVU.prog.lpState); // Find and set correct program
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return mVUsearchProg<vuIndex>(startPC & vuLimit, (uptr)&mVU.prog.lpState); // Find and set correct program
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}
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//------------------------------------------------------------------
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@ -54,7 +54,7 @@ __fi void mVUstatusFlagOp(mV) {
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int findFlagInst(int* fFlag, int cycles) {
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int j = 0, jValue = -1;
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for (int i = 0; i < 4; i++) {
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for(int i = 0; i < 4; i++) {
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if ((fFlag[i] <= cycles) && (fFlag[i] > jValue)) { j = i; jValue = fFlag[i]; }
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}
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return j;
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@ -64,7 +64,7 @@ int findFlagInst(int* fFlag, int cycles) {
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int sortFlag(int* fFlag, int* bFlag, int cycles) {
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int lFlag = -5;
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int x = 0;
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for (int i = 0; i < 4; i++) {
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for(int i = 0; i < 4; i++) {
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bFlag[i] = findFlagInst(fFlag, cycles);
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if (lFlag != bFlag[i]) { x++; }
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lFlag = bFlag[i];
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@ -83,18 +83,18 @@ __fi void mVUsetFlags(mV, microFlagCycles& mFC) {
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u32 aCount = 1; // Amount of instructions needed to get valid mac flag instances for block linking
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// Ensure last ~4+ instructions update mac/status flags (if next block's first 4 instructions will read them)
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for (int i = mVUcount; i > 0; i--, aCount++) {
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for(int i = mVUcount; i > 0; i--, aCount++) {
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if (sFLAG.doFlag) {
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if (__Mac) { mFLAG.doFlag = 1; }
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if (__Status) { sFLAG.doNonSticky = 1; }
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if (aCount >= 4) { break; }
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if (__Mac) mFLAG.doFlag = 1;
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if (__Status) sFLAG.doNonSticky = 1;
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if (aCount >= 4) break;
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}
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incPC2(-2);
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}
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// Status/Mac Flags Setup Code
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int xS = 0, xM = 0, xC = 0;
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for (int i = 0; i < 4; i++) {
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for(int i = 0; i < 4; i++) {
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mFC.xStatus[i] = i;
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mFC.xMac [i] = i;
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mFC.xClip [i] = i;
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@ -122,7 +122,7 @@ __fi void mVUsetFlags(mV, microFlagCycles& mFC) {
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mFC.cycles = 0;
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u32 xCount = mVUcount; // Backup count
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iPC = mVUstartPC;
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for (mVUcount = 0; mVUcount < xCount; mVUcount++) {
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for(mVUcount = 0; mVUcount < xCount; mVUcount++) {
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if (mVUlow.isFSSET && !noFlagOpts) {
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if (__Status) { // Don't Optimize out on the last ~4+ instructions
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if ((xCount - mVUcount) > aCount) { mVUstatusFlagOp(mVU); }
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@ -1346,7 +1346,7 @@ void normJumpPass2(mV) {
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xSHL(gprT1, 3);
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xAND(gprT1, mVU.microMemSize - 8);
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xMOV(ptr32[&mVU.branch], gprT1);
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if (!mVUlow.evilBranch) xMOV(ptr32[&mVU.branch], gprT1);
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if (!mVUlow.evilBranch) xMOV(ptr32[&mVU.branch], gprT1);
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else xMOV(ptr32[&mVU.evilBranch], gprT1);
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if (mVUlow.badBranch) {
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xADD(gprT1, 8);
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@ -227,6 +227,7 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
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#define shuffleSS(x) ((x==1)?(0x27):((x==2)?(0xc6):((x==4)?(0xe1):(0xe4))))
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#define clampE CHECK_VU_EXTRA_OVERFLOW
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#define elif else if
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#define varPrint(x) DevCon.WriteLn(#x " = %d", (int)x)
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#define branchAddr ( \
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pxAssumeDev((iPC & 1) == 0, "microVU: Expected Lower Op for valid branch addr."), \
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