mirror of https://github.com/PCSX2/pcsx2.git
pcsx2: got rid of the compile warning.
microVU: minor changes/cleanup. git-svn-id: http://pcsx2.googlecode.com/svn/trunk@811 96395faa-99c1-11dd-bbfe-3dabce05a288
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d1ae92e203
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@ -109,7 +109,7 @@ namespace Threading
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__forceinline long pcsx2_InterlockedExchangeAdd( volatile long* target, long srcval )
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{
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long result;
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//long result;
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// Use our own implementation...
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// Pcsx2 won't use threads unless it's a multicore cpu, so no need to use
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@ -29,37 +29,7 @@
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PCSX2_ALIGNED16(microVU microVU0);
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PCSX2_ALIGNED16(microVU microVU1);
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PCSX2_ALIGNED16(const u32 mVU_absclip[4]) = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
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PCSX2_ALIGNED16(const u32 mVU_signbit[4]) = {0x80000000, 0x80000000, 0x80000000, 0x80000000};
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PCSX2_ALIGNED16(const u32 mVU_minvals[4]) = {0xff7fffff, 0xff7fffff, 0xff7fffff, 0xff7fffff};
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PCSX2_ALIGNED16(const u32 mVU_maxvals[4]) = {0x7f7fffff, 0x7f7fffff, 0x7f7fffff, 0x7f7fffff};
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PCSX2_ALIGNED16(const u32 mVU_one[4]) = {0x3f800000, 0x3f800000, 0x3f800000, 0x3f800000};
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PCSX2_ALIGNED16(const u32 mVU_T1[4]) = {0x3f7ffff5, 0x3f7ffff5, 0x3f7ffff5, 0x3f7ffff5};
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PCSX2_ALIGNED16(const u32 mVU_T2[4]) = {0xbeaaa61c, 0xbeaaa61c, 0xbeaaa61c, 0xbeaaa61c};
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PCSX2_ALIGNED16(const u32 mVU_T3[4]) = {0x3e4c40a6, 0x3e4c40a6, 0x3e4c40a6, 0x3e4c40a6};
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PCSX2_ALIGNED16(const u32 mVU_T4[4]) = {0xbe0e6c63, 0xbe0e6c63, 0xbe0e6c63, 0xbe0e6c63};
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PCSX2_ALIGNED16(const u32 mVU_T5[4]) = {0x3dc577df, 0x3dc577df, 0x3dc577df, 0x3dc577df};
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PCSX2_ALIGNED16(const u32 mVU_T6[4]) = {0xbd6501c4, 0xbd6501c4, 0xbd6501c4, 0xbd6501c4};
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PCSX2_ALIGNED16(const u32 mVU_T7[4]) = {0x3cb31652, 0x3cb31652, 0x3cb31652, 0x3cb31652};
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PCSX2_ALIGNED16(const u32 mVU_T8[4]) = {0xbb84d7e7, 0xbb84d7e7, 0xbb84d7e7, 0xbb84d7e7};
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PCSX2_ALIGNED16(const u32 mVU_Pi4[4]) = {0x3f490fdb, 0x3f490fdb, 0x3f490fdb, 0x3f490fdb};
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PCSX2_ALIGNED16(const u32 mVU_S2[4]) = {0xbe2aaaa4, 0xbe2aaaa4, 0xbe2aaaa4, 0xbe2aaaa4};
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PCSX2_ALIGNED16(const u32 mVU_S3[4]) = {0x3c08873e, 0x3c08873e, 0x3c08873e, 0x3c08873e};
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PCSX2_ALIGNED16(const u32 mVU_S4[4]) = {0xb94fb21f, 0xb94fb21f, 0xb94fb21f, 0xb94fb21f};
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PCSX2_ALIGNED16(const u32 mVU_S5[4]) = {0x362e9c14, 0x362e9c14, 0x362e9c14, 0x362e9c14};
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PCSX2_ALIGNED16(const u32 mVU_E1[4]) = {0x3e7fffa8, 0x3e7fffa8, 0x3e7fffa8, 0x3e7fffa8};
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PCSX2_ALIGNED16(const u32 mVU_E2[4]) = {0x3d0007f4, 0x3d0007f4, 0x3d0007f4, 0x3d0007f4};
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PCSX2_ALIGNED16(const u32 mVU_E3[4]) = {0x3b29d3ff, 0x3b29d3ff, 0x3b29d3ff, 0x3b29d3ff};
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PCSX2_ALIGNED16(const u32 mVU_E4[4]) = {0x3933e553, 0x3933e553, 0x3933e553, 0x3933e553};
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PCSX2_ALIGNED16(const u32 mVU_E5[4]) = {0x36b63510, 0x36b63510, 0x36b63510, 0x36b63510};
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PCSX2_ALIGNED16(const u32 mVU_E6[4]) = {0x353961ac, 0x353961ac, 0x353961ac, 0x353961ac};
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PCSX2_ALIGNED16(const float mVU_FTOI_4[4]) = {16.0, 16.0, 16.0, 16.0};
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PCSX2_ALIGNED16(const float mVU_FTOI_12[4]) = {4096.0, 4096.0, 4096.0, 4096.0};
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PCSX2_ALIGNED16(const float mVU_FTOI_15[4]) = {32768.0, 32768.0, 32768.0, 32768.0};
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PCSX2_ALIGNED16(const float mVU_ITOF_4[4]) = {0.0625f, 0.0625f, 0.0625f, 0.0625f};
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PCSX2_ALIGNED16(const float mVU_ITOF_12[4]) = {0.000244140625, 0.000244140625, 0.000244140625, 0.000244140625};
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PCSX2_ALIGNED16(const float mVU_ITOF_15[4]) = {0.000030517578125, 0.000030517578125, 0.000030517578125, 0.000030517578125};
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declareAllVariables // Declares All Global Variables :D
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//------------------------------------------------------------------
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// Micro VU - Main Functions
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//------------------------------------------------------------------
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@ -31,7 +31,7 @@ struct microBlock {
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u8* x86ptrStart; // Start of code
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u8* x86ptrEnd; // End of code (first byte outside of block)
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u8* x86ptrBranch; //
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//u32 size;
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u32 size; // Number of 64bit VU Instructions in Block
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};
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#define mMaxBlocks 32 // Max Blocks With Different Pipeline States (For n = 1, 2, 4, 8, 16, etc...)
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@ -56,7 +56,7 @@ microVUf(void) mVU_DIV() {
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SSE_XORPS_XMM_to_XMM(xmmFs, xmmFt);
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SSE_ANDPS_M128_to_XMM(xmmFs, (uptr)mVU_signbit);
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SSE_ORPS_M128_to_XMM(xmmFs, (uptr)mVU_maxvals); // If division by zero, then xmmFs = +/- fmax
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SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // If division by zero, then xmmFs = +/- fmax
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bjmp32 = JMP32(0);
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x86SetJ32(ajmp32);
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@ -86,7 +86,7 @@ microVUf(void) mVU_SQRT() {
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//x86SetJ8(pjmp);
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SSE_ANDPS_M128_to_XMM(xmmFt, (uptr)mVU_absclip); // Do a cardinal sqrt
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if (CHECK_VU_OVERFLOW) SSE_MINSS_M32_to_XMM(xmmFt, (uptr)mVU_maxvals); // Clamp infinities (only need to do positive clamp since xmmFt is positive)
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if (CHECK_VU_OVERFLOW) SSE_MINSS_XMM_to_XMM(xmmFt, xmmMax); // Clamp infinities (only need to do positive clamp since xmmFt is positive)
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SSE_SQRTSS_XMM_to_XMM(xmmFt, xmmFt);
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mVUunpack_xyzw<vuIndex>(xmmFt, xmmFt, 0);
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mVUmergeRegs<vuIndex>(xmmPQ, xmmFt, writeQ ? 4 : 8);
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@ -122,7 +122,7 @@ microVUf(void) mVU_RSQRT() {
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ajmp8 = JZ8(0); // Skip if none are
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//OR32ItoM(VU_VI_ADDR(REG_STATUS_FLAG, 2), 0x820); // Zero divide flag
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SSE_ANDPS_M128_to_XMM(xmmFs, (uptr)mVU_signbit);
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SSE_ORPS_M128_to_XMM(xmmFs, (uptr)mVU_maxvals); // EEREC_TEMP = +/-Max
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SSE_ORPS_XMM_to_XMM(xmmFs, xmmMax); // EEREC_TEMP = +/-Max
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bjmp8 = JMP8(0);
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x86SetJ8(ajmp8);
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SSE_DIVSS_XMM_to_XMM(xmmFs, xmmFt);
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@ -22,35 +22,46 @@
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// Global Variables
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//------------------------------------------------------------------
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_absclip[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_signbit[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_minvals[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_maxvals[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T1[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T2[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T3[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T4[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T5[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T6[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T7[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_T8[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_Pi4[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_S2[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_S3[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_S4[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_S5[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_E1[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_E2[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_E3[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_E4[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_E5[4]);
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PCSX2_ALIGNED16_EXTERN(const u32 mVU_E6[4]);
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PCSX2_ALIGNED16_EXTERN(const float mVU_FTOI_4[4]);
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PCSX2_ALIGNED16_EXTERN(const float mVU_FTOI_12[4]);
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PCSX2_ALIGNED16_EXTERN(const float mVU_FTOI_15[4]);
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PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_4[4]);
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PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_12[4]);
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PCSX2_ALIGNED16_EXTERN(const float mVU_ITOF_15[4]);
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#define declareAllVariables \
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initVariable( _somePrefix_, u32, mVU_absclip, 0x7fffffff ); \
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initVariable( _somePrefix_, u32, mVU_signbit, 0x80000000 ); \
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initVariable( _somePrefix_, u32, mVU_minvals, 0xff7fffff ); \
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initVariable( _somePrefix_, u32, mVU_maxvals, 0x7f7fffff ); \
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initVariable( _somePrefix_, u32, mVU_one, 0x3f800000 ); \
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initVariable( _somePrefix_, u32, mVU_T1, 0x3f7ffff5 ); \
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initVariable( _somePrefix_, u32, mVU_T2, 0xbeaaa61c ); \
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initVariable( _somePrefix_, u32, mVU_T3, 0x3e4c40a6 ); \
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initVariable( _somePrefix_, u32, mVU_T4, 0xbe0e6c63 ); \
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initVariable( _somePrefix_, u32, mVU_T5, 0x3dc577df ); \
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initVariable( _somePrefix_, u32, mVU_T6, 0xbd6501c4 ); \
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initVariable( _somePrefix_, u32, mVU_T7, 0x3cb31652 ); \
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initVariable( _somePrefix_, u32, mVU_T8, 0xbb84d7e7 ); \
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initVariable( _somePrefix_, u32, mVU_Pi4, 0x3f490fdb ); \
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initVariable( _somePrefix_, u32, mVU_S2, 0xbe2aaaa4 ); \
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initVariable( _somePrefix_, u32, mVU_S3, 0x3c08873e ); \
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initVariable( _somePrefix_, u32, mVU_S4, 0xb94fb21f ); \
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initVariable( _somePrefix_, u32, mVU_S5, 0x362e9c14 ); \
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initVariable( _somePrefix_, u32, mVU_E1, 0x3e7fffa8 ); \
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initVariable( _somePrefix_, u32, mVU_E2, 0x3d0007f4 ); \
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initVariable( _somePrefix_, u32, mVU_E3, 0x3b29d3ff ); \
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initVariable( _somePrefix_, u32, mVU_E4, 0x3933e553 ); \
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initVariable( _somePrefix_, u32, mVU_E5, 0x36b63510 ); \
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initVariable( _somePrefix_, u32, mVU_E6, 0x353961ac ); \
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initVariable( _somePrefix_, float, mVU_FTOI_4, 16.0 ); \
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initVariable( _somePrefix_, float, mVU_FTOI_12, 4096.0 ); \
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initVariable( _somePrefix_, float, mVU_FTOI_15, 32768.0 ); \
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initVariable( _somePrefix_, float, mVU_ITOF_4, 0.0625f ); \
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initVariable( _somePrefix_, float, mVU_ITOF_12, 0.000244140625 ); \
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initVariable( _somePrefix_, float, mVU_ITOF_15, 0.000030517578125 );
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#define _somePrefix_ PCSX2_ALIGNED16_EXTERN
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#define initVariable(aprefix, atype, aname, avalue) aprefix (const atype aname [4]);
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declareAllVariables
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#undef _somePrefix_
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#undef initVariable
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#define _somePrefix_ PCSX2_ALIGNED16
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#define initVariable(aprefix, atype, aname, avalue) aprefix (const atype aname [4]) = {avalue, avalue, avalue, avalue};
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//------------------------------------------------------------------
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// Helper Macros
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#define _writeQ (1<<5)
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#define _readQ (1<<6)
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#define _writeP (1<<7)
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#define _readP (1<<7)
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#define _readP (1<<7) // same as writeP
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#define _doFlags (3<<8)
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#define _doMac (1<<8)
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#define _doStatus (1<<9)
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#define isBranch (mVUinfo & (1<<1))
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#define isEOB (mVUinfo & (1<<2))
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#define isBdelay (mVUinfo & (1<<3))
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#define writeQ ((mVUinfo & (1<<5)) >> 5)
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#define readQ ((mVUinfo & (1<<6)) >> 6)
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#define writeP ((mVUinfo & (1<<7)) >> 7)
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#define readP ((mVUinfo & (1<<7)) >> 7) // same as write
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#define writeQ ((mVUinfo >> 5) & 1)
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#define readQ ((mVUinfo >> 6) & 1)
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#define writeP ((mVUinfo >> 7) & 1)
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#define readP ((mVUinfo >> 7) & 1) // same as writeP
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#define doFlags (mVUinfo & (3<<8))
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#define doMac (mVUinfo & (1<<8))
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#define doStatus (mVUinfo & (1<<9))
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#define fmInstance ((mVUinfo & (3<<10)) >> 10)
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#define fsInstance ((mVUinfo & (3<<12)) >> 12)
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#define fcInstance ((mVUinfo & (3<<14)) >> 14)
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#define fpmInstance (((u8)((mVUinfo & (3<<10)) >> 10) - 1) & 0x3)
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#define fpsInstance (((u8)((mVUinfo & (3<<12)) >> 12) - 1) & 0x3)
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#define fvmInstance ((mVUinfo & (3<<16)) >> 16)
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#define fvsInstance ((mVUinfo & (3<<18)) >> 18)
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#define fvcInstance ((mVUinfo & (3<<14)) >> 14)
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#define fmInstance ((mVUinfo >> 10) & 3)
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#define fsInstance ((mVUinfo >> 12) & 3)
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#define fpsInstance ((((mVUinfo>>12) & 3) - 1) & 0x3)
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#define fcInstance ((mVUinfo >> 14) & 3)
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#define fvcInstance ((mVUinfo >> 14) & 3)
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#define fvmInstance ((mVUinfo >> 16) & 3)
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#define fvsInstance ((mVUinfo >> 18) & 3)
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//#define getFs (mVUinfo & (1<<13))
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//#define getFt (mVUinfo & (1<<14))
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//#define fpmInstance (((u8)((mVUinfo & (3<<10)) >> 10) - 1) & 0x3)
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#define isMMX(_VIreg_) (_VIreg_ >= 1 && _VIreg_ <=9)
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#define mmVI(_VIreg_) (_VIreg_ - 1)
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