mirror of https://github.com/PCSX2/pcsx2.git
x86emitter: extend SSE instruction type
This commit is contained in:
Gregory Hainaut
parent
4bc9cbc24f
commit
968af6148e
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@ -336,16 +336,16 @@ namespace x86Emitter
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extern void xFXSAVE( const xIndirectVoid& dest );
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extern void xFXRSTOR( const xIndirectVoid& src );
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extern void xMOVDZX( const xRegisterSSE& to, const xRegister32& from );
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extern void xMOVDZX( const xRegisterSSE& to, const xRegister32or64& from );
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extern void xMOVDZX( const xRegisterSSE& to, const xIndirectVoid& src );
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extern void xMOVDZX( const xRegisterMMX& to, const xRegister32& from );
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extern void xMOVDZX( const xRegisterMMX& to, const xRegister32or64& from );
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extern void xMOVDZX( const xRegisterMMX& to, const xIndirectVoid& src );
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extern void xMOVD( const xRegister32& to, const xRegisterSSE& from );
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extern void xMOVD( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xMOVD( const xIndirectVoid& dest, const xRegisterSSE& from );
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extern void xMOVD( const xRegister32& to, const xRegisterMMX& from );
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extern void xMOVD( const xRegister32or64& to, const xRegisterMMX& from );
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extern void xMOVD( const xIndirectVoid& dest, const xRegisterMMX& from );
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extern void xMOVQ( const xRegisterMMX& to, const xRegisterMMX& from );
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@ -374,13 +374,13 @@ namespace x86Emitter
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extern void xMOVNTPS( const xIndirectVoid& to, const xRegisterSSE& from );
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extern void xMOVNTQ( const xIndirectVoid& to, const xRegisterMMX& from );
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extern void xMOVMSKPS( const xRegister32& to, const xRegisterSSE& from );
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extern void xMOVMSKPD( const xRegister32& to, const xRegisterSSE& from );
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extern void xMOVMSKPS( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xMOVMSKPD( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xMASKMOV( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xMASKMOV( const xRegisterMMX& to, const xRegisterMMX& from );
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extern void xPMOVMSKB( const xRegister32& to, const xRegisterSSE& from );
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extern void xPMOVMSKB( const xRegister32& to, const xRegisterMMX& from );
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extern void xPMOVMSKB( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xPMOVMSKB( const xRegister32or64& to, const xRegisterMMX& from );
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extern void xPALIGNR( const xRegisterSSE& to, const xRegisterSSE& from, u8 imm8 );
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extern void xPALIGNR( const xRegisterMMX& to, const xRegisterMMX& from, u8 imm8 );
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@ -414,7 +414,7 @@ namespace x86Emitter
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extern void xINSERTPS( const xRegisterSSE& to, const xRegisterSSE& from, u8 imm8 );
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extern void xINSERTPS( const xRegisterSSE& to, const xIndirect32& from, u8 imm8 );
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extern void xEXTRACTPS( const xRegister32& to, const xRegisterSSE& from, u8 imm8 );
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extern void xEXTRACTPS( const xRegister32or64& to, const xRegisterSSE& from, u8 imm8 );
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extern void xEXTRACTPS( const xIndirect32& dest, const xRegisterSSE& from, u8 imm8 );
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// ------------------------------------------------------------------------
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@ -472,19 +472,19 @@ namespace x86Emitter
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extern void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from );
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extern void xCVTPS2PI( const xRegisterMMX& to, const xIndirect64& from );
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extern void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTSD2SI( const xRegister32& to, const xIndirect64& from );
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extern void xCVTSD2SI( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xCVTSD2SI( const xRegister32or64& to, const xIndirect64& from );
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extern void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTSD2SS( const xRegisterSSE& to, const xIndirect64& from );
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extern void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from );
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extern void xCVTSI2SD( const xRegisterMMX& to, const xRegister32or64& from );
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extern void xCVTSI2SD( const xRegisterMMX& to, const xIndirect32& from );
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extern void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from );
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extern void xCVTSI2SS( const xRegisterSSE& to, const xRegister32or64& from );
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extern void xCVTSI2SS( const xRegisterSSE& to, const xIndirect32& from );
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extern void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTSS2SD( const xRegisterSSE& to, const xIndirect32& from );
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extern void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTSS2SI( const xRegister32& to, const xIndirect32& from );
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extern void xCVTSS2SI( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xCVTSS2SI( const xRegister32or64& to, const xIndirect32& from );
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extern void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from );
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extern void xCVTTPD2DQ( const xRegisterSSE& to, const xIndirect128& from );
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@ -495,10 +495,10 @@ namespace x86Emitter
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extern void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from );
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extern void xCVTTPS2PI( const xRegisterMMX& to, const xIndirect64& from );
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extern void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTTSD2SI( const xRegister32& to, const xIndirect64& from );
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extern void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from );
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extern void xCVTTSS2SI( const xRegister32& to, const xIndirect32& from );
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extern void xCVTTSD2SI( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xCVTTSD2SI( const xRegister32or64& to, const xIndirect64& from );
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extern void xCVTTSS2SI( const xRegister32or64& to, const xRegisterSSE& from );
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extern void xCVTTSS2SI( const xRegister32or64& to, const xIndirect32& from );
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// ------------------------------------------------------------------------
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@ -159,19 +159,19 @@ __fi void xCVTPS2PD( const xRegisterSSE& to, const xIndirect64& from ) { OpWrit
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__fi void xCVTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2d ); }
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__fi void xCVTPS2PI( const xRegisterMMX& to, const xIndirect64& from ) { OpWriteSSE( 0x00, 0x2d ); }
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__fi void xCVTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2d ); }
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__fi void xCVTSD2SI( const xRegister32& to, const xIndirect64& from ) { OpWriteSSE( 0xf2, 0x2d ); }
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__fi void xCVTSD2SI( const xRegister32or64& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2d ); }
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__fi void xCVTSD2SI( const xRegister32or64& to, const xIndirect64& from ) { OpWriteSSE( 0xf2, 0x2d ); }
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__fi void xCVTSD2SS( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x5a ); }
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__fi void xCVTSD2SS( const xRegisterSSE& to, const xIndirect64& from ) { OpWriteSSE( 0xf2, 0x5a ); }
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__fi void xCVTSI2SD( const xRegisterMMX& to, const xRegister32& from ) { OpWriteSSE( 0xf2, 0x2a ); }
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__fi void xCVTSI2SD( const xRegisterMMX& to, const xRegister32or64& from ) { OpWriteSSE( 0xf2, 0x2a ); }
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__fi void xCVTSI2SD( const xRegisterMMX& to, const xIndirect32& from ) { OpWriteSSE( 0xf2, 0x2a ); }
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__fi void xCVTSI2SS( const xRegisterSSE& to, const xRegister32& from ) { OpWriteSSE( 0xf3, 0x2a ); }
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__fi void xCVTSI2SS( const xRegisterSSE& to, const xRegister32or64& from ) { OpWriteSSE( 0xf3, 0x2a ); }
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__fi void xCVTSI2SS( const xRegisterSSE& to, const xIndirect32& from ) { OpWriteSSE( 0xf3, 0x2a ); }
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__fi void xCVTSS2SD( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x5a ); }
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__fi void xCVTSS2SD( const xRegisterSSE& to, const xIndirect32& from ) { OpWriteSSE( 0xf3, 0x5a ); }
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__fi void xCVTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2d ); }
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__fi void xCVTSS2SI( const xRegister32& to, const xIndirect32& from ) { OpWriteSSE( 0xf3, 0x2d ); }
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__fi void xCVTSS2SI( const xRegister32or64& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2d ); }
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__fi void xCVTSS2SI( const xRegister32or64& to, const xIndirect32& from ) { OpWriteSSE( 0xf3, 0x2d ); }
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__fi void xCVTTPD2DQ( const xRegisterSSE& to, const xRegisterSSE& from ) { OpWriteSSE( 0x66, 0xe6 ); }
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__fi void xCVTTPD2DQ( const xRegisterSSE& to, const xIndirect128& from ) { OpWriteSSE( 0x66, 0xe6 ); }
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@ -182,10 +182,10 @@ __fi void xCVTTPS2DQ( const xRegisterSSE& to, const xIndirect128& from ) { OpWr
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__fi void xCVTTPS2PI( const xRegisterMMX& to, const xRegisterSSE& from ) { OpWriteSSE( 0x00, 0x2c ); }
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__fi void xCVTTPS2PI( const xRegisterMMX& to, const xIndirect64& from ) { OpWriteSSE( 0x00, 0x2c ); }
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__fi void xCVTTSD2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2c ); }
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__fi void xCVTTSD2SI( const xRegister32& to, const xIndirect64& from ) { OpWriteSSE( 0xf2, 0x2c ); }
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__fi void xCVTTSS2SI( const xRegister32& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2c ); }
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__fi void xCVTTSS2SI( const xRegister32& to, const xIndirect32& from ) { OpWriteSSE( 0xf3, 0x2c ); }
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__fi void xCVTTSD2SI( const xRegister32or64& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf2, 0x2c ); }
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__fi void xCVTTSD2SI( const xRegister32or64& to, const xIndirect64& from ) { OpWriteSSE( 0xf2, 0x2c ); }
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__fi void xCVTTSS2SI( const xRegister32or64& to, const xRegisterSSE& from ) { OpWriteSSE( 0xf3, 0x2c ); }
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__fi void xCVTTSS2SI( const xRegister32or64& to, const xIndirect32& from ) { OpWriteSSE( 0xf3, 0x2c ); }
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// ------------------------------------------------------------------------
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@ -685,16 +685,16 @@ const xImplSimd_DestRegSSE xMOVSHDUP = { 0xf3,0x16 };
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// * MOVD has valid forms for MMX and XMM registers.
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//
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__fi void xMOVDZX( const xRegisterSSE& to, const xRegister32& from ) { xOpWrite0F( 0x66, 0x6e, to, from ); }
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__fi void xMOVDZX( const xRegisterSSE& to, const xRegister32or64& from ) { xOpWrite0F( 0x66, 0x6e, to, from ); }
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__fi void xMOVDZX( const xRegisterSSE& to, const xIndirectVoid& src ) { xOpWrite0F( 0x66, 0x6e, to, src ); }
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__fi void xMOVDZX( const xRegisterMMX& to, const xRegister32& from ) { xOpWrite0F( 0x6e, to, from ); }
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__fi void xMOVDZX( const xRegisterMMX& to, const xRegister32or64& from ) { xOpWrite0F( 0x6e, to, from ); }
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__fi void xMOVDZX( const xRegisterMMX& to, const xIndirectVoid& src ) { xOpWrite0F( 0x6e, to, src ); }
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__fi void xMOVD( const xRegister32& to, const xRegisterSSE& from ) { xOpWrite0F( 0x66, 0x7e, from, to ); }
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__fi void xMOVD( const xRegister32or64& to, const xRegisterSSE& from ) { xOpWrite0F( 0x66, 0x7e, from, to ); }
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__fi void xMOVD( const xIndirectVoid& dest, const xRegisterSSE& from ) { xOpWrite0F( 0x66, 0x7e, from, dest ); }
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__fi void xMOVD( const xRegister32& to, const xRegisterMMX& from ) { xOpWrite0F( 0x7e, from, to ); }
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__fi void xMOVD( const xRegister32or64& to, const xRegisterMMX& from ) { xOpWrite0F( 0x7e, from, to ); }
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__fi void xMOVD( const xIndirectVoid& dest, const xRegisterMMX& from ) { xOpWrite0F( 0x7e, from, dest ); }
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@ -760,8 +760,8 @@ __fi void xMOVNTQ( const xIndirectVoid& to, const xRegisterMMX& from ) { xOpWrit
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// ------------------------------------------------------------------------
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__fi void xMOVMSKPS( const xRegister32& to, const xRegisterSSE& from) { xOpWrite0F( 0x50, to, from ); }
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__fi void xMOVMSKPD( const xRegister32& to, const xRegisterSSE& from) { xOpWrite0F( 0x66, 0x50, to, from, true ); }
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__fi void xMOVMSKPS( const xRegister32or64& to, const xRegisterSSE& from) { xOpWrite0F( 0x50, to, from ); }
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__fi void xMOVMSKPD( const xRegister32or64& to, const xRegisterSSE& from) { xOpWrite0F( 0x66, 0x50, to, from, true ); }
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// xMASKMOV:
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// Selectively write bytes from mm1/xmm1 to memory location using the byte mask in mm2/xmm2.
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@ -779,8 +779,8 @@ __fi void xMASKMOV( const xRegisterMMX& to, const xRegisterMMX& from ) { xOpWri
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// When operating on a 64-bit (MMX) source, the byte mask is 8 bits; when operating on
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// 128-bit (SSE) source, the byte mask is 16-bits.
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//
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__fi void xPMOVMSKB( const xRegister32& to, const xRegisterSSE& from ) { xOpWrite0F( 0x66, 0xd7, to, from ); }
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__fi void xPMOVMSKB( const xRegister32& to, const xRegisterMMX& from ) { xOpWrite0F( 0xd7, to, from ); }
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__fi void xPMOVMSKB( const xRegister32or64& to, const xRegisterSSE& from ) { xOpWrite0F( 0x66, 0xd7, to, from ); }
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__fi void xPMOVMSKB( const xRegister32or64& to, const xRegisterMMX& from ) { xOpWrite0F( 0xd7, to, from ); }
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// [sSSE-3] Concatenates dest and source operands into an intermediate composite,
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// shifts the composite at byte granularity to the right by a constant immediate,
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@ -816,7 +816,7 @@ __emitinline void xINSERTPS( const xRegisterSSE& to, const xIndirect32& from, u8
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// determined by imm8[1-0]*32. The extracted single precision floating-point value
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// is stored into the low 32-bits of dest (or at a 32-bit memory pointer).
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//
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__emitinline void xEXTRACTPS( const xRegister32& to, const xRegisterSSE& from, u8 imm8 ) { xOpWrite0F( 0x66, 0x173a, to, from, imm8 ); }
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__emitinline void xEXTRACTPS( const xRegister32or64& to, const xRegisterSSE& from, u8 imm8 ) { xOpWrite0F( 0x66, 0x173a, to, from, imm8 ); }
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__emitinline void xEXTRACTPS( const xIndirect32& dest, const xRegisterSSE& from, u8 imm8 ) { xOpWrite0F( 0x66, 0x173a, from, dest, imm8 ); }
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