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EE: Fixed my use of ebx in a load/store implementation (reserved for return address) and changed _deleteEEreg to do what it says when also flushing and changed most uses of _deleteEEreg with the flush parameter set to 1 to _flushEEreg. May introduce or fix bugs. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@4801 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1@gmail.com 2011-07-08 06:18:25 +00:00
parent af2cc2663a
commit 93163f988d
4 changed files with 59 additions and 63 deletions
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8
pcsx2/x86/ix86-32/iR5900Branch.cpp
View File

@ -563,7 +563,7 @@ void recBLEZ( void )
return; return;
} }
_deleteEEreg(_Rs_, 1); _flushEEreg(_Rs_);
CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 );
j8Ptr[ 0 ] = JL8( 0 ); j8Ptr[ 0 ] = JL8( 0 );
@ -609,7 +609,7 @@ void recBGTZ( void )
return; return;
} }
_deleteEEreg(_Rs_, 1); _flushEEreg(_Rs_);
CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 );
j8Ptr[ 0 ] = JG8( 0 ); j8Ptr[ 0 ] = JG8( 0 );
@ -791,7 +791,7 @@ void recBLEZL( void )
return; return;
} }
_deleteEEreg(_Rs_, 1); _flushEEreg(_Rs_);
CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 );
j32Ptr[ 0 ] = JL32( 0 ); j32Ptr[ 0 ] = JL32( 0 );
@ -835,7 +835,7 @@ void recBGTZL( void )
return; return;
} }
_deleteEEreg(_Rs_, 1); _flushEEreg(_Rs_);
CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 ); CMP32ItoM( (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], 0 );
j32Ptr[ 0 ] = JG32( 0 ); j32Ptr[ 0 ] = JG32( 0 );

100
pcsx2/x86/ix86-32/iR5900LoadStore.cpp
View File

@ -216,7 +216,7 @@ void recStore(u32 sz, bool edxAlreadyAssigned=false)
} }
else if (sz==128 || sz==64) else if (sz==128 || sz==64)
{ {
_deleteEEreg(_Rt_, 1); // flush register to mem _flushEEreg(_Rt_); // flush register to mem
MOV32ItoR(EDX,(int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); MOV32ItoR(EDX,(int)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]);
} }
} }
@ -281,23 +281,23 @@ void recLWL( void )
if (_Imm_ != 0) if (_Imm_ != 0)
xADD(ecx, _Imm_); xADD(ecx, _Imm_);
// ebx = bit offset in word // edi = bit offset in word
xMOV(ebx, ecx); xMOV(edi, ecx);
xAND(ebx, 0x3); xAND(edi, 3);
xSHL(ebx, 3); xSHL(edi, 3);
xAND(ecx, ~0x3); xAND(ecx, ~3);
vtlb_DynGenRead32(32, true); vtlb_DynGenRead32(32, true);
// mask off bytes loaded // mask off bytes loaded
xMOV(ecx, ebx); xMOV(ecx, edi);
xMOV(edx, 0xffffff); xMOV(edx, 0xffffff);
xSHR(edx, cl); xSHR(edx, cl);
xAND(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], edx); xAND(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], edx);
// OR in bytes loaded // OR in bytes loaded
xMOV(ecx, 24); xMOV(ecx, 24);
xSUB(ecx, ebx); xSUB(ecx, edi);
xSHL(eax, cl); xSHL(eax, cl);
xOR(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], eax); xOR(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], eax);
@ -326,27 +326,27 @@ void recLWR(void)
if (_Imm_ != 0) if (_Imm_ != 0)
xADD(ecx, _Imm_); xADD(ecx, _Imm_);
// ebx = bit offset in word // edi = bit offset in word
xMOV(ebx, ecx); xMOV(edi, ecx);
xAND(ebx, 0x3); xAND(edi, 3);
xSHL(ebx, 3); xSHL(edi, 3);
xAND(ecx,~0x3); xAND(ecx, ~3);
vtlb_DynGenRead32(32, true); vtlb_DynGenRead32(32, true);
// mask off bytes loaded // mask off bytes loaded
xMOV(ecx, 24); xMOV(ecx, 24);
xSUB(ecx, ebx); xSUB(ecx, edi);
xMOV(edx, 0xffffff00); xMOV(edx, 0xffffff00);
xSHL(edx, cl); xSHL(edx, cl);
xAND(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], edx); xAND(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], edx);
// OR in bytes loaded // OR in bytes loaded
xMOV(ecx, ebx); xMOV(ecx, edi);
xSHR(eax, cl); xSHR(eax, cl);
xOR(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], eax); xOR(ptr32[&cpuRegs.GPR.r[_Rt_].UL[0]], eax);
xCMP(ebx, 0); xCMP(edi, 0);
xForwardJump8 nosignextend(Jcc_NotEqual); xForwardJump8 nosignextend(Jcc_NotEqual);
// if ((addr & 3) == 0) // if ((addr & 3) == 0)
xCDQ(); xCDQ();
@ -371,18 +371,16 @@ void recSWL(void)
if (_Imm_ != 0) if (_Imm_ != 0)
xADD(ecx, _Imm_); xADD(ecx, _Imm_);
// ebx = bit offset in word // edi = bit offset in word
xMOV(ebx, ecx);
xAND(ebx, 0x3);
xSHL(ebx, 3);
xAND(ecx, ~0x3);
// edi = word address
xMOV(edi, ecx); xMOV(edi, ecx);
xAND(edi, 3);
xSHL(edi, 3);
xAND(ecx, ~3);
vtlb_DynGenRead32(32, false); vtlb_DynGenRead32(32, false);
// mask read -> edx // mask read -> edx
xMOV(ecx, ebx); xMOV(ecx, edi);
xMOV(edx, 0xffffff00); xMOV(edx, 0xffffff00);
xSHL(edx, cl); xSHL(edx, cl);
xAND(edx, eax); xAND(edx, eax);
@ -391,13 +389,17 @@ void recSWL(void)
{ {
// mask write and OR -> edx // mask write and OR -> edx
xMOV(ecx, 24); xMOV(ecx, 24);
xSUB(ecx, ebx); xSUB(ecx, edi);
_eeMoveGPRtoR(EAX, _Rt_); _eeMoveGPRtoR(EAX, _Rt_);
xSHR(eax, cl); xSHR(eax, cl);
xOR(edx, eax); xOR(edx, eax);
} }
xMOV(ecx, edi); _eeMoveGPRtoR(ECX, _Rs_);
if (_Imm_ != 0)
xADD(ecx, _Imm_);
xAND(ecx, ~3);
vtlb_DynGenWrite(32); vtlb_DynGenWrite(32);
#else #else
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
@ -417,19 +419,17 @@ void recSWR(void)
if (_Imm_ != 0) if (_Imm_ != 0)
xADD(ecx, _Imm_); xADD(ecx, _Imm_);
// ebx = bit offset in word // edi = bit offset in word
xMOV(ebx, ecx);
xAND(ebx, 0x3);
xSHL(ebx, 3);
xAND(ecx, ~0x3);
// edi = word address
xMOV(edi, ecx); xMOV(edi, ecx);
xAND(edi, 3);
xSHL(edi, 3);
xAND(ecx, ~3);
vtlb_DynGenRead32(32, false); vtlb_DynGenRead32(32, false);
// mask read -> edx // mask read -> edx
xMOV(ecx, 24); xMOV(ecx, 24);
xSUB(ecx, ebx); xSUB(ecx, edi);
xMOV(edx, 0xffffff); xMOV(edx, 0xffffff);
xSHR(edx, cl); xSHR(edx, cl);
xAND(edx, eax); xAND(edx, eax);
@ -437,13 +437,17 @@ void recSWR(void)
if(_Rt_) if(_Rt_)
{ {
// mask write and OR -> edx // mask write and OR -> edx
xMOV(ecx, ebx); xMOV(ecx, edi);
_eeMoveGPRtoR(EAX, _Rt_); _eeMoveGPRtoR(EAX, _Rt_);
xSHL(eax, cl); xSHL(eax, cl);
xOR(edx, eax); xOR(edx, eax);
} }
xMOV(ecx, edi); _eeMoveGPRtoR(ECX, _Rs_);
if (_Imm_ != 0)
xADD(ecx, _Imm_);
xAND(ecx, ~3);
vtlb_DynGenWrite(32); vtlb_DynGenWrite(32);
#else #else
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
@ -506,7 +510,6 @@ void recLWC1( void )
{ {
#ifdef NEWLWC1 #ifdef NEWLWC1
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteFPtoXMMreg(_Rt_, 2); _deleteFPtoXMMreg(_Rt_, 2);
if( GPR_IS_CONST1( _Rs_ ) ) if( GPR_IS_CONST1( _Rs_ ) )
@ -516,7 +519,7 @@ void recLWC1( void )
} }
else else
{ {
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_ ); ADD32ItoR( ECX, _Imm_ );
vtlb_DynGenRead32(32, false); vtlb_DynGenRead32(32, false);
@ -525,10 +528,9 @@ void recLWC1( void )
MOV32RtoM( (int)&fpuRegs.fpr[ _Rt_ ].UL, EAX ); MOV32RtoM( (int)&fpuRegs.fpr[ _Rt_ ].UL, EAX );
#else #else
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteFPtoXMMreg(_Rt_, 2); _deleteFPtoXMMreg(_Rt_, 2);
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_ ); ADD32ItoR( ECX, _Imm_ );
@ -543,7 +545,6 @@ void recSWC1( void )
{ {
#ifdef NEWSWC #ifdef NEWSWC
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteFPtoXMMreg(_Rt_, 1); _deleteFPtoXMMreg(_Rt_, 1);
MOV32MtoR(EDX, (int)&fpuRegs.fpr[ _Rt_ ].UL ); MOV32MtoR(EDX, (int)&fpuRegs.fpr[ _Rt_ ].UL );
@ -555,17 +556,16 @@ void recSWC1( void )
} }
else else
{ {
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_ ); ADD32ItoR( ECX, _Imm_ );
vtlb_DynGenWrite(32); vtlb_DynGenWrite(32);
} }
#else #else
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteFPtoXMMreg(_Rt_, 0); _deleteFPtoXMMreg(_Rt_, 0);
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_ ); ADD32ItoR( ECX, _Imm_ );
@ -591,7 +591,6 @@ void recLQC2( void )
{ {
#ifdef NEWLQC #ifdef NEWLQC
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteVFtoXMMreg(_Ft_, 0, 2); _deleteVFtoXMMreg(_Ft_, 0, 2);
if ( _Rt_ ) if ( _Rt_ )
@ -607,7 +606,7 @@ void recLQC2( void )
} }
else else
{ {
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_); ADD32ItoR( ECX, _Imm_);
@ -616,10 +615,9 @@ void recLQC2( void )
} }
#else #else
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteVFtoXMMreg(_Ft_, 0, 2); _deleteVFtoXMMreg(_Ft_, 0, 2);
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_); ADD32ItoR( ECX, _Imm_);
@ -640,7 +638,6 @@ void recSQC2( void )
{ {
#ifdef NEWSQC #ifdef NEWSQC
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteVFtoXMMreg(_Ft_, 0, 1); //Want to flush it but not clear it _deleteVFtoXMMreg(_Ft_, 0, 1); //Want to flush it but not clear it
MOV32ItoR(EDX, (int)&VU0.VF[_Ft_].UD[0] ); MOV32ItoR(EDX, (int)&VU0.VF[_Ft_].UD[0] );
@ -651,7 +648,7 @@ void recSQC2( void )
} }
else else
{ {
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_ ); ADD32ItoR( ECX, _Imm_ );
@ -659,10 +656,9 @@ void recSQC2( void )
} }
#else #else
iFlushCall(FLUSH_EXCEPTION); iFlushCall(FLUSH_EXCEPTION);
_deleteEEreg(_Rs_, 1);
_deleteVFtoXMMreg(_Ft_, 0, 0); _deleteVFtoXMMreg(_Ft_, 0, 0);
MOV32MtoR( ECX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); _eeMoveGPRtoR(ECX, _Rs_);
if ( _Imm_ != 0 ) if ( _Imm_ != 0 )
ADD32ItoR( ECX, _Imm_ ); ADD32ItoR( ECX, _Imm_ );

11
pcsx2/x86/ix86-32/iR5900Move.cpp
View File

@ -257,7 +257,8 @@ void recMTHILO(int hi)
MOV32ItoM(addrhilo+4, g_cpuConstRegs[_Rs_].UL[1] ); MOV32ItoM(addrhilo+4, g_cpuConstRegs[_Rs_].UL[1] );
} }
else { else {
_deleteEEreg(_Rs_, 1); _eeMoveGPRtoR(ECX, _Rs_);
_flushEEreg(_Rs_);
MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]);
MOV32RtoM( addrhilo, EAX ); MOV32RtoM( addrhilo, EAX );
@ -359,7 +360,7 @@ void recMTHILO1(int hi)
SSE2_PUNPCKLQDQ_XMM_to_XMM(reghi, regs); SSE2_PUNPCKLQDQ_XMM_to_XMM(reghi, regs);
} }
else { else {
_deleteEEreg(_Rs_, 1); _flushEEreg(_Rs_);
SSE2_PUNPCKLQDQ_M128_to_XMM(reghi, (int)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]); SSE2_PUNPCKLQDQ_M128_to_XMM(reghi, (int)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ]);
} }
} }
@ -380,7 +381,7 @@ void recMTHILO1(int hi)
MOV32ItoM(addrhilo+12, g_cpuConstRegs[_Rs_].UL[1] ); MOV32ItoM(addrhilo+12, g_cpuConstRegs[_Rs_].UL[1] );
} }
else { else {
_deleteEEreg(_Rs_, 1); _flushEEreg(_Rs_);
MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); MOV32MtoR( EAX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]);
MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); MOV32MtoR( EDX, (int)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]);
MOV32RtoM( addrhilo+8, EAX ); MOV32RtoM( addrhilo+8, EAX );
@ -486,7 +487,7 @@ void recMOVZ()
if(GPR_IS_CONST1(_Rt_)) { if(GPR_IS_CONST1(_Rt_)) {
if (g_cpuConstRegs[_Rt_].UD[0] != 0) if (g_cpuConstRegs[_Rt_].UD[0] != 0)
return; return;
} else if (GPR_IS_CONST1(_Rd_)) } else
_deleteEEreg(_Rd_, 1); _deleteEEreg(_Rd_, 1);
recMOVZtemp(); recMOVZtemp();
@ -566,7 +567,7 @@ void recMOVN()
if (GPR_IS_CONST1(_Rt_)) { if (GPR_IS_CONST1(_Rt_)) {
if (g_cpuConstRegs[_Rt_].UD[0] == 0) if (g_cpuConstRegs[_Rt_].UD[0] == 0)
return; return;
} else if (GPR_IS_CONST1(_Rd_)) } else
_deleteEEreg(_Rd_, 1); _deleteEEreg(_Rd_, 1);
recMOVNtemp(); recMOVNtemp();

3
pcsx2/x86/ix86-32/iR5900Templates.cpp
View File

@ -44,7 +44,6 @@ void _deleteEEreg(int reg, int flush)
if( !reg ) return; if( !reg ) return;
if( flush && GPR_IS_CONST1(reg) ) { if( flush && GPR_IS_CONST1(reg) ) {
_flushConstReg(reg); _flushConstReg(reg);
return;
} }
GPR_DEL_CONST(reg); GPR_DEL_CONST(reg);
_deleteGPRtoXMMreg(reg, flush ? 0 : 2); _deleteGPRtoXMMreg(reg, flush ? 0 : 2);
@ -381,7 +380,7 @@ void eeRecompileCode3(R5900FNPTR constcode, R5900FNPTR_INFO multicode)
pxFail( "Unfinished code reached." ); pxFail( "Unfinished code reached." );
// for now, don't support xmm // for now, don't support xmm
_deleteEEreg(_Rs_, 1); _deleteEEreg(_Rs_, 0);
_deleteEEreg(_Rt_, 1); _deleteEEreg(_Rt_, 1);
if( GPR_IS_CONST2(_Rs_, _Rt_) ) { if( GPR_IS_CONST2(_Rs_, _Rt_) ) {