mirror of https://github.com/PCSX2/pcsx2.git
microVU: Fix up mVUCustomSearch
Fixes SSE4 version to follow WIN32 x86-64 calling convention (don't clobber xmm6 or xmm7) Fixes AVX version to properly include fourth ymm register in result
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@ -555,27 +555,27 @@ void mVUcustomSearch()
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xPCMP.EQD(xmm1, ptr32[arg2reg + 0x30]);
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xPAND (xmm0, xmm1);
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xMOVAPS (xmm2, ptr32[arg1reg + 0x40]);
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xPCMP.EQD(xmm2, ptr32[arg2reg + 0x40]);
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xMOVAPS (xmm3, ptr32[arg1reg + 0x50]);
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xPCMP.EQD(xmm3, ptr32[arg2reg + 0x50]);
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xMOVAPS (xmm1, ptr32[arg1reg + 0x40]);
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xPCMP.EQD(xmm1, ptr32[arg2reg + 0x40]);
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xMOVAPS (xmm2, ptr32[arg1reg + 0x50]);
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xPCMP.EQD(xmm2, ptr32[arg2reg + 0x50]);
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xPAND (xmm1, xmm2);
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xMOVAPS (xmm2, ptr32[arg1reg + 0x60]);
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xPCMP.EQD(xmm2, ptr32[arg2reg + 0x60]);
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xMOVAPS (xmm3, ptr32[arg1reg + 0x70]);
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xPCMP.EQD(xmm3, ptr32[arg2reg + 0x70]);
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xPAND (xmm2, xmm3);
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xMOVAPS (xmm4, ptr32[arg1reg + 0x60]);
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xPCMP.EQD(xmm4, ptr32[arg2reg + 0x60]);
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xMOVAPS (xmm5, ptr32[arg1reg + 0x70]);
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xPCMP.EQD(xmm5, ptr32[arg2reg + 0x70]);
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xPAND (xmm4, xmm5);
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xMOVAPS (xmm6, ptr32[arg1reg + 0x80]);
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xPCMP.EQD(xmm6, ptr32[arg2reg + 0x80]);
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xMOVAPS (xmm7, ptr32[arg1reg + 0x90]);
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xPCMP.EQD(xmm7, ptr32[arg2reg + 0x90]);
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xPAND (xmm6, xmm7);
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xMOVAPS (xmm3, ptr32[arg1reg + 0x80]);
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xPCMP.EQD(xmm3, ptr32[arg2reg + 0x80]);
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xMOVAPS (xmm4, ptr32[arg1reg + 0x90]);
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xPCMP.EQD(xmm4, ptr32[arg2reg + 0x90]);
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xPAND (xmm3, xmm4);
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xPAND (xmm0, xmm1);
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xPAND (xmm2, xmm3);
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xPAND (xmm0, xmm2);
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xPAND (xmm4, xmm6);
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xPAND (xmm0, xmm4);
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xMOVMSKPS(eax, xmm0);
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xXOR(eax, 0xf);
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@ -600,10 +600,10 @@ void mVUcustomSearch()
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xVPCMP.EQD(ymm2, ymm2, ptr[arg2reg + 0x60]);
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xVPAND(ymm0, ymm0, ymm1);
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xVMOVUPS(ymm1, ptr[arg1reg + 0x80]);
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xVMOVUPS(ymm3, ptr[arg1reg + 0x80]);
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xVPCMP.EQD(ymm3, ymm3, ptr[arg2reg + 0x80]);
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xVPAND(ymm2, ymm2, ymm3);
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xVPAND(ymm0, ymm0, ymm2);
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xVPCMP.EQD(ymm1, ymm1, ptr[arg2reg + 0x80]);
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xVPAND(ymm0, ymm0, ymm1);
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xVPMOVMSKB(eax, ymm0);
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xNOT(eax);
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