mirror of https://github.com/PCSX2/pcsx2.git
EE: Rework overclock and underclock function
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491efd91a5
commit
90b11b2fb9
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@ -125,7 +125,7 @@ static u32 dumplog = 0;
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static void iBranchTest(u32 newpc = 0xffffffff);
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static void ClearRecLUT(BASEBLOCK* base, int count);
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static u32 eeScaleBlockCycles();
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static u32 scaleblockcycles();
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void _eeFlushAllUnused()
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{
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@ -860,7 +860,7 @@ void R5900::Dynarec::OpcodeImpl::recSYSCALL()
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CMP32ItoM((uptr)&cpuRegs.pc, pc);
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j8Ptr[0] = JE8(0);
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ADD32ItoM((uptr)&cpuRegs.cycle, eeScaleBlockCycles());
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ADD32ItoM((uptr)&cpuRegs.cycle, scaleblockcycles());
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// Note: technically the address is 0x8000_0180 (or 0x180)
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// (if CPU is booted)
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xJMP( DispatcherReg );
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@ -875,7 +875,7 @@ void R5900::Dynarec::OpcodeImpl::recBREAK()
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CMP32ItoM((uptr)&cpuRegs.pc, pc);
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j8Ptr[0] = JE8(0);
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ADD32ItoM((uptr)&cpuRegs.cycle, eeScaleBlockCycles());
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ADD32ItoM((uptr)&cpuRegs.cycle, scaleblockcycles());
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xJMP( DispatcherEvent );
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x86SetJ8(j8Ptr[0]);
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//g_branch = 2;
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@ -1113,76 +1113,23 @@ void iFlushCall(int flushtype)
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// }
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//}
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static u32 scaleBlockCycles_helper()
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static u32 scaleblockcycles()
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{
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// Note: s_nBlockCycles is 3 bit fixed point. Divide by 8 when done!
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bool lowcycles = (s_nBlockCycles <= 40);
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s8 cyclerate = EmuConfig.Speedhacks.EECycleRate;
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u32 scale_cycles = 0;
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// Let's not scale blocks under 5-ish cycles. This fixes countless "problems"
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// caused by sync hacks and such, since games seem to care a lot more about
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// these small blocks having accurate cycle counts.
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if (cyclerate == 0 || lowcycles || cyclerate > 99 || cyclerate < -2)
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scale_cycles = s_nBlockCycles >> 3; // Default cycle rate
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if( s_nBlockCycles <= (5<<3) || (EmuConfig.Speedhacks.EECycleRate > 99) ) // use default cycle rate if users set more than 99 in INI file.
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return s_nBlockCycles >> 3;
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else if (cyclerate < 0)
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scale_cycles = s_nBlockCycles >> (3 - cyclerate);
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uint scalarLow = 0, scalarMid = 0, scalarHigh = 0;
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else if (cyclerate > 0)
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scale_cycles = ((5 + (2 * cyclerate)) * s_nBlockCycles) >> 5;
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// Note: larger blocks get a smaller scalar, to help keep
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// them from becoming "too fat" and delaying branch tests.
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switch( EmuConfig.Speedhacks.EECycleRate )
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{
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case -2:
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scalarLow = 1;
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scalarMid = 1;
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scalarHigh = 1;
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break;
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case -1:
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scalarLow = 2;
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scalarMid = 2;
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scalarHigh = 1;
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break;
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case 0:
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return s_nBlockCycles >> 3; // Default cyclerate
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case 1:
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scalarLow = 5;
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scalarMid = 7;
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scalarHigh = 5;
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break;
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case 2:
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scalarLow = 7;
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scalarMid = 9;
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scalarHigh = 7;
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break;
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// Added insane rates on popular request (rama)
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// This allows higher values to be set at INI, Scalar values follow Arithmetic progression on increment to cyclerate.
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default:
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if (EmuConfig.Speedhacks.EECycleRate > 2)
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{
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scalarLow = 3 + (2*EmuConfig.Speedhacks.EECycleRate);
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scalarMid = 5 + (2*EmuConfig.Speedhacks.EECycleRate);
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scalarHigh = 3 + (2*EmuConfig.Speedhacks.EECycleRate);
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}
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}
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const u32 temp = s_nBlockCycles * (
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(s_nBlockCycles <= (10<<3)) ? scalarLow :
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((s_nBlockCycles > (21<<3)) ? scalarHigh : scalarMid )
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);
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return temp >> (3+2);
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}
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static u32 eeScaleBlockCycles()
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{
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// Ensures block cycles count is never less than 1:
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u32 retval = scaleBlockCycles_helper();
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return (retval < 1) ? 1 : retval;
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// Ensure block cycle count is never less than 1.
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return (scale_cycles < 1) ? 1 : scale_cycles;
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}
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@ -1208,7 +1155,7 @@ static void iBranchTest(u32 newpc)
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if (EmuConfig.Speedhacks.WaitLoop && s_nBlockFF && newpc == s_branchTo)
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{
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xMOV(eax, ptr32[&g_nextEventCycle]);
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xADD(ptr32[&cpuRegs.cycle], eeScaleBlockCycles());
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xADD(ptr32[&cpuRegs.cycle], scaleblockcycles());
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xCMP(eax, ptr32[&cpuRegs.cycle]);
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xCMOVS(eax, ptr32[&cpuRegs.cycle]);
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xMOV(ptr32[&cpuRegs.cycle], eax);
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@ -1218,7 +1165,7 @@ static void iBranchTest(u32 newpc)
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else
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{
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xMOV(eax, ptr[&cpuRegs.cycle]);
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xADD(eax, eeScaleBlockCycles());
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xADD(eax, scaleblockcycles());
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xMOV(ptr[&cpuRegs.cycle], eax); // update cycles
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xSUB(eax, ptr[&g_nextEventCycle]);
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@ -2223,7 +2170,7 @@ StartRecomp:
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else
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{
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xMOV( ptr32[&cpuRegs.pc], pc );
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xADD( ptr32[&cpuRegs.cycle], eeScaleBlockCycles() );
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xADD( ptr32[&cpuRegs.cycle], scaleblockcycles() );
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recBlocks.Link( HWADDR(pc), xJcc32() );
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}
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}
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