- Ok, skip the whole runtime reset, since we don't know (yet) what vars need to be reset, and more importantly, when.
- Makes it possible to disable the specific BIOS hack we had. :)


git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2551 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
ramapcsx2 2010-02-02 06:28:50 +00:00
parent 09e268e251
commit 909a7de4f6
2 changed files with 15 additions and 11 deletions

View File

@ -183,7 +183,8 @@ void V_Core::StartADMAWrite(u16 *pMem, u32 sz)
// IRQAs are tested). Very few games use DMA reads tho, so it could just be a case of "works // IRQAs are tested). Very few games use DMA reads tho, so it could just be a case of "works
// by the grace of not being used." // by the grace of not being used."
// //
#define NO_BIOS_HACKFIX 0 // set to 1 to disable the hackfix // Update: This hack is no longer needed when we don't do a core reset. Guess the null pc was in spu2 memory?
#define NO_BIOS_HACKFIX 1 // set to 1 to disable the hackfix
void V_Core::PlainDMAWrite(u16 *pMem, u32 size) void V_Core::PlainDMAWrite(u16 *pMem, u32 size)

View File

@ -109,11 +109,9 @@ V_Core::~V_Core() throw()
void V_Core::Reset( int index ) void V_Core::Reset( int index )
{ {
// Clearing the whole core seems to delete some important stuff as well. ConLog( " * SPU2: RESET SPU2 core%d \n", index );
// Not doing it fixes SH Shattered Memories and Silver Surfer audio. memset( this, 0, sizeof(V_Core) );
// Shouldn't have any negative side effects.
//memset( this, 0, sizeof(V_Core) );
const int c = Index = index; const int c = Index = index;
Regs.STATX = 0; Regs.STATX = 0;
@ -310,7 +308,8 @@ __forceinline void TimeUpdate(u32 cClocks)
if(_irqcallback) _irqcallback(); if(_irqcallback) _irqcallback();
} }
if(Cores[0].InitDelay>0) // Part of the no core resets hack. See fixme in RegWrite_Core.
/*if(Cores[0].InitDelay>0)
{ {
Cores[0].InitDelay--; Cores[0].InitDelay--;
if(Cores[0].InitDelay==0) if(Cores[0].InitDelay==0)
@ -326,7 +325,7 @@ __forceinline void TimeUpdate(u32 cClocks)
{ {
Cores[1].Reset(1); Cores[1].Reset(1);
} }
} }*/
//Update DMA4 interrupt delay counter //Update DMA4 interrupt delay counter
if(Cores[0].DMAICounter>0) if(Cores[0].DMAICounter>0)
@ -852,8 +851,12 @@ static void __fastcall RegWrite_Core( u16 value )
{ {
// When we have exact cycle update info from the Pcsx2 IOP unit, then use // When we have exact cycle update info from the Pcsx2 IOP unit, then use
// the more accurate delayed initialization system. // the more accurate delayed initialization system.
ConLog( " * SPU2: Runtime core%d reset requested, (but ignored. Hack.). \n", core );
if(cyclePtr != NULL) // Fixme:
// Not initializing a core reset here fixes SH Shattered Memories and Silver Surfer audio.
// This is a hack, but better than clearing the wrong bits.
// Also check the commented out code in TimeUpdate() above.
/*if(cyclePtr != NULL)
{ {
thiscore.InitDelay = 1; thiscore.InitDelay = 1;
thiscore.Regs.STATX = 0; thiscore.Regs.STATX = 0;
@ -861,7 +864,7 @@ static void __fastcall RegWrite_Core( u16 value )
else else
{ {
thiscore.Reset(thiscore.Index); thiscore.Reset(thiscore.Index);
} }*/
} }
thiscore.AttrBit0 =(value>> 0) & 0x01; //1 bit thiscore.AttrBit0 =(value>> 0) & 0x01; //1 bit