diff --git a/pcsx2/DebugTools/DisVU0Micro.cpp b/pcsx2/DebugTools/DisVU0Micro.cpp
index 93639adf13..0fb410655c 100644
--- a/pcsx2/DebugTools/DisVU0Micro.cpp
+++ b/pcsx2/DebugTools/DisVU0Micro.cpp
@@ -19,7 +19,7 @@
 #include "Debug.h"
 
 static char ostr[1024];
-static char ostr_tmp[32];
+#define ostrA (ostr + strlen(ostr))
 
 // Type deffinition of our functions
 #define DisFInterface  (u32 code, u32 pc)
@@ -31,7 +31,7 @@ typedef char* (*TdisR5900F)DisFInterface;
 // These macros are used to assemble the disassembler functions
 #define MakeDisF(fn, b) \
 	char* fn DisFInterface { \
-		sprintf (ostr_tmp, "%8.8x %8.8x:", pc, code); \
+		sprintf (ostr, "%8.8x %8.8x:", pc, code); \
 		b; \
 		return ostr; \
 	}
@@ -44,22 +44,22 @@ typedef char* (*TdisR5900F)DisFInterface;
 #define _Is_ (_Fs_ & 15)
 #define _Id_ (_Fd_ & 15)
 
-#define dName(i)	sprintf(ostr, "%s %-7s,", ostr_tmp, i)
-#define dNameU(i)	{ char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); sprintf(ostr, "%s %-7s,", ostr_tmp, op); }
+#define dName(i)	sprintf(ostrA, " %-7s,", i)
+#define dNameU(i)	{ char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); sprintf(ostrA, " %-7s,", op); }
 
 
-#define dCP2128f(i)		sprintf(ostr, "%s w=%f z=%f y=%f x=%f (%s),", ostr_tmp, VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
-#define dCP232x(i)		sprintf(ostr, "%s x=%f (%s),", ostr_tmp, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
-#define dCP232y(i)		sprintf(ostr, "%s y=%f (%s),", ostr_tmp, VU0.VF[i].f.y, R5900::COP2_REG_FP[i])
-#define dCP232z(i)		sprintf(ostr, "%s z=%f (%s),", ostr_tmp, VU0.VF[i].f.z, R5900::COP2_REG_FP[i])
-#define dCP232w(i)		sprintf(ostr, "%s w=%f (%s),", ostr_tmp, VU0.VF[i].f.w, R5900::COP2_REG_FP[i])
-#define dCP2ACCf()		sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr_tmp, VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x)
-#define dCP232i(i)		sprintf(ostr, "%s %8.8x (%s),", ostr_tmp, VU0.VI[i].UL, R5900::COP2_REG_CTL[i])
-#define dCP232iF(i)		sprintf(ostr, "%s %f (%s),", ostr_tmp, VU0.VI[i].F, R5900::COP2_REG_CTL[i])
-#define dCP232f(i, j)	sprintf(ostr, "%s Q %s=%f (%s),", ostr_tmp, R5900::COP2_VFnames[j], VU0.VF[i].F[j], R5900::COP2_REG_FP[i])
-#define dImm5()			sprintf(ostr, "%s %d,", ostr_tmp, (code >> 6) & 0x1f)
-#define dImm11()		sprintf(ostr, "%s %d,", ostr_tmp, code & 0x7ff)
-#define dImm15()		sprintf(ostr, "%s %d,", ostr_tmp, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
+#define dCP2128f(i)		sprintf(ostrA, " w=%f z=%f y=%f x=%f (%s),", VU0.VF[i].f.w, VU0.VF[i].f.z, VU0.VF[i].f.y, VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
+#define dCP232x(i)		sprintf(ostrA, " x=%f (%s),", VU0.VF[i].f.x, R5900::COP2_REG_FP[i])
+#define dCP232y(i)		sprintf(ostrA, " y=%f (%s),", VU0.VF[i].f.y, R5900::COP2_REG_FP[i])
+#define dCP232z(i)		sprintf(ostrA, " z=%f (%s),", VU0.VF[i].f.z, R5900::COP2_REG_FP[i])
+#define dCP232w(i)		sprintf(ostrA, " w=%f (%s),", VU0.VF[i].f.w, R5900::COP2_REG_FP[i])
+#define dCP2ACCf()		sprintf(ostrA, " w=%f z=%f y=%f x=%f (ACC),", VU0.ACC.f.w, VU0.ACC.f.z, VU0.ACC.f.y, VU0.ACC.f.x)
+#define dCP232i(i)		sprintf(ostrA, " %8.8x (%s),", VU0.VI[i].UL, R5900::COP2_REG_CTL[i])
+#define dCP232iF(i)		sprintf(ostrA, " %f (%s),", VU0.VI[i].F, R5900::COP2_REG_CTL[i])
+#define dCP232f(i, j)	sprintf(ostrA, " Q %s=%f (%s),", R5900::COP2_VFnames[j], VU0.VF[i].F[j], R5900::COP2_REG_FP[i])
+#define dImm5()			sprintf(ostrA, " %d,", (code >> 6) & 0x1f)
+#define dImm11()		sprintf(ostrA, " %d,", code & 0x7ff)
+#define dImm15()		sprintf(ostrA, " %d,", ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
 
 #define _X ((code>>24) & 0x1)
 #define _Y ((code>>23) & 0x1)
diff --git a/pcsx2/DebugTools/DisVU1Micro.cpp b/pcsx2/DebugTools/DisVU1Micro.cpp
index c86bb57079..df14007604 100644
--- a/pcsx2/DebugTools/DisVU1Micro.cpp
+++ b/pcsx2/DebugTools/DisVU1Micro.cpp
@@ -20,7 +20,7 @@
 #include "VUmicro.h"
 
 static char ostr[1024];
-static char ostr_tmp[32];
+#define ostrA (ostr + strlen(ostr))
 
 // Type deffinition of our functions
 #define DisFInterface  (u32 code, u32 pc)
@@ -32,8 +32,8 @@ typedef char* (*TdisR5900F)DisFInterface;
 // These macros are used to assemble the disassembler functions
 #define MakeDisF(fn, b) \
 	char* fn DisFInterface { \
-		if( !!CpuVU1->IsInterpreter ) sprintf (ostr_tmp, "%8.8x %8.8x:", pc, code); \
-		else ostr_tmp[0] = 0; \
+		if( !!CpuVU1->IsInterpreter ) sprintf (ostr, "%8.8x %8.8x:", pc, code); \
+		else ostr[0] = 0; \
 		b; \
 		return ostr; \
 	}
@@ -46,61 +46,61 @@ typedef char* (*TdisR5900F)DisFInterface;
 #define _Is_ (_Fs_ & 15)
 #define _Id_ (_Fd_ & 15)
 
-#define dName(i) sprintf(ostr, "%s %-12s", ostr_tmp, i); \
+#define dName(i) sprintf(ostrA, " %-12s", i); \
 
 #define dNameU(i) { \
 	char op[256]; sprintf(op, "%s.%s%s%s%s", i, _X ? "x" : "", _Y ? "y" : "", _Z ? "z" : "", _W ? "w" : ""); \
-	sprintf(ostr, "%s %-12s", ostr_tmp, op); \
+	sprintf(ostrA, " %-12s", op); \
 }
 
 #define dCP2128f(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
-	else sprintf(ostr, "%s w=%f (%8.8x) z=%f (%8.8x) y=%f (%8.8xl) x=%f (%8.8x) (%s),", ostr_tmp, VU1.VF[i].f.w, VU1.VF[i].UL[3], VU1.VF[i].f.z, VU1.VF[i].UL[2], VU1.VF[i].f.y, VU1.VF[i].UL[1], VU1.VF[i].f.x, VU1.VF[i].UL[0], R5900::COP2_REG_FP[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_FP[i]); \
+	else sprintf(ostrA, " w=%f (%8.8x) z=%f (%8.8x) y=%f (%8.8xl) x=%f (%8.8x) (%s),", VU1.VF[i].f.w, VU1.VF[i].UL[3], VU1.VF[i].f.z, VU1.VF[i].UL[2], VU1.VF[i].f.y, VU1.VF[i].UL[1], VU1.VF[i].f.x, VU1.VF[i].UL[0], R5900::COP2_REG_FP[i]); \
 } \
 
 #define dCP232x(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
-	else sprintf(ostr, "%s x=%f (%s),", ostr_tmp, VU1.VF[i].f.x, R5900::COP2_REG_FP[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_FP[i]); \
+	else sprintf(ostrA, " x=%f (%s),", VU1.VF[i].f.x, R5900::COP2_REG_FP[i]); \
 } \
 
 #define dCP232y(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
-	else sprintf(ostr, "%s y=%f (%s),", ostr_tmp, VU1.VF[i].f.y, R5900::COP2_REG_FP[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_FP[i]); \
+	else sprintf(ostrA, " y=%f (%s),", VU1.VF[i].f.y, R5900::COP2_REG_FP[i]); \
 } \
 
 #define dCP232z(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
-	else sprintf(ostr, "%s z=%f (%s),", ostr_tmp, VU1.VF[i].f.z, R5900::COP2_REG_FP[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_FP[i]); \
+	else sprintf(ostrA, " z=%f (%s),", VU1.VF[i].f.z, R5900::COP2_REG_FP[i]); \
 }
 
 #define dCP232w(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_FP[i]); \
-	else sprintf(ostr, "%s w=%f (%s),", ostr_tmp, VU1.VF[i].f.w, R5900::COP2_REG_FP[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_FP[i]); \
+	else sprintf(ostrA, " w=%f (%s),", VU1.VF[i].f.w, R5900::COP2_REG_FP[i]); \
 }
 
 #define dCP2ACCf() { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s ACC,", ostr_tmp); \
-	else sprintf(ostr, "%s w=%f z=%f y=%f x=%f (ACC),", ostr_tmp, VU1.ACC.f.w, VU1.ACC.f.z, VU1.ACC.f.y, VU1.ACC.f.x); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " ACC,"); \
+	else sprintf(ostrA, " w=%f z=%f y=%f x=%f (ACC),", VU1.ACC.f.w, VU1.ACC.f.z, VU1.ACC.f.y, VU1.ACC.f.x); \
 } \
 
 #define dCP232i(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_CTL[i]); \
-	else sprintf(ostr, "%s %8.8x (%s),", ostr_tmp, VU1.VI[i].UL, R5900::COP2_REG_CTL[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_CTL[i]); \
+	else sprintf(ostrA, " %8.8x (%s),", VU1.VI[i].UL, R5900::COP2_REG_CTL[i]); \
 }
 
 #define dCP232iF(i) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s,", ostr_tmp, R5900::COP2_REG_CTL[i]); \
-	else sprintf(ostr, "%s %f (%s),", ostr_tmp, VU1.VI[i].F, R5900::COP2_REG_CTL[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s,", R5900::COP2_REG_CTL[i]); \
+	else sprintf(ostrA, " %f (%s),", VU1.VI[i].F, R5900::COP2_REG_CTL[i]); \
 }
 
 #define dCP232f(i, j) { \
-	if( !CpuVU1->IsInterpreter ) sprintf(ostr, "%s %s%s,", ostr_tmp, R5900::COP2_REG_FP[i], R5900::COP2_VFnames[j]); \
-	else sprintf(ostr, "%s %s=%f (%s),", ostr_tmp, R5900::COP2_VFnames[j], VU1.VF[i].F[j], R5900::COP2_REG_FP[i]); \
+	if( !CpuVU1->IsInterpreter ) sprintf(ostrA, " %s%s,", R5900::COP2_REG_FP[i], R5900::COP2_VFnames[j]); \
+	else sprintf(ostrA, " %s=%f (%s),", R5900::COP2_VFnames[j], VU1.VF[i].F[j], R5900::COP2_REG_FP[i]); \
 }
 
-#define dImm5()			sprintf(ostr, "%s %d,", ostr_tmp, (s16)((code >> 6) & 0x10 ? 0xfff0 | ((code >> 6) & 0xf) : (code >> 6) & 0xf))
-#define dImm11()		sprintf(ostr, "%s %d,", ostr_tmp, (s16)(code & 0x400 ? 0xfc00 | (code & 0x3ff) : code & 0x3ff))
-#define dImm15()		sprintf(ostr, "%s %d,", ostr_tmp, ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
+#define dImm5()			sprintf(ostrA, " %d,", (s16)((code >> 6) & 0x10 ? 0xfff0 | ((code >> 6) & 0xf) : (code >> 6) & 0xf))
+#define dImm11()		sprintf(ostrA, " %d,", (s16)(code & 0x400 ? 0xfc00 | (code & 0x3ff) : code & 0x3ff))
+#define dImm15()		sprintf(ostrA, " %d,", ( ( code >> 10 ) & 0x7800 ) | ( code & 0x7ff ))
 
 #define _X ((code>>24) & 0x1)
 #define _Y ((code>>23) & 0x1)
diff --git a/pcsx2/DebugTools/DisVUops.h b/pcsx2/DebugTools/DisVUops.h
index f6a3c3fa2f..1d56d69468 100644
--- a/pcsx2/DebugTools/DisVUops.h
+++ b/pcsx2/DebugTools/DisVUops.h
@@ -50,17 +50,17 @@ MakeDisF(dis##VU##MI_RGET, 		dNameU("RGET");    dCP232i(REG_R); dCP2128f(_Ft_);)
 MakeDisF(dis##VU##MI_RNEXT, 	dNameU("RNEXT");   dCP232i(REG_R); dCP2128f(_Ft_);) \
 MakeDisF(dis##VU##MI_RXOR, 		dNameU("RXOR");    dCP232i(REG_R); dCP232f(_Fs_, _Fsf_);) \
 MakeDisF(dis##VU##MI_WAITQ, 	dName("WAITQ");  ) \
-MakeDisF(dis##VU##MI_FSAND, 	dName("FSAND");   dCP232i(_It_); dCP232i(REG_STATUS_FLAG); sprintf(ostr, "%s %.3x,", ostr, code&0xfff); ) \
-MakeDisF(dis##VU##MI_FSEQ, 		dName("FSEQ");    dCP232i(_It_); dCP232i(REG_STATUS_FLAG); sprintf(ostr, "%s %.3x,", ostr, code&0xfff);) \
-MakeDisF(dis##VU##MI_FSOR, 		dName("FSOR");    dCP232i(_It_); dCP232i(REG_STATUS_FLAG); sprintf(ostr, "%s %.3x,", ostr, code&0xfff);) \
+MakeDisF(dis##VU##MI_FSAND, 	dName("FSAND");   dCP232i(_It_); dCP232i(REG_STATUS_FLAG); sprintf(ostrA, " %.3x,", code&0xfff); ) \
+MakeDisF(dis##VU##MI_FSEQ, 		dName("FSEQ");    dCP232i(_It_); dCP232i(REG_STATUS_FLAG); sprintf(ostrA, " %.3x,", code&0xfff);) \
+MakeDisF(dis##VU##MI_FSOR, 		dName("FSOR");    dCP232i(_It_); dCP232i(REG_STATUS_FLAG); sprintf(ostrA, " %.3x,", code&0xfff);) \
 MakeDisF(dis##VU##MI_FSSET, 	dName("FSSET");   dCP232i(REG_STATUS_FLAG);) \
 MakeDisF(dis##VU##MI_FMAND, 	dName("FMAND");   dCP232i(_It_); dCP232i(REG_MAC_FLAG); dCP232i(_Is_);) \
 MakeDisF(dis##VU##MI_FMEQ, 		dName("FMEQ");    dCP232i(_It_); dCP232i(REG_MAC_FLAG); dCP232i(_Is_);) \
 MakeDisF(dis##VU##MI_FMOR, 		dName("FMOR");    dCP232i(_It_); dCP232i(REG_MAC_FLAG); dCP232i(_Is_);) \
-MakeDisF(dis##VU##MI_FCAND, 	dName("FCAND");   dCP232i(1);    sprintf(ostr, "%s %8.8x,", ostr, code&0xffffff); ) \
+MakeDisF(dis##VU##MI_FCAND, 	dName("FCAND");   dCP232i(1);    sprintf(ostrA, " %8.8x,", code&0xffffff); ) \
 MakeDisF(dis##VU##MI_FCEQ, 		dName("FCEQ");    dCP232i(1);    dCP232i(REG_CLIP_FLAG);) \
 MakeDisF(dis##VU##MI_FCOR, 		dName("FCOR");    dCP232i(1);    dCP232i(REG_CLIP_FLAG);) \
-MakeDisF(dis##VU##MI_FCSET, 	dName("FCSET");   dCP232i(REG_CLIP_FLAG); sprintf(ostr, "%s %.6x,", ostr, code&0xffffff); ) \
+MakeDisF(dis##VU##MI_FCSET, 	dName("FCSET");   dCP232i(REG_CLIP_FLAG); sprintf(ostrA, " %.6x,", code&0xffffff); ) \
 MakeDisF(dis##VU##MI_FCGET, 	dName("FCGET");   dCP232i(_It_); dCP232i(REG_CLIP_FLAG);) \
 MakeDisF(dis##VU##MI_IBEQ, 		dName("IBEQ");    dImm11(); dCP232i(_It_); dCP232i(_Is_);) \
 MakeDisF(dis##VU##MI_IBGEZ, 	dName("IBEZ");    dImm11(); dCP232i(_It_); dCP232i(_Is_);) \