zzogl-pg: Some work on the Gif Registers. I'm trying to bring them a bit closer to the way GSdx handles them.

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3323 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
arcum42 2010-06-27 08:38:50 +00:00
parent 621fb5bd24
commit 8f46aea568
3 changed files with 827 additions and 39 deletions

View File

@ -413,6 +413,8 @@ void CALLBACK GSsetGameCRC(int crc, int options)
}
}
//#define OLD_GS_SET_FRAMESKIP
#ifdef OLD_GS_SET_FRAMESKIP
void CALLBACK GSsetFrameSkip(int frameskip)
{
FUNCLOG
@ -464,7 +466,64 @@ void CALLBACK GSsetFrameSkip(int frameskip)
g_GIFRegHandlers[27] = GIFRegHandlerPRMODE;
}
}
#else
void CALLBACK GSsetFrameSkip(int frameskip)
{
FUNCLOG
s_frameskipping |= frameskip;
if (frameskip && g_nFrameRender > 1)
{
g_GIFPackedRegHandlers[GIF_REG_PRIM] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_RGBA] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_STQ] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_UV] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_XYZF2] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_XYZ2] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_CLAMP_1] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_CLAMP_2] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_FOG] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_XYZF3] = &GIFPackedRegHandlerNOP;
g_GIFPackedRegHandlers[GIF_REG_XYZ3] = &GIFPackedRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_PRIM] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_RGBAQ] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_ST] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_UV] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_XYZF2] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_XYZ2] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_XYZF3] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_XYZ3] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_PRMODECONT] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_PRMODE] = &GIFRegHandlerNOP;
}
else if (!frameskip && g_nFrameRender <= 0)
{
g_GIFPackedRegHandlers[GIF_REG_PRIM] = &GIFPackedRegHandlerPRIM;
g_GIFPackedRegHandlers[GIF_REG_RGBA] = &GIFPackedRegHandlerRGBA;
g_GIFPackedRegHandlers[GIF_REG_STQ] = &GIFPackedRegHandlerSTQ;
g_GIFPackedRegHandlers[GIF_REG_UV] = &GIFPackedRegHandlerUV;
g_GIFPackedRegHandlers[GIF_REG_XYZF2] = &GIFPackedRegHandlerXYZF2;
g_GIFPackedRegHandlers[GIF_REG_XYZ2] = &GIFPackedRegHandlerXYZ2;
g_GIFPackedRegHandlers[GIF_REG_CLAMP_1] = &GIFPackedRegHandlerCLAMP_1;
g_GIFPackedRegHandlers[GIF_REG_CLAMP_2] = &GIFPackedRegHandlerCLAMP_2;
g_GIFPackedRegHandlers[GIF_REG_FOG] = &GIFPackedRegHandlerFOG;
g_GIFPackedRegHandlers[GIF_REG_XYZF3] = &GIFPackedRegHandlerXYZF3;
g_GIFPackedRegHandlers[GIF_REG_XYZ3] = &GIFPackedRegHandlerXYZ3;
g_GIFRegHandlers[GIF_A_D_REG_PRIM] = &GIFRegHandlerPRIM;
g_GIFRegHandlers[GIF_A_D_REG_RGBAQ] = &GIFRegHandlerRGBAQ;
g_GIFRegHandlers[GIF_A_D_REG_ST] = &GIFRegHandlerST;
g_GIFRegHandlers[GIF_A_D_REG_UV] = &GIFRegHandlerUV;
g_GIFRegHandlers[GIF_A_D_REG_XYZF2] = &GIFRegHandlerXYZF2;
g_GIFRegHandlers[GIF_A_D_REG_XYZ2] = &GIFRegHandlerXYZ2;
g_GIFRegHandlers[GIF_A_D_REG_XYZF3] = &GIFRegHandlerXYZF3;
g_GIFRegHandlers[GIF_A_D_REG_XYZ3] = &GIFRegHandlerXYZ3;
g_GIFRegHandlers[GIF_A_D_REG_PRMODECONT] = &GIFRegHandlerPRMODECONT;
g_GIFRegHandlers[GIF_A_D_REG_PRMODE] = &GIFRegHandlerPRMODE;
}
}
#endif
void CALLBACK GSreset()
{
FUNCLOG
@ -712,6 +771,7 @@ extern LRESULT WINAPI MsgProc(HWND hWnd, UINT msg, WPARAM wParam, LPARAM lParam)
extern HINSTANCE hInst;
#endif
extern void ResetRegs();
s32 CALLBACK GSopen(void *pDsp, char *Title, int multithread)
{
@ -770,7 +830,7 @@ s32 CALLBACK GSopen(void *pDsp, char *Title, int multithread)
luPerfFreq = GetCPUTicks();
gs.path[0].mode = gs.path[1].mode = gs.path[2].mode = 0;
ResetRegs();
ZZLog::GS_Log("GSopen finished.");
return 0;

View File

@ -36,44 +36,8 @@ const u32 g_primsub[8] = { 1, 2, 1, 3, 1, 1, 2, 0 };
#pragma warning(disable:4244)
#endif
GIFRegHandler g_GIFPackedRegHandlers[16] =
{
GIFRegHandlerPRIM, GIFPackedRegHandlerRGBA, GIFPackedRegHandlerSTQ, GIFPackedRegHandlerUV,
GIFPackedRegHandlerXYZF2, GIFPackedRegHandlerXYZ2, GIFRegHandlerTEX0_1, GIFRegHandlerTEX0_2,
GIFRegHandlerCLAMP_1, GIFRegHandlerCLAMP_2, GIFPackedRegHandlerFOG, GIFPackedRegHandlerNull,
GIFRegHandlerXYZF3, GIFRegHandlerXYZ3, GIFPackedRegHandlerA_D, GIFPackedRegHandlerNOP
};
GIFRegHandler g_GIFRegHandlers[] =
{
GIFRegHandlerPRIM, GIFRegHandlerRGBAQ, GIFRegHandlerST, GIFRegHandlerUV,
GIFRegHandlerXYZF2, GIFRegHandlerXYZ2, GIFRegHandlerTEX0_1, GIFRegHandlerTEX0_2,
GIFRegHandlerCLAMP_1, GIFRegHandlerCLAMP_2, GIFRegHandlerFOG, GIFRegHandlerNull,
GIFRegHandlerXYZF3, GIFRegHandlerXYZ3, GIFRegHandlerNOP, GIFRegHandlerNOP,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerTEX1_1, GIFRegHandlerTEX1_2, GIFRegHandlerTEX2_1, GIFRegHandlerTEX2_2,
GIFRegHandlerXYOFFSET_1, GIFRegHandlerXYOFFSET_2, GIFRegHandlerPRMODECONT, GIFRegHandlerPRMODE,
GIFRegHandlerTEXCLUT, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerSCANMSK, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerMIPTBP1_1, GIFRegHandlerMIPTBP1_2, GIFRegHandlerMIPTBP2_1, GIFRegHandlerMIPTBP2_2,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerTEXA,
GIFRegHandlerNull, GIFRegHandlerFOGCOL, GIFRegHandlerNull, GIFRegHandlerTEXFLUSH,
GIFRegHandlerSCISSOR_1, GIFRegHandlerSCISSOR_2, GIFRegHandlerALPHA_1, GIFRegHandlerALPHA_2,
GIFRegHandlerDIMX, GIFRegHandlerDTHE, GIFRegHandlerCOLCLAMP, GIFRegHandlerTEST_1,
GIFRegHandlerTEST_2, GIFRegHandlerPABE, GIFRegHandlerFBA_1, GIFRegHandlerFBA_2,
GIFRegHandlerFRAME_1, GIFRegHandlerFRAME_2, GIFRegHandlerZBUF_1, GIFRegHandlerZBUF_2,
GIFRegHandlerBITBLTBUF, GIFRegHandlerTRXPOS, GIFRegHandlerTRXREG, GIFRegHandlerTRXDIR,
GIFRegHandlerHWREG, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull, GIFRegHandlerNull,
GIFRegHandlerSIGNAL, GIFRegHandlerFINISH, GIFRegHandlerLABEL, GIFRegHandlerNull
};
C_ASSERT(sizeof(g_GIFRegHandlers) / sizeof(g_GIFRegHandlers[0]) == 100);
GIFRegHandler g_GIFPackedRegHandlers[16];
GIFRegHandler g_GIFRegHandlers[256];
// values for keeping track of changes
u32 s_uTex1Data[2][2] = {{0, }};
@ -131,6 +95,15 @@ void __fastcall GIFPackedRegHandlerNull(u32* data)
ZZLog::Debug_Log("Unexpected packed reg handler %8.8lx_%8.8lx %x.", data[0], data[1], data[2]);
}
// All these just call their non-packed equivalent.
void __fastcall GIFPackedRegHandlerPRIM(u32* data) { GIFRegHandlerPRIM(data); }
void __fastcall GIFPackedRegHandlerTEX0_1(u32* data) { GIFRegHandlerTEX0_1(data); }
void __fastcall GIFPackedRegHandlerTEX0_2(u32* data) { GIFRegHandlerTEX0_2(data); }
void __fastcall GIFPackedRegHandlerCLAMP_1(u32* data) { GIFRegHandlerCLAMP_1(data); }
void __fastcall GIFPackedRegHandlerCLAMP_2(u32* data) { GIFRegHandlerCLAMP_2(data); }
void __fastcall GIFPackedRegHandlerXYZF3(u32* data) { GIFRegHandlerXYZF3(data); }
void __fastcall GIFPackedRegHandlerXYZ3(u32* data) { GIFRegHandlerXYZ3(data); }
void __fastcall GIFPackedRegHandlerRGBA(u32* data)
{
FUNCLOG
@ -1126,3 +1099,109 @@ void __fastcall GIFRegHandlerLABEL(u32* data)
SIGLBLID->LBLID = (SIGLBLID->LBLID & ~data[1]) | (data[0] & data[1]);
}
}
void SetMultithreaded()
{
// Some older versions of PCSX2 didn't properly set the irq callback to NULL
// in multithreaded mode (possibly because ZeroGS itself would assert in such
// cases), and didn't bind them to a dummy callback either. PCSX2 handles all
// IRQs internally when multithreaded anyway -- so let's ignore them here:
if (g_GSMultiThreaded)
{
g_GIFRegHandlers[GIF_A_D_REG_SIGNAL] = &GIFRegHandlerNull;
g_GIFRegHandlers[GIF_A_D_REG_FINISH] = &GIFRegHandlerNull;
g_GIFRegHandlers[GIF_A_D_REG_LABEL] = &GIFRegHandlerNull;
}
else
{
g_GIFRegHandlers[GIF_A_D_REG_SIGNAL] = &GIFRegHandlerSIGNAL;
g_GIFRegHandlers[GIF_A_D_REG_FINISH] = &GIFRegHandlerFINISH;
g_GIFRegHandlers[GIF_A_D_REG_LABEL] = &GIFRegHandlerLABEL;
}
}
void ResetRegs()
{
for (int i = 0; i < 16; i++)
{
g_GIFPackedRegHandlers[i] = &GIFPackedRegHandlerNull;
}
g_GIFPackedRegHandlers[GIF_REG_PRIM] = &GIFPackedRegHandlerPRIM;
g_GIFPackedRegHandlers[GIF_REG_RGBA] = &GIFPackedRegHandlerRGBA;
g_GIFPackedRegHandlers[GIF_REG_STQ] = &GIFPackedRegHandlerSTQ;
g_GIFPackedRegHandlers[GIF_REG_UV] = &GIFPackedRegHandlerUV;
g_GIFPackedRegHandlers[GIF_REG_XYZF2] = &GIFPackedRegHandlerXYZF2;
g_GIFPackedRegHandlers[GIF_REG_XYZ2] = &GIFPackedRegHandlerXYZ2;
g_GIFPackedRegHandlers[GIF_REG_TEX0_1] = &GIFPackedRegHandlerTEX0_1;
g_GIFPackedRegHandlers[GIF_REG_TEX0_2] = &GIFPackedRegHandlerTEX0_2;
g_GIFPackedRegHandlers[GIF_REG_CLAMP_1] = &GIFPackedRegHandlerCLAMP_1;
g_GIFPackedRegHandlers[GIF_REG_CLAMP_2] = &GIFPackedRegHandlerCLAMP_2;
g_GIFPackedRegHandlers[GIF_REG_FOG] = &GIFPackedRegHandlerFOG;
g_GIFPackedRegHandlers[GIF_REG_XYZF3] = &GIFPackedRegHandlerXYZF3;
g_GIFPackedRegHandlers[GIF_REG_XYZ3] = &GIFPackedRegHandlerXYZ3;
g_GIFPackedRegHandlers[GIF_REG_A_D] = &GIFPackedRegHandlerA_D;
g_GIFPackedRegHandlers[GIF_REG_NOP] = &GIFPackedRegHandlerNOP;
for (int i = 0; i < 256; i++)
{
g_GIFRegHandlers[i] = &GIFPackedRegHandlerNull;
}
g_GIFRegHandlers[GIF_A_D_REG_PRIM] = &GIFRegHandlerPRIM;
g_GIFRegHandlers[GIF_A_D_REG_RGBAQ] = &GIFRegHandlerRGBAQ;
g_GIFRegHandlers[GIF_A_D_REG_ST] = &GIFRegHandlerST;
g_GIFRegHandlers[GIF_A_D_REG_UV] = &GIFRegHandlerUV;
g_GIFRegHandlers[GIF_A_D_REG_XYZF2] = &GIFRegHandlerXYZF2;
g_GIFRegHandlers[GIF_A_D_REG_XYZ2] = &GIFRegHandlerXYZ2;
g_GIFRegHandlers[GIF_A_D_REG_TEX0_1] = &GIFRegHandlerTEX0_1;
g_GIFRegHandlers[GIF_A_D_REG_TEX0_2] = &GIFRegHandlerTEX0_2;
g_GIFRegHandlers[GIF_A_D_REG_CLAMP_1] = &GIFRegHandlerCLAMP_1;
g_GIFRegHandlers[GIF_A_D_REG_CLAMP_2] = &GIFRegHandlerCLAMP_2;
g_GIFRegHandlers[GIF_A_D_REG_FOG] = &GIFRegHandlerFOG;
g_GIFRegHandlers[GIF_A_D_REG_XYZF3] = &GIFRegHandlerXYZF3;
g_GIFRegHandlers[GIF_A_D_REG_XYZ3] = &GIFRegHandlerXYZ3;
g_GIFRegHandlers[GIF_A_D_REG_NOP] = &GIFRegHandlerNOP;
g_GIFRegHandlers[GIF_A_D_REG_TEX1_1] = &GIFRegHandlerTEX1_1;
g_GIFRegHandlers[GIF_A_D_REG_TEX1_2] = &GIFRegHandlerTEX1_2;
g_GIFRegHandlers[GIF_A_D_REG_TEX2_1] = &GIFRegHandlerTEX2_1;
g_GIFRegHandlers[GIF_A_D_REG_TEX2_2] = &GIFRegHandlerTEX2_2;
g_GIFRegHandlers[GIF_A_D_REG_XYOFFSET_1] = &GIFRegHandlerXYOFFSET_1;
g_GIFRegHandlers[GIF_A_D_REG_XYOFFSET_2] = &GIFRegHandlerXYOFFSET_2;
g_GIFRegHandlers[GIF_A_D_REG_PRMODECONT] = &GIFRegHandlerPRMODECONT;
g_GIFRegHandlers[GIF_A_D_REG_PRMODE] = &GIFRegHandlerPRMODE;
g_GIFRegHandlers[GIF_A_D_REG_TEXCLUT] = &GIFRegHandlerTEXCLUT;
g_GIFRegHandlers[GIF_A_D_REG_SCANMSK] = &GIFRegHandlerSCANMSK;
g_GIFRegHandlers[GIF_A_D_REG_MIPTBP1_1] = &GIFRegHandlerMIPTBP1_1;
g_GIFRegHandlers[GIF_A_D_REG_MIPTBP1_2] = &GIFRegHandlerMIPTBP1_2;
g_GIFRegHandlers[GIF_A_D_REG_MIPTBP2_1] = &GIFRegHandlerMIPTBP2_1;
g_GIFRegHandlers[GIF_A_D_REG_MIPTBP2_2] = &GIFRegHandlerMIPTBP2_2;
g_GIFRegHandlers[GIF_A_D_REG_TEXA] = &GIFRegHandlerTEXA;
g_GIFRegHandlers[GIF_A_D_REG_FOGCOL] = &GIFRegHandlerFOGCOL;
g_GIFRegHandlers[GIF_A_D_REG_TEXFLUSH] = &GIFRegHandlerTEXFLUSH;
g_GIFRegHandlers[GIF_A_D_REG_SCISSOR_1] = &GIFRegHandlerSCISSOR_1;
g_GIFRegHandlers[GIF_A_D_REG_SCISSOR_2] = &GIFRegHandlerSCISSOR_2;
g_GIFRegHandlers[GIF_A_D_REG_ALPHA_1] = &GIFRegHandlerALPHA_1;
g_GIFRegHandlers[GIF_A_D_REG_ALPHA_2] = &GIFRegHandlerALPHA_2;
g_GIFRegHandlers[GIF_A_D_REG_DIMX] = &GIFRegHandlerDIMX;
g_GIFRegHandlers[GIF_A_D_REG_DTHE] = &GIFRegHandlerDTHE;
g_GIFRegHandlers[GIF_A_D_REG_COLCLAMP] = &GIFRegHandlerCOLCLAMP;
g_GIFRegHandlers[GIF_A_D_REG_TEST_1] = &GIFRegHandlerTEST_1;
g_GIFRegHandlers[GIF_A_D_REG_TEST_2] = &GIFRegHandlerTEST_2;
g_GIFRegHandlers[GIF_A_D_REG_PABE] = &GIFRegHandlerPABE;
g_GIFRegHandlers[GIF_A_D_REG_FBA_1] = &GIFRegHandlerFBA_1;
g_GIFRegHandlers[GIF_A_D_REG_FBA_2] = &GIFRegHandlerFBA_2;
g_GIFRegHandlers[GIF_A_D_REG_FRAME_1] = &GIFRegHandlerFRAME_1;
g_GIFRegHandlers[GIF_A_D_REG_FRAME_2] = &GIFRegHandlerFRAME_2;
g_GIFRegHandlers[GIF_A_D_REG_ZBUF_1] = &GIFRegHandlerZBUF_1;
g_GIFRegHandlers[GIF_A_D_REG_ZBUF_2] = &GIFRegHandlerZBUF_2;
g_GIFRegHandlers[GIF_A_D_REG_BITBLTBUF] = &GIFRegHandlerBITBLTBUF;
g_GIFRegHandlers[GIF_A_D_REG_TRXPOS] = &GIFRegHandlerTRXPOS;
g_GIFRegHandlers[GIF_A_D_REG_TRXREG] = &GIFRegHandlerTRXREG;
g_GIFRegHandlers[GIF_A_D_REG_TRXDIR] = &GIFRegHandlerTRXDIR;
g_GIFRegHandlers[GIF_A_D_REG_HWREG] = &GIFRegHandlerHWREG;
SetMultithreaded();
}

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@ -19,6 +19,85 @@
#ifndef __GSREGS_H__
#define __GSREGS_H__
enum GIF_REG
{
GIF_REG_PRIM = 0x00,
GIF_REG_RGBA = 0x01,
GIF_REG_STQ = 0x02,
GIF_REG_UV = 0x03,
GIF_REG_XYZF2 = 0x04,
GIF_REG_XYZ2 = 0x05,
GIF_REG_TEX0_1 = 0x06,
GIF_REG_TEX0_2 = 0x07,
GIF_REG_CLAMP_1 = 0x08,
GIF_REG_CLAMP_2 = 0x09,
GIF_REG_FOG = 0x0a,
GIF_REG_XYZF3 = 0x0c,
GIF_REG_XYZ3 = 0x0d,
GIF_REG_A_D = 0x0e,
GIF_REG_NOP = 0x0f,
};
enum GIF_A_D_REG
{
GIF_A_D_REG_PRIM = 0x00,
GIF_A_D_REG_RGBAQ = 0x01,
GIF_A_D_REG_ST = 0x02,
GIF_A_D_REG_UV = 0x03,
GIF_A_D_REG_XYZF2 = 0x04,
GIF_A_D_REG_XYZ2 = 0x05,
GIF_A_D_REG_TEX0_1 = 0x06,
GIF_A_D_REG_TEX0_2 = 0x07,
GIF_A_D_REG_CLAMP_1 = 0x08,
GIF_A_D_REG_CLAMP_2 = 0x09,
GIF_A_D_REG_FOG = 0x0a,
GIF_A_D_REG_XYZF3 = 0x0c,
GIF_A_D_REG_XYZ3 = 0x0d,
GIF_A_D_REG_NOP = 0x0f,
GIF_A_D_REG_TEX1_1 = 0x14,
GIF_A_D_REG_TEX1_2 = 0x15,
GIF_A_D_REG_TEX2_1 = 0x16,
GIF_A_D_REG_TEX2_2 = 0x17,
GIF_A_D_REG_XYOFFSET_1 = 0x18,
GIF_A_D_REG_XYOFFSET_2 = 0x19,
GIF_A_D_REG_PRMODECONT = 0x1a,
GIF_A_D_REG_PRMODE = 0x1b,
GIF_A_D_REG_TEXCLUT = 0x1c,
GIF_A_D_REG_SCANMSK = 0x22,
GIF_A_D_REG_MIPTBP1_1 = 0x34,
GIF_A_D_REG_MIPTBP1_2 = 0x35,
GIF_A_D_REG_MIPTBP2_1 = 0x36,
GIF_A_D_REG_MIPTBP2_2 = 0x37,
GIF_A_D_REG_TEXA = 0x3b,
GIF_A_D_REG_FOGCOL = 0x3d,
GIF_A_D_REG_TEXFLUSH = 0x3f,
GIF_A_D_REG_SCISSOR_1 = 0x40,
GIF_A_D_REG_SCISSOR_2 = 0x41,
GIF_A_D_REG_ALPHA_1 = 0x42,
GIF_A_D_REG_ALPHA_2 = 0x43,
GIF_A_D_REG_DIMX = 0x44,
GIF_A_D_REG_DTHE = 0x45,
GIF_A_D_REG_COLCLAMP = 0x46,
GIF_A_D_REG_TEST_1 = 0x47,
GIF_A_D_REG_TEST_2 = 0x48,
GIF_A_D_REG_PABE = 0x49,
GIF_A_D_REG_FBA_1 = 0x4a,
GIF_A_D_REG_FBA_2 = 0x4b,
GIF_A_D_REG_FRAME_1 = 0x4c,
GIF_A_D_REG_FRAME_2 = 0x4d,
GIF_A_D_REG_ZBUF_1 = 0x4e,
GIF_A_D_REG_ZBUF_2 = 0x4f,
GIF_A_D_REG_BITBLTBUF = 0x50,
GIF_A_D_REG_TRXPOS = 0x51,
GIF_A_D_REG_TRXREG = 0x52,
GIF_A_D_REG_TRXDIR = 0x53,
GIF_A_D_REG_HWREG = 0x54,
GIF_A_D_REG_SIGNAL = 0x60,
GIF_A_D_REG_FINISH = 0x61,
GIF_A_D_REG_LABEL = 0x62,
};
typedef void (__fastcall *GIFRegHandler)(u32* data);
void __fastcall GIFPackedRegHandlerNull(u32* data);
@ -31,6 +110,15 @@ void __fastcall GIFPackedRegHandlerFOG(u32* data);
void __fastcall GIFPackedRegHandlerA_D(u32* data);
void __fastcall GIFPackedRegHandlerNOP(u32* data);
// These are unimplemented, and fall back on the non-packed versions.
void __fastcall GIFPackedRegHandlerPRIM(u32* data);
void __fastcall GIFPackedRegHandlerTEX0_1(u32* data);
void __fastcall GIFPackedRegHandlerTEX0_2(u32* data);
void __fastcall GIFPackedRegHandlerCLAMP_1(u32* data);
void __fastcall GIFPackedRegHandlerCLAMP_2(u32* data);
void __fastcall GIFPackedRegHandlerXYZF3(u32* data);
void __fastcall GIFPackedRegHandlerXYZ3(u32* data);
void __fastcall GIFRegHandlerNull(u32* data);
void __fastcall GIFRegHandlerPRIM(u32* data);
void __fastcall GIFRegHandlerRGBAQ(u32* data);
@ -88,4 +176,565 @@ void __fastcall GIFRegHandlerSIGNAL(u32* data);
void __fastcall GIFRegHandlerFINISH(u32* data);
void __fastcall GIFRegHandlerLABEL(u32* data);
// GifReg & GifPackedReg structs from GSdx, slightly modified
// GIFReg
REG64_(GIFReg, ALPHA)
u32 A:2;
u32 B:2;
u32 C:2;
u32 D:2;
u32 _PAD1:24;
u32 FIX:8;
u32 _PAD2:24;
REG_END2
// opaque => output will be Cs/As
__forceinline bool IsOpaque() const {return (A == B || C == 2 && FIX == 0) && D == 0 || (A == 0 && B == D && C == 2 && FIX == 0x80);}
__forceinline bool IsOpaque(int amin, int amax) const {return (A == B || amax == 0) && D == 0 || A == 0 && B == D && amin == 0x80 && amax == 0x80;}
REG_END2
REG64_(GIFReg, BITBLTBUF)
u32 SBP:14;
u32 _PAD1:2;
u32 SBW:6;
u32 _PAD2:2;
u32 SPSM:6;
u32 _PAD3:2;
u32 DBP:14;
u32 _PAD4:2;
u32 DBW:6;
u32 _PAD5:2;
u32 DPSM:6;
u32 _PAD6:2;
REG_END
REG64_(GIFReg, CLAMP)
union
{
struct
{
u32 WMS:2;
u32 WMT:2;
u32 MINU:10;
u32 MAXU:10;
u32 _PAD1:8;
u32 _PAD2:2;
u32 MAXV:10;
u32 _PAD3:20;
};
struct
{
u64 _PAD4:24;
u64 MINV:10;
u64 _PAD5:30;
};
};
REG_END
REG64_(GIFReg, COLCLAMP)
u32 CLAMP:1;
u32 _PAD1:31;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, DIMX)
s32 DM00:3;
s32 _PAD00:1;
s32 DM01:3;
s32 _PAD01:1;
s32 DM02:3;
s32 _PAD02:1;
s32 DM03:3;
s32 _PAD03:1;
s32 DM10:3;
s32 _PAD10:1;
s32 DM11:3;
s32 _PAD11:1;
s32 DM12:3;
s32 _PAD12:1;
s32 DM13:3;
s32 _PAD13:1;
s32 DM20:3;
s32 _PAD20:1;
s32 DM21:3;
s32 _PAD21:1;
s32 DM22:3;
s32 _PAD22:1;
s32 DM23:3;
s32 _PAD23:1;
s32 DM30:3;
s32 _PAD30:1;
s32 DM31:3;
s32 _PAD31:1;
s32 DM32:3;
s32 _PAD32:1;
s32 DM33:3;
s32 _PAD33:1;
REG_END
REG64_(GIFReg, DTHE)
u32 DTHE:1;
u32 _PAD1:31;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, FBA)
u32 FBA:1;
u32 _PAD1:31;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, FINISH)
u32 _PAD1:32;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, FOG)
u32 _PAD1:32;
u32 _PAD2:24;
u32 F:8;
REG_END
REG64_(GIFReg, FOGCOL)
u32 FCR:8;
u32 FCG:8;
u32 FCB:8;
u32 _PAD1:8;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, FRAME)
u32 FBP:9;
u32 _PAD1:7;
u32 FBW:6;
u32 _PAD2:2;
u32 PSM:6;
u32 _PAD3:2;
u32 FBMSK:32;
REG_END2
u32 Block() const {return FBP << 5;}
REG_END2
REG64_(GIFReg, HWREG)
u32 DATA_LOWER:32;
u32 DATA_UPPER:32;
REG_END
REG64_(GIFReg, LABEL)
u32 ID:32;
u32 IDMSK:32;
REG_END
REG64_(GIFReg, MIPTBP1)
u64 TBP1:14;
u64 TBW1:6;
u64 TBP2:14;
u64 TBW2:6;
u64 TBP3:14;
u64 TBW3:6;
u64 _PAD:4;
REG_END
REG64_(GIFReg, MIPTBP2)
u64 TBP4:14;
u64 TBW4:6;
u64 TBP5:14;
u64 TBW5:6;
u64 TBP6:14;
u64 TBW6:6;
u64 _PAD:4;
REG_END
REG64_(GIFReg, NOP)
u32 _PAD1:32;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, PABE)
u32 PABE:1;
u32 _PAD1:31;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, PRIM)
u32 PRIM:3;
u32 IIP:1;
u32 TME:1;
u32 FGE:1;
u32 ABE:1;
u32 AA1:1;
u32 FST:1;
u32 CTXT:1;
u32 FIX:1;
u32 _PAD1:21;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, PRMODE)
u32 _PRIM:3;
u32 IIP:1;
u32 TME:1;
u32 FGE:1;
u32 ABE:1;
u32 AA1:1;
u32 FST:1;
u32 CTXT:1;
u32 FIX:1;
u32 _PAD2:21;
u32 _PAD3:32;
REG_END
REG64_(GIFReg, PRMODECONT)
u32 AC:1;
u32 _PAD1:31;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, RGBAQ)
u32 R:8;
u32 G:8;
u32 B:8;
u32 A:8;
float Q;
REG_END
REG64_(GIFReg, SCANMSK)
u32 MSK:2;
u32 _PAD1:30;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, SCISSOR)
u32 SCAX0:11;
u32 _PAD1:5;
u32 SCAX1:11;
u32 _PAD2:5;
u32 SCAY0:11;
u32 _PAD3:5;
u32 SCAY1:11;
u32 _PAD4:5;
REG_END
REG64_(GIFReg, SIGNAL)
u32 ID:32;
u32 IDMSK:32;
REG_END
REG64_(GIFReg, ST)
float S;
float T;
REG_END
REG64_(GIFReg, TEST)
u32 ATE:1;
u32 ATST:3;
u32 AREF:8;
u32 AFAIL:2;
u32 DATE:1;
u32 DATM:1;
u32 ZTE:1;
u32 ZTST:2;
u32 _PAD1:13;
u32 _PAD2:32;
REG_END2
__forceinline bool DoFirstPass() {/*return !ATE || ATST != ATST_NEVER;*/} // not all pixels fail automatically
__forceinline bool DoSecondPass() {/*return ATE && ATST != ATST_ALWAYS && AFAIL != AFAIL_KEEP;*/} // pixels may fail, write fb/z
__forceinline bool NoSecondPass() {/*return ATE && ATST != ATST_ALWAYS && AFAIL == AFAIL_KEEP;*/} // pixels may fail, no output
REG_END2
REG64_(GIFReg, TEX0)
union
{
struct
{
u32 TBP0:14;
u32 TBW:6;
u32 PSM:6;
u32 TW:4;
u32 _PAD1:2;
u32 _PAD2:2;
u32 TCC:1;
u32 TFX:2;
u32 CBP:14;
u32 CPSM:4;
u32 CSM:1;
u32 CSA:5;
u32 CLD:3;
};
struct
{
u64 _PAD3:30;
u64 TH:4;
u64 _PAD4:30;
};
};
REG_END2
__forceinline bool IsRepeating() {return (u32)((u32)1 << TW) > (u32)(TBW << (u32)6);}
REG_END2
REG64_(GIFReg, TEX1)
u32 LCM:1;
u32 _PAD1:1;
u32 MXL:3;
u32 MMAG:1;
u32 MMIN:3;
u32 MTBA:1;
u32 _PAD2:9;
u32 L:2;
u32 _PAD3:11;
s32 K:12; // 1:7:4
u32 _PAD4:20;
REG_END2
bool IsMinLinear() const {return (MMIN == 1) || (MMIN & 4);}
bool IsMagLinear() const {return MMAG;}
REG_END2
REG64_(GIFReg, TEX2)
u32 _PAD1:20;
u32 PSM:6;
u32 _PAD2:6;
u32 _PAD3:5;
u32 CBP:14;
u32 CPSM:4;
u32 CSM:1;
u32 CSA:5;
u32 CLD:3;
REG_END
REG64_(GIFReg, TEXA)
u32 TA0:8;
u32 _PAD1:7;
u32 AEM:1;
u32 _PAD2:16;
u32 TA1:8;
u32 _PAD3:24;
REG_END
REG64_(GIFReg, TEXCLUT)
u32 CBW:6;
u32 COU:6;
u32 COV:10;
u32 _PAD1:10;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, TEXFLUSH)
u32 _PAD1:32;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, TRXDIR)
u32 XDIR:2;
u32 _PAD1:30;
u32 _PAD2:32;
REG_END
REG64_(GIFReg, TRXPOS)
u32 SSAX:11;
u32 _PAD1:5;
u32 SSAY:11;
u32 _PAD2:5;
u32 DSAX:11;
u32 _PAD3:5;
u32 DSAY:11;
u32 DIRY:1;
u32 DIRX:1;
u32 _PAD4:3;
REG_END
REG64_(GIFReg, TRXREG)
u32 RRW:12;
u32 _PAD1:20;
u32 RRH:12;
u32 _PAD2:20;
REG_END
// GSState::GIFPackedRegHandlerUV and GSState::GIFRegHandlerUV will make sure that the _PAD1/2 bits are set to zero
REG64_(GIFReg, UV)
u32 U:16;
// u32 _PAD1:2;
u32 V:16;
// u32 _PAD2:2;
u32 _PAD3:32;
REG_END
// GSState::GIFRegHandlerXYOFFSET will make sure that the _PAD1/2 bits are set to zero
REG64_(GIFReg, XYOFFSET)
u32 OFX; // :16; u32 _PAD1:16;
u32 OFY; // :16; u32 _PAD2:16;
REG_END
REG64_(GIFReg, XYZ)
u32 X:16;
u32 Y:16;
u32 Z:32;
REG_END
REG64_(GIFReg, XYZF)
u32 X:16;
u32 Y:16;
u32 Z:24;
u32 F:8;
REG_END
REG64_(GIFReg, ZBUF)
u32 ZBP:9;
u32 _PAD1:15;
// u32 PSM:4;
// u32 _PAD2:4;
u32 PSM:6;
u32 _PAD2:2;
u32 ZMSK:1;
u32 _PAD3:31;
REG_END2
u32 Block() const {return ZBP << 5;}
REG_END2
REG64_SET(GIFReg)
GIFRegALPHA ALPHA;
GIFRegBITBLTBUF BITBLTBUF;
GIFRegCLAMP CLAMP;
GIFRegCOLCLAMP COLCLAMP;
GIFRegDIMX DIMX;
GIFRegDTHE DTHE;
GIFRegFBA FBA;
GIFRegFINISH FINISH;
GIFRegFOG FOG;
GIFRegFOGCOL FOGCOL;
GIFRegFRAME FRAME;
GIFRegHWREG HWREG;
GIFRegLABEL LABEL;
GIFRegMIPTBP1 MIPTBP1;
GIFRegMIPTBP2 MIPTBP2;
GIFRegNOP NOP;
GIFRegPABE PABE;
GIFRegPRIM PRIM;
GIFRegPRMODE PRMODE;
GIFRegPRMODECONT PRMODECONT;
GIFRegRGBAQ RGBAQ;
GIFRegSCANMSK SCANMSK;
GIFRegSCISSOR SCISSOR;
GIFRegSIGNAL SIGNAL;
GIFRegST ST;
GIFRegTEST TEST;
GIFRegTEX0 TEX0;
GIFRegTEX1 TEX1;
GIFRegTEX2 TEX2;
GIFRegTEXA TEXA;
GIFRegTEXCLUT TEXCLUT;
GIFRegTEXFLUSH TEXFLUSH;
GIFRegTRXDIR TRXDIR;
GIFRegTRXPOS TRXPOS;
GIFRegTRXREG TRXREG;
GIFRegUV UV;
GIFRegXYOFFSET XYOFFSET;
GIFRegXYZ XYZ;
GIFRegXYZF XYZF;
GIFRegZBUF ZBUF;
REG_SET_END
// GIFPacked
REG128_(GIFPacked, PRIM)
u32 PRIM:11;
u32 _PAD1:21;
u32 _PAD2:32;
u32 _PAD3:32;
u32 _PAD4:32;
REG_END
REG128_(GIFPacked, RGBA)
u32 R:8;
u32 _PAD1:24;
u32 G:8;
u32 _PAD2:24;
u32 B:8;
u32 _PAD3:24;
u32 A:8;
u32 _PAD4:24;
REG_END
REG128_(GIFPacked, STQ)
float S;
float T;
float Q;
u32 _PAD1:32;
REG_END
REG128_(GIFPacked, UV)
u32 U:14;
u32 _PAD1:18;
u32 V:14;
u32 _PAD2:18;
u32 _PAD3:32;
u32 _PAD4:32;
REG_END
REG128_(GIFPacked, XYZF2)
u32 X:16;
u32 _PAD1:16;
u32 Y:16;
u32 _PAD2:16;
u32 _PAD3:4;
u32 Z:24;
u32 _PAD4:4;
u32 _PAD5:4;
u32 F:8;
u32 _PAD6:3;
u32 ADC:1;
u32 _PAD7:16;
REG_END
REG128_(GIFPacked, XYZ2)
u32 X:16;
u32 _PAD1:16;
u32 Y:16;
u32 _PAD2:16;
u32 Z:32;
u32 _PAD3:15;
u32 ADC:1;
u32 _PAD4:16;
REG_END
REG128_(GIFPacked, FOG)
u32 _PAD1:32;
u32 _PAD2:32;
u32 _PAD3:32;
u32 _PAD4:4;
u32 F:8;
u32 _PAD5:20;
REG_END
REG128_(GIFPacked, A_D)
u64 DATA:64;
u32 ADDR:8; // enum GIF_A_D_REG
u32 _PAD1:24;
u32 _PAD2:32;
REG_END
REG128_(GIFPacked, NOP)
u32 _PAD1:32;
u32 _PAD2:32;
u32 _PAD3:32;
u32 _PAD4:32;
REG_END
REG128_SET(GIFPackedReg)
GIFReg r;
GIFPackedPRIM PRIM;
GIFPackedRGBA RGBA;
GIFPackedSTQ STQ;
GIFPackedUV UV;
GIFPackedXYZF2 XYZF2;
GIFPackedXYZ2 XYZ2;
GIFPackedFOG FOG;
GIFPackedA_D A_D;
GIFPackedNOP NOP;
REG_SET_END
#endif