mirror of https://github.com/PCSX2/pcsx2.git
Added comments for my previous VU0 sync fix, along with some other code cleanups.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@444 a6443dda-0b58-4228-96e9-037be469359c
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@ -549,6 +549,11 @@ void cpuBranchTest()
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// We're in a BranchTest. All dynarec registers are flushed
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// We're in a BranchTest. All dynarec registers are flushed
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// so there is no need to freeze registers here.
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// so there is no need to freeze registers here.
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Cpu->ExecuteVU0Block();
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Cpu->ExecuteVU0Block();
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// This might be needed to keep the EE and VU0 in sync.
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// A better fix will require hefty changes to the VU recs. -_-
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if(VU0.VI[REG_VPU_STAT].UL & 0x1)
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cpuSetNextBranchDelta( 768 );
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}
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}
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assert( !g_globalXMMSaved X86_32CODE(&& !g_globalMMXSaved) );
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assert( !g_globalXMMSaved X86_32CODE(&& !g_globalMMXSaved) );
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@ -406,9 +406,9 @@ void vu0Finish()
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void VCALLMS() {
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void VCALLMS() {
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vu0Finish();
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vu0Finish();
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vu0ExecMicro(((cpuRegs.code >> 6) & 0x7FFF) * 8);
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vu0ExecMicro(((cpuRegs.code >> 6) & 0x7FFF) * 8);
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}
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}
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void VCALLMSR() {
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void VCALLMSR() {
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vu0Finish();
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vu0Finish();
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vu0ExecMicro(VU0.VI[REG_CMSAR0].US[0] * 8);
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vu0ExecMicro(VU0.VI[REG_CMSAR0].US[0] * 8);
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}
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}
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@ -206,13 +206,16 @@ void vu0ExecMicro(u32 addr) {
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VU0.VI[REG_VPU_STAT].UL|= 0x1;
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VU0.VI[REG_VPU_STAT].UL|= 0x1;
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VU0.VI[REG_VPU_STAT].UL&= ~0xAE;
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VU0.VI[REG_VPU_STAT].UL&= ~0xAE;
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cpuSetNextBranchDelta( 64 );
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if (addr != -1) VU0.VI[REG_TPC].UL = addr;
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if (addr != -1) VU0.VI[REG_TPC].UL = addr;
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_vuExecMicroDebug(VU0);
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_vuExecMicroDebug(VU0);
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FreezeXMMRegs(1);
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FreezeXMMRegs(1);
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Cpu->ExecuteVU0Block();
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Cpu->ExecuteVU0Block();
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FreezeXMMRegs(0);
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FreezeXMMRegs(0);
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// If the VU0 program didn't finish then we'll want to finish it up
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// pretty soon. This fixes vmhacks in some games (Naruto Ultimate Ninja 2)
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if(VU0.VI[REG_VPU_STAT].UL & 0x1)
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cpuSetNextBranchDelta( 128 );
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}
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}
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void _vu0ExecUpper(VURegs* VU, u32 *ptr) {
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void _vu0ExecUpper(VURegs* VU, u32 *ptr) {
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@ -146,11 +146,9 @@ void vu1ExecMicro(u32 addr)
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if(VU0.VI[REG_VPU_STAT].UL & 0x100) {
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if(VU0.VI[REG_VPU_STAT].UL & 0x100) {
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SysPrintf("Previous Microprogram still running on VU1\n");
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SysPrintf("Previous Microprogram still running on VU1\n");
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if( VU0.VI[REG_VPU_STAT].UL & 0x100 ) {
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do {
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do {
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Cpu->ExecuteVU1Block();
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Cpu->ExecuteVU1Block();
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} while(VU0.VI[REG_VPU_STAT].UL & 0x100);
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} while(VU0.VI[REG_VPU_STAT].UL & 0x100);
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}
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}
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}
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VUM_LOG("vu1ExecMicro %x\n", addr);
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VUM_LOG("vu1ExecMicro %x\n", addr);
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VUM_LOG("vu1ExecMicro %x (count=%d)\n", addr, count++);
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VUM_LOG("vu1ExecMicro %x (count=%d)\n", addr, count++);
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@ -161,14 +159,19 @@ void vu1ExecMicro(u32 addr)
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if (addr != -1) VU1.VI[REG_TPC].UL = addr;
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if (addr != -1) VU1.VI[REG_TPC].UL = addr;
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_vuExecMicroDebug(VU1);
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_vuExecMicroDebug(VU1);
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//do {
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//do {
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FreezeXMMRegs(1);
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FreezeXMMRegs(1);
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Cpu->ExecuteVU1Block();
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Cpu->ExecuteVU1Block();
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FreezeXMMRegs(0);
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FreezeXMMRegs(0);
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//} while(VU0.VI[REG_VPU_STAT].UL & 0x100);
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//} while(VU0.VI[REG_VPU_STAT].UL & 0x100);
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// rec can call vu1ExecMicro
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// rec can call vu1ExecMicro
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// VU1 isn't handled by branch tests right now, so this isn't needed.
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// although maybe it should be? VU1 is updated in the intBranchTest, but not the
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// recompiler one. Why? No clue. (air)
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//if( VU1.VI[REG_VPU_STAT].UL & 0x1 )
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// cpuSetNextBranchDelta( 256 );
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}
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}
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void _vu1ExecUpper(VURegs* VU, u32 *ptr) {
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void _vu1ExecUpper(VURegs* VU, u32 *ptr) {
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@ -55,19 +55,21 @@ _vuopinfo g_cop2info = {0, 0, 1, 1, 1, 0, 0};
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#define _Ftf_ ((cpuRegs.code >> 23) & 0x03)
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#define _Ftf_ ((cpuRegs.code >> 23) & 0x03)
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#define _Cc_ (cpuRegs.code & 0x03)
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#define _Cc_ (cpuRegs.code & 0x03)
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#define REC_COP2_FUNC(f, delreg) \
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void recCop2BranchCall( void (*func)() )
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void f(); \
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{
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void rec##f() { \
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X86_32CODE(SetFPUstate());
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SysPrintf("cop2 "#f" called\n"); \
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recBranchCall( func );
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X86_32CODE(SetFPUstate()); \
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_freeX86regs();
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MOV32ItoM((uptr)&cpuRegs.code, cpuRegs.code); \
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MOV32ItoM((uptr)&cpuRegs.pc, pc); \
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iFlushCall(FLUSH_NOCONST); \
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CALLFunc((uptr)f); \
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_freeX86regs(); \
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branch = 2; \
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}
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}
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#define REC_COP2_FUNC( f ) \
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void f(); \
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void rec##f() \
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{ \
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SysPrintf("Warning > cop2 "#f" called\n"); \
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recCop2BranchCall( f ); \
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}
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#define INTERPRETATE_COP2_FUNC(f) \
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#define INTERPRETATE_COP2_FUNC(f) \
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void recV##f() { \
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void recV##f() { \
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MOV32ItoM((uptr)&cpuRegs.code, cpuRegs.code); \
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MOV32ItoM((uptr)&cpuRegs.code, cpuRegs.code); \
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@ -250,9 +252,6 @@ static void recCFC2()
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static void recCTC2()
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static void recCTC2()
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{
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{
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#ifdef __x86_64__
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int mmreg;
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#endif
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if (cpuRegs.code & 1) {
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if (cpuRegs.code & 1) {
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#ifdef __x86_64__
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#ifdef __x86_64__
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iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86);
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iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86);
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@ -289,49 +288,37 @@ static void recCTC2()
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assert( _checkX86reg(X86TYPE_VI, REG_VPU_STAT, 0) < 0 &&
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assert( _checkX86reg(X86TYPE_VI, REG_VPU_STAT, 0) < 0 &&
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_checkX86reg(X86TYPE_VI, REG_TPC, 0) < 0 );
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_checkX86reg(X86TYPE_VI, REG_TPC, 0) < 0 );
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// Execute VU1 Micro SubRoutine
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_callFunctionArg1((uptr)FreezeXMMRegs_, MEM_CONSTTAG, 1);
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_callFunctionArg1((uptr)vu1ExecMicro, MEM_CONSTTAG, g_cpuConstRegs[_Rt_].UL[0]&0xffff);
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_callFunctionArg1((uptr)FreezeXMMRegs_, MEM_CONSTTAG, 0);
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#else
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#else
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iFlushCall(FLUSH_NOCONST);// since CALLFunc
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iFlushCall(FLUSH_NOCONST);// since CALLFunc
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assert( _checkX86reg(X86TYPE_VI, REG_VPU_STAT, 0) < 0 &&
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assert( _checkX86reg(X86TYPE_VI, REG_VPU_STAT, 0) < 0 &&
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_checkX86reg(X86TYPE_VI, REG_TPC, 0) < 0 );
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_checkX86reg(X86TYPE_VI, REG_TPC, 0) < 0 );
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#endif
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// Execute VU1 Micro SubRoutine
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// Execute VU1 Micro SubRoutine
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_callFunctionArg1((uptr)vu1ExecMicro, MEM_CONSTTAG, g_cpuConstRegs[_Rt_].UL[0]&0xffff);
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_callFunctionArg1((uptr)vu1ExecMicro, MEM_CONSTTAG, g_cpuConstRegs[_Rt_].UL[0]&0xffff);
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#endif
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break;
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break;
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default:
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default:
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{
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if( _Fs_ < 16 )
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if( _Fs_ < 16 )
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assert( (g_cpuConstRegs[_Rt_].UL[0]&0xffff0000)==0);
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assert( (g_cpuConstRegs[_Rt_].UL[0]&0xffff0000)==0);
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#ifdef __x86_64__
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mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE);
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if( mmreg >= 0 ) MOV32ItoR(mmreg, g_cpuConstRegs[_Rt_].UL[0]);
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// a lot of games have vu0 spinning on some integer
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// then they modify the register and expect vu0 to stop spinning within 10 cycles (donald duck)
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iFlushCall(FLUSH_FREE_TEMPX86|FLUSH_FREE_VU0);
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_callFunctionArg1((uptr)FreezeXMMRegs_, MEM_CONSTTAG, 1);
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CALLFunc((uptr)Cpu->ExecuteVU0Block);
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_callFunctionArg1((uptr)FreezeXMMRegs_, MEM_CONSTTAG, 0);
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#else
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MOV32ItoM((uptr)&VU0.VI[_Fs_].UL,g_cpuConstRegs[_Rt_].UL[0]);
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// fixme: this code should issue a BranchTest instead of calling the VU0Block directly.
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// It would be a lot safter and would get rid of the 64 bit mess above too.
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// a lot of games have vu0 spinning on some integer
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// a lot of games have vu0 spinning on some integer
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// then they modify the register and expect vu0 to stop spinning within 10 cycles (donald duck)
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// then they modify the register and expect vu0 to stop spinning within 10 cycles (donald duck)
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#ifdef __x86_64__
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int mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE);
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if( mmreg >= 0 ) MOV32ItoR(mmreg, g_cpuConstRegs[_Rt_].UL[0]);
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iFlushCall(FLUSH_FREE_TEMPX86|FLUSH_FREE_VU0);
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#else
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MOV32ItoM((uptr)&VU0.VI[_Fs_].UL,g_cpuConstRegs[_Rt_].UL[0]);
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iFlushCall(FLUSH_NOCONST);
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iFlushCall(FLUSH_NOCONST);
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CALLFunc((uptr)Cpu->ExecuteVU0Block);
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//SysPrintf( "Recompiler Warning > Unstable VU0 opcode used." );
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#endif
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#endif
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CALLFunc((uptr)Cpu->ExecuteVU0Block);
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// fixme: if the VU0 stat&1 is still enabled, then we should probably set a cpuBranchTest
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// for 128 cycles from now. It would be the safest thing to do to make sure the VU0
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// responds in a timely matter to the game's register write.
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break;
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break;
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}
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}
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}
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}
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}
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else
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else
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@ -613,10 +600,10 @@ void _cop2AnalyzeOp(EEINST* pinst, int dostalls)
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//////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////
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// BC2: Instructions
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// BC2: Instructions
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//////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////
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REC_COP2_FUNC(BC2F, 0);
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REC_COP2_FUNC(BC2F);
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REC_COP2_FUNC(BC2T, 0);
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REC_COP2_FUNC(BC2T);
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REC_COP2_FUNC(BC2FL, 0);
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REC_COP2_FUNC(BC2FL);
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REC_COP2_FUNC(BC2TL, 0);
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REC_COP2_FUNC(BC2TL);
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//////////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////////
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// Special1 instructions
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// Special1 instructions
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