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Counters: Pass correct start cycle

This commit is contained in:
refractionpcsx2 2023-11-07 18:19:29 +00:00
parent e3d4b0e56a
commit 8e9fd91cee
1 changed files with 12 additions and 11 deletions
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23
pcsx2/Counters.cpp
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@ -600,13 +600,13 @@ __fi void rcntUpdate_hScanline()
//iopEventAction = 1; //iopEventAction = 1;
if (hsyncCounter.Mode == MODE_HBLANK) if (hsyncCounter.Mode == MODE_HBLANK)
{ //HBLANK Start { //HBLANK Start
rcntStartGate(false, hsyncCounter.sCycle);
psxCheckStartGate16(0);
// Setup the hRender's start and end cycle information: // Setup the hRender's start and end cycle information:
hsyncCounter.sCycle += vSyncInfo.hBlank; // start (absolute cycle value) hsyncCounter.sCycle += vSyncInfo.hBlank; // start (absolute cycle value)
hsyncCounter.CycleT = vSyncInfo.hRender; // endpoint (delta from start value) hsyncCounter.CycleT = vSyncInfo.hRender; // endpoint (delta from start value)
hsyncCounter.Mode = MODE_HRENDER; hsyncCounter.Mode = MODE_HRENDER;
rcntStartGate(false, hsyncCounter.sCycle);
psxCheckStartGate16(0);
} }
else else
{ //HBLANK END / HRENDER Begin { //HBLANK END / HRENDER Begin
@ -616,16 +616,17 @@ __fi void rcntUpdate_hScanline()
if (!GSIMR.HSMSK) if (!GSIMR.HSMSK)
gsIrq(); gsIrq();
} }
if (gates)
rcntEndGate(false, hsyncCounter.sCycle);
if (psxhblankgate)
psxCheckEndGate16(0);
// set up the hblank's start and end cycle information: // set up the hblank's start and end cycle information:
hsyncCounter.sCycle += vSyncInfo.hRender; // start (absolute cycle value) hsyncCounter.sCycle += vSyncInfo.hRender; // start (absolute cycle value)
hsyncCounter.CycleT = vSyncInfo.hBlank; // endpoint (delta from start value) hsyncCounter.CycleT = vSyncInfo.hBlank; // endpoint (delta from start value)
hsyncCounter.Mode = MODE_HBLANK; hsyncCounter.Mode = MODE_HBLANK;
if (gates)
rcntEndGate(false, hsyncCounter.sCycle);
if (psxhblankgate)
psxCheckEndGate16(0);
#ifdef VSYNC_DEBUG #ifdef VSYNC_DEBUG
hsc++; hsc++;
#endif #endif
@ -639,11 +640,11 @@ __fi void rcntUpdate_vSync()
if (vsyncCounter.Mode == MODE_VSYNC) if (vsyncCounter.Mode == MODE_VSYNC)
{ {
VSyncEnd(vsyncCounter.sCycle);
vsyncCounter.sCycle += vSyncInfo.Blank; vsyncCounter.sCycle += vSyncInfo.Blank;
vsyncCounter.CycleT = vSyncInfo.Render; vsyncCounter.CycleT = vSyncInfo.Render;
vsyncCounter.Mode = MODE_VRENDER; vsyncCounter.Mode = MODE_VRENDER;
VSyncEnd(vsyncCounter.sCycle);
} }
else if (vsyncCounter.Mode == MODE_GSBLANK) // GS CSR Swap and interrupt else if (vsyncCounter.Mode == MODE_GSBLANK) // GS CSR Swap and interrupt
{ {
@ -655,8 +656,6 @@ __fi void rcntUpdate_vSync()
} }
else // VSYNC end / VRENDER begin else // VSYNC end / VRENDER begin
{ {
VSyncStart(vsyncCounter.sCycle);
vsyncCounter.sCycle += vSyncInfo.Render; vsyncCounter.sCycle += vSyncInfo.Render;
vsyncCounter.CycleT = vSyncInfo.GSBlank; vsyncCounter.CycleT = vSyncInfo.GSBlank;
vsyncCounter.Mode = MODE_GSBLANK; vsyncCounter.Mode = MODE_GSBLANK;
@ -664,6 +663,8 @@ __fi void rcntUpdate_vSync()
// Accumulate hsync rounding errors: // Accumulate hsync rounding errors:
hsyncCounter.sCycle += vSyncInfo.hSyncError; hsyncCounter.sCycle += vSyncInfo.hSyncError;
VSyncStart(vsyncCounter.sCycle);
#ifdef VSYNC_DEBUG #ifdef VSYNC_DEBUG
vblankinc++; vblankinc++;
if (vblankinc > 1) if (vblankinc > 1)