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microVU: removed some macros making the code more readable... 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@2626 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2010-02-23 03:02:20 +00:00
parent 52327bf37f
commit 8e18083dbf
13 changed files with 110 additions and 113 deletions
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27
pcsx2/x86/microVU.cpp
View File

@ -67,8 +67,7 @@ const __aligned(32) mVU_Globals mVUglob = {
// Micro VU - Main Functions
//------------------------------------------------------------------
microVUt(void) mVUthrowHardwareDeficiency( const wxChar* extFail, int vuIndex )
{
_f void mVUthrowHardwareDeficiency(const wxChar* extFail, int vuIndex) {
throw Exception::HardwareDeficiency(
wxsFormat( L"microVU%d recompiler init failed: %s is not available.", vuIndex, extFail),
wxsFormat(_("%s Extensions not found. microVU requires a host CPU with MMX, SSE, and SSE2 extensions."), extFail )
@ -76,7 +75,7 @@ microVUt(void) mVUthrowHardwareDeficiency( const wxChar* extFail, int vuIndex )
}
// Only run this once per VU! ;)
microVUt(void) mVUinit(VURegs* vuRegsPtr, int vuIndex) {
_f void mVUinit(VURegs* vuRegsPtr, int vuIndex) {
if(!x86caps.hasMultimediaExtensions) mVUthrowHardwareDeficiency( L"MMX", vuIndex );
if(!x86caps.hasStreamingSIMDExtensions) mVUthrowHardwareDeficiency( L"SSE", vuIndex );
@ -118,7 +117,7 @@ microVUt(void) mVUinit(VURegs* vuRegsPtr, int vuIndex) {
}
// Resets Rec Data
microVUt(void) mVUreset(mV) {
_f void mVUreset(mV) {
mVUprint((mVU->index) ? "microVU1: reset" : "microVU0: reset");
@ -148,7 +147,7 @@ microVUt(void) mVUreset(mV) {
}
// Free Allocated Resources
microVUt(void) mVUclose(mV) {
_f void mVUclose(mV) {
mVUprint((mVU->index) ? "microVU1: close" : "microVU0: close");
@ -168,7 +167,7 @@ microVUt(void) mVUclose(mV) {
}
// Clears Block Data in specified range
microVUt(void) mVUclear(mV, u32 addr, u32 size) {
_f void mVUclear(mV, u32 addr, u32 size) {
//if (!mVU->prog.cleared) {
//memset(&mVU->prog.lpState, 0, sizeof(mVU->prog.lpState));
mVU->prog.cleared = 1; // Next execution searches/creates a new microprogram
@ -180,7 +179,7 @@ microVUt(void) mVUclear(mV, u32 addr, u32 size) {
//------------------------------------------------------------------
// Clears program data
microVUf(void) mVUclearProg(int progIndex) {
_mVUt _f void mVUclearProg(int progIndex) {
microVU* mVU = mVUx;
microProgram& program = mVU->prog.prog[progIndex];
@ -199,7 +198,7 @@ microVUf(void) mVUclearProg(int progIndex) {
}
// Caches Micro Program
microVUf(void) mVUcacheProg(int progIndex) {
_mVUt _f void mVUcacheProg(int progIndex) {
microVU* mVU = mVUx;
if (!vuIndex) memcpy_const(mVU->prog.prog[progIndex].data, mVU->regs->Micro, 0x1000);
else memcpy_const(mVU->prog.prog[progIndex].data, mVU->regs->Micro, 0x4000);
@ -207,7 +206,7 @@ microVUf(void) mVUcacheProg(int progIndex) {
}
// Sorts the program list (Moves progIndex to Beginning of ProgList)
microVUt(void) mVUsortProg(mV, int progIndex) {
_f void mVUsortProg(mV, int progIndex) {
int* temp = new int[mVU->prog.max+1];
int offset = 0;
for (int i = 0; i <= (mVU->prog.max-1); i++) {
@ -220,7 +219,7 @@ microVUt(void) mVUsortProg(mV, int progIndex) {
}
// Finds the least used program, (if program list full clears and returns an old program; if not-full, returns free program)
microVUf(int) mVUfindLeastUsedProg() {
_mVUt _f int mVUfindLeastUsedProg() {
microVU* mVU = mVUx;
for (int i = 0; i <= mVU->prog.max; i++) {
@ -253,7 +252,7 @@ microVUf(int) mVUfindLeastUsedProg() {
}
// Finds and Ages/Kills Programs if they haven't been used in a while.
microVUt(void) mVUvsyncUpdate(mV) {
_f void mVUvsyncUpdate(mV) {
for (int i = 0; i <= mVU->prog.max; i++) {
if (mVU->prog.prog[i].isDead) continue;
if (mVU->prog.prog[i].used) {
@ -274,7 +273,7 @@ microVUt(void) mVUvsyncUpdate(mV) {
mVU->prog.curFrame++;
}
microVUf(bool) mVUcmpPartial(int progIndex) {
_mVUt _f bool mVUcmpPartial(int progIndex) {
microVU* mVU = mVUx;
for (int i = 0; i <= mVUprogI.ranges.total; i++) {
if ((mVUprogI.ranges.range[i][0] < 0)
@ -287,7 +286,7 @@ microVUf(bool) mVUcmpPartial(int progIndex) {
}
// Compare Cached microProgram to mVU->regs->Micro
microVUf(bool) mVUcmpProg(int progIndex, const bool checkOld, const bool cmpWholeProg) {
_mVUt _f bool mVUcmpProg(int progIndex, const bool checkOld, const bool cmpWholeProg) {
microVU* mVU = mVUx;
if (!mVUprogI.isDead && (checkOld == mVUprogI.isOld)) {
if ((cmpWholeProg && !memcmp_mmx((u8*)mVUprogI.data, mVU->regs->Micro, mVU->microMemSize))
@ -304,7 +303,7 @@ microVUf(bool) mVUcmpProg(int progIndex, const bool checkOld, const bool cmpWhol
}
// Searches for Cached Micro Program and sets prog.cur to it (returns 1 if program found, else returns 0)
microVUf(int) mVUsearchProg() {
_mVUt _f int mVUsearchProg() {
microVU* mVU = mVUx;
if (mVU->prog.cleared) { // If cleared, we need to search for new program
for (int i = mVU->prog.max; i >= 0; i--) {

26
pcsx2/x86/microVU.h
View File

@ -182,12 +182,12 @@ extern __aligned16 microVU microVU1;
extern int mVUdebugNow;
// Main Functions
microVUt(void) mVUinit(VURegs*, int);
microVUt(void) mVUreset(mV);
microVUt(void) mVUclose(mV);
microVUt(void) mVUclear(mV, u32, u32);
microVUt(void*) mVUblockFetch(microVU* mVU, u32 startPC, uptr pState);
microVUx(void*) __fastcall mVUcompileJIT(u32 startPC, uptr pState);
_f void mVUinit(VURegs*, int);
_f void mVUreset(mV);
_f void mVUclose(mV);
_f void mVUclear(mV, u32, u32);
_f void* mVUblockFetch(microVU* mVU, u32 startPC, uptr pState);
_mVUt void* __fastcall mVUcompileJIT(u32 startPC, uptr pState);
// Prototypes for Linux
void __fastcall mVUcleanUpVU0();
@ -196,13 +196,13 @@ mVUop(mVUopU);
mVUop(mVUopL);
// Private Functions
microVUt(void) mVUsortProg(mV, int progIndex);
microVUf(void) mVUclearProg(int progIndex);
microVUf(int) mVUfindLeastUsedProg(microVU* mVU);
microVUf(int) mVUsearchProg();
microVUf(void) mVUcacheProg(int progIndex);
void* __fastcall mVUexecuteVU0(u32 startPC, u32 cycles);
void* __fastcall mVUexecuteVU1(u32 startPC, u32 cycles);
_f void mVUsortProg(mV, int progIndex);
_mVUt _f void mVUclearProg(int progIndex);
_mVUt _f void mVUcacheProg(int progIndex);
_mVUt _f int mVUfindLeastUsedProg(microVU* mVU);
_mVUt _f int mVUsearchProg();
void* __fastcall mVUexecuteVU0(u32 startPC, u32 cycles);
void* __fastcall mVUexecuteVU1(u32 startPC, u32 cycles);
// recCall Function Pointer
typedef void (__fastcall *mVUrecCall)(u32, u32);

26
pcsx2/x86/microVU_Alloc.inl
View File

@ -50,18 +50,18 @@
x86SetJ8(pjmp); \
}
microVUt(void) mVUallocSFLAGa(int reg, int fInstance) {
_f void mVUallocSFLAGa(int reg, int fInstance) {
getFlagReg(fInstance, fInstance);
MOV32RtoR(reg, fInstance);
}
microVUt(void) mVUallocSFLAGb(int reg, int fInstance) {
_f void mVUallocSFLAGb(int reg, int fInstance) {
getFlagReg(fInstance, fInstance);
MOV32RtoR(fInstance, reg);
}
// Normalize Status Flag
microVUt(void) mVUallocSFLAGc(int reg, int regT, int fInstance) {
_f void mVUallocSFLAGc(int reg, int regT, int fInstance) {
u8 *pjmp;
XOR32RtoR(reg, reg);
mVUallocSFLAGa(regT, fInstance);
@ -75,7 +75,7 @@ microVUt(void) mVUallocSFLAGc(int reg, int regT, int fInstance) {
}
// Denormalizes Status Flag
microVUt(void) mVUallocSFLAGd(uptr memAddr, bool setAllflags) {
_f void mVUallocSFLAGd(uptr memAddr, bool setAllflags) {
// Cannot use EBP (gprF1) here; as this function is used by mVU0 macro and
// the EErec needs EBP preserved.
@ -105,22 +105,22 @@ microVUt(void) mVUallocSFLAGd(uptr memAddr, bool setAllflags) {
}
}
microVUt(void) mVUallocMFLAGa(mV, int reg, int fInstance) {
_f void mVUallocMFLAGa(mV, int reg, int fInstance) {
MOVZX32M16toR(reg, (uptr)&mVU->macFlag[fInstance]);
}
microVUt(void) mVUallocMFLAGb(mV, int reg, int fInstance) {
_f void mVUallocMFLAGb(mV, int reg, int fInstance) {
//AND32ItoR(reg, 0xffff);
if (fInstance < 4) MOV32RtoM((uptr)&mVU->macFlag[fInstance], reg); // microVU
else MOV32RtoM((uptr)&mVU->regs->VI[REG_MAC_FLAG].UL, reg); // macroVU
}
microVUt(void) mVUallocCFLAGa(mV, int reg, int fInstance) {
_f void mVUallocCFLAGa(mV, int reg, int fInstance) {
if (fInstance < 4) MOV32MtoR(reg, (uptr)&mVU->clipFlag[fInstance]); // microVU
else MOV32MtoR(reg, (uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL); // macroVU
}
microVUt(void) mVUallocCFLAGb(mV, int reg, int fInstance) {
_f void mVUallocCFLAGb(mV, int reg, int fInstance) {
if (fInstance < 4) MOV32RtoM((uptr)&mVU->clipFlag[fInstance], reg); // microVU
else MOV32RtoM((uptr)&mVU->regs->VI[REG_CLIP_FLAG].UL, reg); // macroVU
}
@ -129,12 +129,12 @@ microVUt(void) mVUallocCFLAGb(mV, int reg, int fInstance) {
// VI Reg Allocators
//------------------------------------------------------------------
microVUt(void) mVUallocVIa(mV, int GPRreg, int _reg_) {
_f void mVUallocVIa(mV, int GPRreg, int _reg_) {
if (!_reg_) { XOR32RtoR(GPRreg, GPRreg); }
else { MOVZX32M16toR(GPRreg, (uptr)&mVU->regs->VI[_reg_].UL); }
}
microVUt(void) mVUallocVIb(mV, int GPRreg, int _reg_) {
_f void mVUallocVIb(mV, int GPRreg, int _reg_) {
if (mVUlow.backupVI) { // Backs up reg to memory (used when VI is modified b4 a branch)
MOVZX32M16toR(gprT3, (uptr)&mVU->regs->VI[_reg_].UL);
MOV32RtoM((uptr)&mVU->VIbackup, gprT3);
@ -147,17 +147,17 @@ microVUt(void) mVUallocVIb(mV, int GPRreg, int _reg_) {
// I/P/Q Reg Allocators
//------------------------------------------------------------------
microVUt(void) getPreg(mV, int reg) {
_f void getPreg(mV, int reg) {
mVUunpack_xyzw(reg, xmmPQ, (2 + mVUinfo.readP));
/*if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2(reg, xmmT1, 15);*/
}
microVUt(void) getQreg(int reg, int qInstance) {
_f void getQreg(int reg, int qInstance) {
mVUunpack_xyzw(reg, xmmPQ, qInstance);
/*if (CHECK_VU_EXTRA_OVERFLOW) mVUclamp2<vuIndex>(reg, xmmT1, 15);*/
}
microVUt(void) writeQreg(int reg, int qInstance) {
_f void writeQreg(int reg, int qInstance) {
if (qInstance) {
if (!x86caps.hasStreamingSIMD4Extensions) {
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, 0xe1);

58
pcsx2/x86/microVU_Analyze.inl
View File

@ -118,7 +118,7 @@
// FMAC1 - Normal FMAC Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeFMAC1(mV, int Fd, int Fs, int Ft) {
_f void mVUanalyzeFMAC1(mV, int Fd, int Fs, int Ft) {
sFLAG.doFlag = 1;
analyzeReg1(Fs, mVUup.VF_read[0]);
analyzeReg1(Ft, mVUup.VF_read[1]);
@ -129,7 +129,7 @@ microVUt(void) mVUanalyzeFMAC1(mV, int Fd, int Fs, int Ft) {
// FMAC2 - ABS/FTOI/ITOF Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeFMAC2(mV, int Fs, int Ft) {
_f void mVUanalyzeFMAC2(mV, int Fs, int Ft) {
analyzeReg1(Fs, mVUup.VF_read[0]);
analyzeReg2(Ft, mVUup.VF_write, 0);
}
@ -138,7 +138,7 @@ microVUt(void) mVUanalyzeFMAC2(mV, int Fs, int Ft) {
// FMAC3 - BC(xyzw) FMAC Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeFMAC3(mV, int Fd, int Fs, int Ft) {
_f void mVUanalyzeFMAC3(mV, int Fd, int Fs, int Ft) {
sFLAG.doFlag = 1;
analyzeReg1(Fs, mVUup.VF_read[0]);
analyzeReg3(Ft, mVUup.VF_read[1]);
@ -149,7 +149,7 @@ microVUt(void) mVUanalyzeFMAC3(mV, int Fd, int Fs, int Ft) {
// FMAC4 - Clip FMAC Opcode
//------------------------------------------------------------------
microVUt(void) mVUanalyzeFMAC4(mV, int Fs, int Ft) {
_f void mVUanalyzeFMAC4(mV, int Fs, int Ft) {
cFLAG.doFlag = 1;
analyzeReg1(Fs, mVUup.VF_read[0]);
analyzeReg4(Ft, mVUup.VF_read[1]);
@ -159,20 +159,20 @@ microVUt(void) mVUanalyzeFMAC4(mV, int Fs, int Ft) {
// IALU - IALU Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeIALU1(mV, int Id, int Is, int It) {
_f void mVUanalyzeIALU1(mV, int Id, int Is, int It) {
if (!Id) { mVUlow.isNOP = 1; }
analyzeVIreg1(Is, mVUlow.VI_read[0]);
analyzeVIreg1(It, mVUlow.VI_read[1]);
analyzeVIreg2(Id, mVUlow.VI_write, 1);
}
microVUt(void) mVUanalyzeIALU2(mV, int Is, int It) {
_f void mVUanalyzeIALU2(mV, int Is, int It) {
if (!It) { mVUlow.isNOP = 1; }
analyzeVIreg1(Is, mVUlow.VI_read[0]);
analyzeVIreg2(It, mVUlow.VI_write, 1);
}
microVUt(void) mVUanalyzeIADDI(mV, int Is, int It, s16 imm) {
_f void mVUanalyzeIADDI(mV, int Is, int It, s16 imm) {
mVUanalyzeIALU2(mVU, Is, It);
if (!Is) { setConstReg(It, imm); }
}
@ -181,7 +181,7 @@ microVUt(void) mVUanalyzeIADDI(mV, int Is, int It, s16 imm) {
// MR32 - MR32 Opcode
//------------------------------------------------------------------
microVUt(void) mVUanalyzeMR32(mV, int Fs, int Ft) {
_f void mVUanalyzeMR32(mV, int Fs, int Ft) {
if (!Ft) { mVUlow.isNOP = 1; }
analyzeReg6(Fs, mVUlow.VF_read[0]);
analyzeReg2(Ft, mVUlow.VF_write, 1);
@ -191,7 +191,7 @@ microVUt(void) mVUanalyzeMR32(mV, int Fs, int Ft) {
// FDIV - DIV/SQRT/RSQRT Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeFDIV(mV, int Fs, int Fsf, int Ft, int Ftf, u8 xCycles) {
_f void mVUanalyzeFDIV(mV, int Fs, int Fsf, int Ft, int Ftf, u8 xCycles) {
mVUprint("microVU: DIV Opcode");
analyzeReg5(Fs, Fsf, mVUlow.VF_read[0]);
analyzeReg5(Ft, Ftf, mVUlow.VF_read[1]);
@ -202,13 +202,13 @@ microVUt(void) mVUanalyzeFDIV(mV, int Fs, int Fsf, int Ft, int Ftf, u8 xCycles)
// EFU - EFU Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeEFU1(mV, int Fs, int Fsf, u8 xCycles) {
_f void mVUanalyzeEFU1(mV, int Fs, int Fsf, u8 xCycles) {
mVUprint("microVU: EFU Opcode");
analyzeReg5(Fs, Fsf, mVUlow.VF_read[0]);
analyzePreg(xCycles);
}
microVUt(void) mVUanalyzeEFU2(mV, int Fs, u8 xCycles) {
_f void mVUanalyzeEFU2(mV, int Fs, u8 xCycles) {
mVUprint("microVU: EFU Opcode");
analyzeReg1(Fs, mVUlow.VF_read[0]);
analyzePreg(xCycles);
@ -218,7 +218,7 @@ microVUt(void) mVUanalyzeEFU2(mV, int Fs, u8 xCycles) {
// MFP - MFP Opcode
//------------------------------------------------------------------
microVUt(void) mVUanalyzeMFP(mV, int Ft) {
_f void mVUanalyzeMFP(mV, int Ft) {
if (!Ft) { mVUlow.isNOP = 1; }
analyzeReg2(Ft, mVUlow.VF_write, 1);
}
@ -227,7 +227,7 @@ microVUt(void) mVUanalyzeMFP(mV, int Ft) {
// MOVE - MOVE Opcode
//------------------------------------------------------------------
microVUt(void) mVUanalyzeMOVE(mV, int Fs, int Ft) {
_f void mVUanalyzeMOVE(mV, int Fs, int Ft) {
if (!Ft || (Ft == Fs)) { mVUlow.isNOP = 1; }
analyzeReg1(Fs, mVUlow.VF_read[0]);
analyzeReg2(Ft, mVUlow.VF_write, 1);
@ -237,7 +237,7 @@ microVUt(void) mVUanalyzeMOVE(mV, int Fs, int Ft) {
// LQx - LQ/LQD/LQI Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeLQ(mV, int Ft, int Is, bool writeIs) {
_f void mVUanalyzeLQ(mV, int Ft, int Is, bool writeIs) {
analyzeVIreg1(Is, mVUlow.VI_read[0]);
analyzeReg2 (Ft, mVUlow.VF_write, 1);
if (!Ft) { if (writeIs && Is) { mVUlow.noWriteVF = 1; } else { mVUlow.isNOP = 1; } }
@ -248,7 +248,7 @@ microVUt(void) mVUanalyzeLQ(mV, int Ft, int Is, bool writeIs) {
// SQx - SQ/SQD/SQI Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeSQ(mV, int Fs, int It, bool writeIt) {
_f void mVUanalyzeSQ(mV, int Fs, int It, bool writeIt) {
analyzeReg1 (Fs, mVUlow.VF_read[0]);
analyzeVIreg1(It, mVUlow.VI_read[0]);
if (writeIt) { analyzeVIreg2(It, mVUlow.VI_write, 1); }
@ -258,12 +258,12 @@ microVUt(void) mVUanalyzeSQ(mV, int Fs, int It, bool writeIt) {
// R*** - R Reg Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeR1(mV, int Fs, int Fsf) {
_f void mVUanalyzeR1(mV, int Fs, int Fsf) {
analyzeReg5(Fs, Fsf, mVUlow.VF_read[0]);
analyzeRreg();
}
microVUt(void) mVUanalyzeR2(mV, int Ft, bool canBeNOP) {
_f void mVUanalyzeR2(mV, int Ft, bool canBeNOP) {
if (!Ft) { if (canBeNOP) { mVUlow.isNOP = 1; } else { mVUlow.noWriteVF = 1; } }
analyzeReg2(Ft, mVUlow.VF_write, 1);
analyzeRreg();
@ -272,7 +272,7 @@ microVUt(void) mVUanalyzeR2(mV, int Ft, bool canBeNOP) {
//------------------------------------------------------------------
// Sflag - Status Flag Opcodes
//------------------------------------------------------------------
microVUt(void) flagSet(mV, bool setMacFlag) {
_f void flagSet(mV, bool setMacFlag) {
int curPC = iPC;
for (int i = mVUcount, j = 0; i > 0; i--, j++) {
j += mVUstall;
@ -286,7 +286,7 @@ microVUt(void) flagSet(mV, bool setMacFlag) {
iPC = curPC;
}
microVUt(void) mVUanalyzeSflag(mV, int It) {
_f void mVUanalyzeSflag(mV, int It) {
mVUlow.readFlags = 1;
analyzeVIreg2(It, mVUlow.VI_write, 1);
if (!It) { mVUlow.isNOP = 1; }
@ -298,7 +298,7 @@ microVUt(void) mVUanalyzeSflag(mV, int It) {
}
}
microVUt(void) mVUanalyzeFSSET(mV) {
_f void mVUanalyzeFSSET(mV) {
mVUlow.isFSSET = 1;
mVUlow.readFlags = 1;
}
@ -307,7 +307,7 @@ microVUt(void) mVUanalyzeFSSET(mV) {
// Mflag - Mac Flag Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
_f void mVUanalyzeMflag(mV, int Is, int It) {
mVUlow.readFlags = 1;
analyzeVIreg1(Is, mVUlow.VI_read[0]);
analyzeVIreg2(It, mVUlow.VI_write, 1);
@ -323,7 +323,7 @@ microVUt(void) mVUanalyzeMflag(mV, int Is, int It) {
// Cflag - Clip Flag Opcodes
//------------------------------------------------------------------
microVUt(void) mVUanalyzeCflag(mV, int It) {
_f void mVUanalyzeCflag(mV, int It) {
mVUinfo.swapOps = 1;
mVUlow.readFlags = 1;
if (mVUcount < 4) { mVUpBlock->pState.needExactMatch |= 4; }
@ -334,7 +334,7 @@ microVUt(void) mVUanalyzeCflag(mV, int It) {
// XGkick
//------------------------------------------------------------------
microVUt(void) mVUanalyzeXGkick(mV, int Fs, int xCycles) {
_f void mVUanalyzeXGkick(mV, int Fs, int xCycles) {
analyzeVIreg1(Fs, mVUlow.VI_read[0]);
analyzeXGkick1();
analyzeXGkick2(xCycles);
@ -350,7 +350,7 @@ microVUt(void) mVUanalyzeXGkick(mV, int Fs, int xCycles) {
// Branches - Branch Opcodes
//------------------------------------------------------------------
microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) {
_f void analyzeBranchVI(mV, int xReg, bool &infoVar) {
if (!xReg) return;
int i;
int iEnd = aMin(5, (mVUcount+1));
@ -386,7 +386,7 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) {
}
// Branch in Branch Delay-Slots
microVUt(int) mVUbranchCheck(mV) {
_f int mVUbranchCheck(mV) {
if (!mVUcount) return 0;
incPC(-2);
if (mVUlow.branch) {
@ -401,14 +401,14 @@ microVUt(int) mVUbranchCheck(mV) {
return 0;
}
microVUt(void) mVUanalyzeCondBranch1(mV, int Is) {
_f void mVUanalyzeCondBranch1(mV, int Is) {
analyzeVIreg1(Is, mVUlow.VI_read[0]);
if (!mVUstall && !mVUbranchCheck(mVU)) {
analyzeBranchVI(mVU, Is, mVUlow.memReadIs);
}
}
microVUt(void) mVUanalyzeCondBranch2(mV, int Is, int It) {
_f void mVUanalyzeCondBranch2(mV, int Is, int It) {
analyzeVIreg1(Is, mVUlow.VI_read[0]);
analyzeVIreg1(It, mVUlow.VI_read[1]);
if (!mVUstall && !mVUbranchCheck(mVU)) {
@ -417,7 +417,7 @@ microVUt(void) mVUanalyzeCondBranch2(mV, int Is, int It) {
}
}
microVUt(void) mVUanalyzeNormBranch(mV, int It, bool isBAL) {
_f void mVUanalyzeNormBranch(mV, int It, bool isBAL) {
mVUbranchCheck(mVU);
if (isBAL) {
analyzeVIreg2(It, mVUlow.VI_write, 1);
@ -425,7 +425,7 @@ microVUt(void) mVUanalyzeNormBranch(mV, int It, bool isBAL) {
}
}
microVUt(void) mVUanalyzeJump(mV, int Is, int It, bool isJALR) {
_f void mVUanalyzeJump(mV, int Is, int It, bool isJALR) {
mVUbranchCheck(mVU);
mVUlow.branch = (isJALR) ? 10 : 9;
if (mVUconstReg[Is].isValid && !CHECK_VU_CONSTHACK) {

8
pcsx2/x86/microVU_Branch.inl
View File

@ -15,14 +15,14 @@
#pragma once
microVUt(void) mVUincCycles(mV, int x);
microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState);
_f void mVUincCycles(mV, int x);
_r void* mVUcompile(microVU* mVU, u32 startPC, uptr pState);
#define blockCreate(addr) { if (!mVUblocks[addr]) mVUblocks[addr] = new microBlockManager(); }
#define sI ((mVUpBlock->pState.needExactMatch & 1) ? 3 : ((mVUpBlock->pState.flags >> 0) & 3))
#define cI ((mVUpBlock->pState.needExactMatch & 4) ? 3 : ((mVUpBlock->pState.flags >> 2) & 3))
microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
_f void mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
int fStatus = (isEbit) ? findFlagInst(mFC->xStatus, 0x7fffffff) : sI;
int fMac = (isEbit) ? findFlagInst(mFC->xMac, 0x7fffffff) : 0;
@ -80,7 +80,7 @@ microVUt(void) mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
}
// Recompiles Code for Proper Flags and Q/P regs on Block Linkings
microVUt(void) mVUsetupBranch(mV, microFlagCycles& mFC) {
_f void mVUsetupBranch(mV, microFlagCycles& mFC) {
mVU->regAlloc->flushAll(); // Flush Allocated Regs
mVUsetupFlags(mVU, mFC); // Shuffle Flag Instances

34
pcsx2/x86/microVU_Compile.inl
View File

@ -32,7 +32,7 @@
//------------------------------------------------------------------
// Used by mVUsetupRange
microVUt(void) mVUcheckIsSame(mV) {
_f void mVUcheckIsSame(mV) {
if (mVU->prog.isSame == -1) {
mVU->prog.isSame = !memcmp_mmx((u8*)mVUcurProg.data, mVU->regs->Micro, mVU->microMemSize);
@ -45,7 +45,7 @@ microVUt(void) mVUcheckIsSame(mV) {
}
// Sets up microProgram PC ranges based on whats been recompiled
microVUt(void) mVUsetupRange(mV, s32 pc, bool isStartPC) {
_f void mVUsetupRange(mV, s32 pc, bool isStartPC) {
if (isStartPC || !(mVUrange[1] == -1)) {
for (int i = 0; i <= mVUcurProg.ranges.total; i++) {
@ -106,7 +106,7 @@ microVUt(void) mVUsetupRange(mV, s32 pc, bool isStartPC) {
}
}
microVUt(void) startLoop(mV) {
_f void startLoop(mV) {
if (curI & _Mbit_) { Console.WriteLn(Color_Green, "microVU%d: M-bit set!", getIndex); }
if (curI & _Dbit_) { DevCon.WriteLn (Color_Green, "microVU%d: D-bit set!", getIndex); }
if (curI & _Tbit_) { DevCon.WriteLn (Color_Green, "microVU%d: T-bit set!", getIndex); }
@ -114,7 +114,7 @@ microVUt(void) startLoop(mV) {
memzero(mVUregsTemp);
}
microVUt(void) doIbit(mV) {
_f void doIbit(mV) {
if (mVUup.iBit) {
incPC(-1);
u32 tempI;
@ -131,7 +131,7 @@ microVUt(void) doIbit(mV) {
}
}
microVUt(void) doSwapOp(mV) {
_f void doSwapOp(mV) {
if (mVUinfo.backupVF && !mVUlow.noWriteVF) {
DevCon.WriteLn(Color_Green, "microVU%d: Backing Up VF Reg [%04x]", getIndex, xPC);
int t1 = mVU->regAlloc->allocReg(mVUlow.VF_write.reg);
@ -154,7 +154,7 @@ microVUt(void) doSwapOp(mV) {
else { mVUopL(mVU, 1); incPC(1); doUpperOp(); }
}
microVUt(void) branchWarning(mV) {
_f void branchWarning(mV) {
incPC(-2);
if (mVUup.eBit && mVUbranch) {
incPC(2);
@ -170,14 +170,14 @@ microVUt(void) branchWarning(mV) {
}
}
microVUt(void) eBitPass1(mV, int& branch) {
_f void eBitPass1(mV, int& branch) {
if (mVUregs.blockType != 1) {
branch = 1;
mVUup.eBit = 1;
}
}
microVUt(void) eBitWarning(mV) {
_f void eBitWarning(mV) {
if (mVUpBlock->pState.blockType == 1) Console.Error("microVU%d Warning: Branch, E-bit, Branch! [%04x]", mVU->index, xPC);
if (mVUpBlock->pState.blockType == 2) Console.Error("microVU%d Warning: Branch, Branch, Branch! [%04x]", mVU->index, xPC);
incPC(2);
@ -189,7 +189,7 @@ microVUt(void) eBitWarning(mV) {
}
// Optimizes the End Pipeline State Removing Unnecessary Info
microVUt(void) mVUoptimizePipeState(mV) {
_f void mVUoptimizePipeState(mV) {
for (int i = 0; i < 32; i++) {
optimizeReg(mVUregs.VF[i].x);
optimizeReg(mVUregs.VF[i].y);
@ -204,7 +204,7 @@ microVUt(void) mVUoptimizePipeState(mV) {
mVUregs.r = 0; // There are no stalls on the R-reg, so its Safe to discard info
}
microVUt(void) mVUincCycles(mV, int x) {
_f void mVUincCycles(mV, int x) {
mVUcycles += x;
for (int z = 31; z > 0; z--) {
calcCycles(mVUregs.VF[z].x, x);
@ -241,7 +241,7 @@ microVUt(void) mVUincCycles(mV, int x) {
} \
}
microVUt(void) mVUsetCycles(mV) {
_f void mVUsetCycles(mV) {
mVUincCycles(mVU, mVUstall);
// If upper Op && lower Op write to same VF reg:
if ((mVUregsTemp.VFreg[0] == mVUregsTemp.VFreg[1]) && mVUregsTemp.VFreg[0]) {
@ -281,7 +281,7 @@ void __fastcall mVUwarning1(mV) { Console.Error("microVU1 Warning: Exiting from
void __fastcall mVUprintPC1(u32 PC) { Console.Write("Block PC [%04x] ", PC); }
void __fastcall mVUprintPC2(u32 PC) { Console.Write("[%04x]\n", PC); }
microVUt(void) mVUtestCycles(mV) {
_f void mVUtestCycles(mV) {
//u32* vu0jmp;
iPC = mVUstartPC;
mVUdebugNOW(0);
@ -299,7 +299,7 @@ microVUt(void) mVUtestCycles(mV) {
}
// Initialize VI Constants (vi15 propagates through blocks)
microVUt(void) mVUinitConstValues(microVU* mVU) {
_f void mVUinitConstValues(microVU* mVU) {
for (int i = 0; i < 16; i++) {
mVUconstReg[i].isValid = 0;
mVUconstReg[i].regValue = 0;
@ -309,7 +309,7 @@ microVUt(void) mVUinitConstValues(microVU* mVU) {
}
// Initialize Variables
microVUt(void) mVUinitFirstPass(microVU* mVU, uptr pState, u8* thisPtr) {
_f void mVUinitFirstPass(microVU* mVU, uptr pState, u8* thisPtr) {
mVUstartPC = iPC; // Block Start PC
mVUbranch = 0; // Branch Type
mVUcount = 0; // Number of instructions ran
@ -333,7 +333,7 @@ microVUt(void) mVUinitFirstPass(microVU* mVU, uptr pState, u8* thisPtr) {
// Recompiler
//------------------------------------------------------------------
microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
_r void* mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
microFlagCycles mFC;
u8* thisPtr = x86Ptr;
@ -412,7 +412,7 @@ microVUr(void*) mVUcompile(microVU* mVU, u32 startPC, uptr pState) {
}
// Search for Existing Compiled Block (if found, return x86ptr; else, compile and return x86ptr)
microVUt(void*) mVUblockFetch(microVU* mVU, u32 startPC, uptr pState) {
_f void* mVUblockFetch(microVU* mVU, u32 startPC, uptr pState) {
if (startPC > mVU->microMemSize-8) { DevCon.Error("microVU%d: invalid startPC [%04x]", mVU->index, startPC); }
startPC &= mVU->microMemSize-8;
@ -424,6 +424,6 @@ microVUt(void*) mVUblockFetch(microVU* mVU, u32 startPC, uptr pState) {
}
// mVUcompileJIT() - Called By JR/JALR during execution
microVUx(void*) __fastcall mVUcompileJIT(u32 startPC, uptr pState) {
_mVUt void* __fastcall mVUcompileJIT(u32 startPC, uptr pState) {
return mVUblockFetch(mVUx, startPC, pState);
}

4
pcsx2/x86/microVU_Execute.inl
View File

@ -100,7 +100,7 @@ void mVUdispatcherB(mV) {
//------------------------------------------------------------------
// Executes for number of cycles
microVUx(void*) __fastcall mVUexecute(u32 startPC, u32 cycles) {
_mVUt void* __fastcall mVUexecute(u32 startPC, u32 cycles) {
microVU* mVU = mVUx;
mVUprint("microVU%x: startPC = 0x%x, cycles = 0x%x", vuIndex, startPC, cycles);
@ -117,7 +117,7 @@ microVUx(void*) __fastcall mVUexecute(u32 startPC, u32 cycles) {
// Cleanup Functions
//------------------------------------------------------------------
microVUx(void) mVUcleanUp() {
_mVUt void mVUcleanUp() {
microVU* mVU = mVUx;
//mVUprint("microVU: Program exited successfully!");
//mVUprint("microVU: VF0 = {%x,%x,%x,%x}", mVU->regs->VF[0].UL[0], mVU->regs->VF[0].UL[1], mVU->regs->VF[0].UL[2], mVU->regs->VF[0].UL[3]);

10
pcsx2/x86/microVU_Flags.inl
View File

@ -19,7 +19,7 @@
#pragma once
// Sets FDIV Flags at the proper time
microVUt(void) mVUdivSet(mV) {
_f void mVUdivSet(mV) {
int flagReg1, flagReg2;
if (mVUinfo.doDivFlag) {
getFlagReg(flagReg1, sFLAG.write);
@ -30,7 +30,7 @@ microVUt(void) mVUdivSet(mV) {
}
// Optimizes out unneeded status flag updates
microVUt(void) mVUstatusFlagOp(mV) {
_f void mVUstatusFlagOp(mV) {
int curPC = iPC;
int i = mVUcount;
bool runLoop = 1;
@ -78,7 +78,7 @@ int sortFlag(int* fFlag, int* bFlag, int cycles) {
#define sHackCond (mVUsFlagHack && !sFLAG.doNonSticky)
// Note: Flag handling is 'very' complex, it requires full knowledge of how microVU recs work, so don't touch!
microVUt(void) mVUsetFlags(mV, microFlagCycles& mFC) {
_f void mVUsetFlags(mV, microFlagCycles& mFC) {
int endPC = iPC;
u32 aCount = 1; // Amount of instructions needed to get valid mac flag instances for block linking
@ -165,7 +165,7 @@ microVUt(void) mVUsetFlags(mV, microFlagCycles& mFC) {
#define shuffleClip ((bClip[3]<<6)|(bClip[2]<<4)|(bClip[1]<<2)|bClip[0])
// Recompiles Code for Proper Flags on Block Linkings
microVUt(void) mVUsetupFlags(mV, microFlagCycles& mFC) {
_f void mVUsetupFlags(mV, microFlagCycles& mFC) {
if (__Status) {
int bStatus[4];
@ -262,7 +262,7 @@ void mVUflagPass(mV, u32 startPC, u32 xCount) {
#define branchType3 else // Conditional Branch
// Checks if the first 4 instructions of a block will read flags
microVUt(void) mVUsetFlagInfo(mV) {
_f void mVUsetFlagInfo(mV) {
branchType1 { incPC(-1); mVUflagPass(mVU, branchAddr, 4); incPC(1); }
branchType2 {
if (!mVUlow.constJump.isValid || CHECK_VU_CONSTHACK) { mVUregs.needExactMatch |= 0x7; }

4
pcsx2/x86/microVU_Log.inl
View File

@ -18,7 +18,7 @@
#include "Utilities/AsciiFile.h"
// writes text directly to mVU->logFile, no newlines appended.
microVUx(void) __mVULog(const char* fmt, ...) {
_mVUt void __mVULog(const char* fmt, ...) {
microVU* mVU = mVUx;
if (!mVU->logFile) return;
@ -39,7 +39,7 @@ microVUx(void) __mVULog(const char* fmt, ...) {
#include "AppConfig.h"
microVUx(void) __mVUdumpProgram(int progIndex) {
_mVUt void __mVUdumpProgram(int progIndex) {
microVU* mVU = mVUx;
bool bitX[7];
int delay = 0;

8
pcsx2/x86/microVU_Lower.inl
View File

@ -157,7 +157,7 @@ mVUop(mVU_RSQRT) {
}
// ToDo: Can Be Optimized Further? (takes approximately (~115 cycles + mem access time) on a c2d)
microVUt(void) mVU_EATAN_(mV, int PQ, int Fs, int t1, int t2) {
_f void mVU_EATAN_(mV, int PQ, int Fs, int t1, int t2) {
SSE_MOVSS_XMM_to_XMM (PQ, Fs);
SSE_MULSS_M32_to_XMM (PQ, (uptr)mVUglob.T1);
SSE_MOVAPS_XMM_to_XMM(t2, Fs);
@ -273,7 +273,7 @@ mVUop(mVU_EEXP) {
}
// sumXYZ(): PQ.x = x ^ 2 + y ^ 2 + z ^ 2
microVUt(void) mVU_sumXYZ(mV, int PQ, int Fs) {
_f void mVU_sumXYZ(mV, int PQ, int Fs) {
if( x86caps.hasStreamingSIMD4Extensions ) {
SSE4_DPPS_XMM_to_XMM(Fs, Fs, 0x71);
SSE_MOVSS_XMM_to_XMM(PQ, Fs);
@ -1008,7 +1008,7 @@ mVUop(mVU_RINIT) {
pass3 { mVUlog("RINIT R, vf%02d%s", _Fs_, _Fsf_String); }
}
microVUt(void) mVU_RGET_(mV, int Rreg) {
_f void mVU_RGET_(mV, int Rreg) {
if (!mVUlow.noWriteVF) {
int Ft = mVU->regAlloc->allocReg(-1, _Ft_, _X_Y_Z_W);
SSE2_MOVD_R_to_XMM(Ft, Rreg);
@ -1124,7 +1124,7 @@ void __fastcall mVU_XGKICK_(u32 addr) {
GetMTGS().SendDataPacket();
}
microVUt(void) mVU_XGKICK_DELAY(mV, bool memVI) {
_f void mVU_XGKICK_DELAY(mV, bool memVI) {
mVUbackupRegs(mVU);
if (memVI) MOV32MtoR(gprT2, (uptr)&mVU->VIxgkick);
else mVUallocVIa(mVU, gprT2, _Is_);

10
pcsx2/x86/microVU_Misc.h
View File

@ -119,12 +119,10 @@ extern const __aligned(32) mVU_Globals mVUglob;
#endif
// Function/Template Stuff
#define mVUx (vuIndex ? &microVU1 : &microVU0)
#define mVUop(opName) static void opName (mP)
#define microVUr(aType) static __recInline aType
#define microVUt(aType) static __forceinline aType
#define microVUx(aType) template<int vuIndex> aType
#define microVUf(aType) template<int vuIndex> __forceinline aType
#define mVUx (vuIndex ? &microVU1 : &microVU0)
#define mVUop(opName) static void opName (mP)
#define _mVUt template<int vuIndex>
#define _r static __recInline
// Define Passes
#define pass1 if (recPass == 0)

6
pcsx2/x86/microVU_Misc.inl
View File

@ -241,7 +241,7 @@ void mVUmergeRegs(int dest, int src, int xyzw, bool modXYZW = 0) {
//------------------------------------------------------------------
// Transforms the Address in gprReg to valid VU0/VU1 Address
microVUt(void) mVUaddrFix(mV, int gprReg) {
_f void mVUaddrFix(mV, int gprReg) {
if (mVU == &microVU1) {
AND32ItoR(gprReg, 0x3ff); // wrap around
SHL32ItoR(gprReg, 4);
@ -260,13 +260,13 @@ microVUt(void) mVUaddrFix(mV, int gprReg) {
}
// Backup Volatile Regs (EAX, ECX, EDX, MM0~7, XMM0~7, are all volatile according to 32bit Win/Linux ABI)
microVUt(void) mVUbackupRegs(microVU* mVU) {
_f void mVUbackupRegs(microVU* mVU) {
mVU->regAlloc->flushAll();
SSE_MOVAPS_XMM_to_M128((uptr)&mVU->xmmPQb[0], xmmPQ);
}
// Restore Volatile Regs
microVUt(void) mVUrestoreRegs(microVU* mVU) {
_f void mVUrestoreRegs(microVU* mVU) {
SSE_MOVAPS_M128_to_XMM(xmmPQ, (uptr)&mVU->xmmPQb[0]);
}

2
pcsx2/x86/microVU_Upper.inl
View File

@ -24,7 +24,7 @@
#define SHIFT_XYZW(gprReg) { if (_XYZW_SS && modXYZW && !_W) { SHL32ItoR(gprReg, ADD_XYZW); } }
// Note: If modXYZW is true, then it adjusts XYZW for Single Scalar operations
microVUt(void) mVUupdateFlags(mV, int reg, int regT1 = -1, int regT2 = -1, bool modXYZW = 1) {
static void mVUupdateFlags(mV, int reg, int regT1 = -1, int regT2 = -1, bool modXYZW = 1) {
int sReg, mReg = gprT1, regT1b = 0, regT2b = 0;
//int xyzw = _X_Y_Z_W; // unused local, still needed? -- air
static const u16 flipMask[16] = {0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15};