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pcsx2
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VU: Fix Wsequence-point warnings.

This commit is contained in:
lightningterror 2021-10-26 17:23:04 +02:00
parent 5a1dabc293
commit 8a531ad2cb
3 changed files with 7 additions and 7 deletions
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2
pcsx2/VU0microInterp.cpp
View File

@ -212,7 +212,7 @@ static void _vu0Exec(VURegs* VU)
// Progress the write position of the FMAC pipeline by one place // Progress the write position of the FMAC pipeline by one place
if (uregs.pipe == VUPIPE_FMAC || lregs.pipe == VUPIPE_FMAC) if (uregs.pipe == VUPIPE_FMAC || lregs.pipe == VUPIPE_FMAC)
VU->fmacwritepos = ++VU->fmacwritepos & 3; VU->fmacwritepos = (VU->fmacwritepos + 1) & 3;
} }
void vu0Exec(VURegs* VU) void vu0Exec(VURegs* VU)

2
pcsx2/VU1microInterp.cpp
View File

@ -220,7 +220,7 @@ static void _vu1Exec(VURegs* VU)
// Progress the write position of the FMAC pipeline by one place // Progress the write position of the FMAC pipeline by one place
if (uregs.pipe == VUPIPE_FMAC || lregs.pipe == VUPIPE_FMAC) if (uregs.pipe == VUPIPE_FMAC || lregs.pipe == VUPIPE_FMAC)
VU->fmacwritepos = ++VU->fmacwritepos & 3; VU->fmacwritepos = (VU->fmacwritepos + 1) & 3;
} }
void vu1Exec(VURegs* VU) void vu1Exec(VURegs* VU)

10
pcsx2/VUops.cpp
View File

@ -75,7 +75,7 @@ static __ri bool _vuFMACflush(VURegs* VU)
VU->VI[REG_STATUS_FLAG].UL = (VU->VI[REG_STATUS_FLAG].UL & 0xFF0) | (VU->fmac[i].statusflag & 0xF) | ((VU->fmac[i].statusflag & 0xF) << 6); VU->VI[REG_STATUS_FLAG].UL = (VU->VI[REG_STATUS_FLAG].UL & 0xFF0) | (VU->fmac[i].statusflag & 0xF) | ((VU->fmac[i].statusflag & 0xF) << 6);
VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag; VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
VU->fmacreadpos = ++VU->fmacreadpos & 3; VU->fmacreadpos = (VU->fmacreadpos + 1) & 3;
VU->fmaccount--; VU->fmaccount--;
didflush = true; didflush = true;
@ -95,7 +95,7 @@ static __ri bool _vuIALUflush(VURegs* VU)
if ((VU->cycle - VU->ialu[i].sCycle) < VU->ialu[i].Cycle) if ((VU->cycle - VU->ialu[i].sCycle) < VU->ialu[i].Cycle)
return didflush; return didflush;
VU->ialureadpos = ++VU->ialureadpos & 3; VU->ialureadpos = (VU->ialureadpos + 1) & 3;
VU->ialucount--; VU->ialucount--;
didflush = true; didflush = true;
} }
@ -179,7 +179,7 @@ void _vuFlushAll(VURegs* VU)
VU->VI[REG_STATUS_FLAG].UL = (VU->VI[REG_STATUS_FLAG].UL & 0xFF0) | (VU->fmac[i].statusflag & 0xF) | ((VU->fmac[i].statusflag & 0xF) << 6); VU->VI[REG_STATUS_FLAG].UL = (VU->VI[REG_STATUS_FLAG].UL & 0xFF0) | (VU->fmac[i].statusflag & 0xF) | ((VU->fmac[i].statusflag & 0xF) << 6);
VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag; VU->VI[REG_MAC_FLAG].UL = VU->fmac[i].macflag;
VU->fmacreadpos = ++VU->fmacreadpos & 3; VU->fmacreadpos = (VU->fmacreadpos + 1) & 3;
if ((VU->cycle - VU->fmac[i].sCycle) < VU->fmac[i].Cycle) if ((VU->cycle - VU->fmac[i].sCycle) < VU->fmac[i].Cycle)
VU->cycle = VU->fmac[i].sCycle + VU->fmac[i].Cycle; VU->cycle = VU->fmac[i].sCycle + VU->fmac[i].Cycle;
@ -189,7 +189,7 @@ void _vuFlushAll(VURegs* VU)
for (i = VU->ialureadpos; VU->ialucount > 0; i = (i + 1) & 3) for (i = VU->ialureadpos; VU->ialucount > 0; i = (i + 1) & 3)
{ {
VU->ialureadpos = ++VU->ialureadpos & 3; VU->ialureadpos = (VU->ialureadpos + 1) & 3;
if ((VU->cycle - VU->ialu[i].sCycle) < VU->ialu[i].Cycle) if ((VU->cycle - VU->ialu[i].sCycle) < VU->ialu[i].Cycle)
VU->cycle = VU->ialu[i].sCycle + VU->ialu[i].Cycle; VU->cycle = VU->ialu[i].sCycle + VU->ialu[i].Cycle;
@ -398,7 +398,7 @@ static __ri void __fastcall _vuAddIALUStalls(VURegs* VU, _VURegsNum* VUregsn)
VU->ialu[i].Cycle = VUregsn->cycles; VU->ialu[i].Cycle = VUregsn->cycles;
VU->ialu[i].reg = VUregsn->VIwrite; VU->ialu[i].reg = VUregsn->VIwrite;
VU->ialuwritepos = ++VU->ialuwritepos & 3; VU->ialuwritepos = (VU->ialuwritepos +1) & 3;
VU->ialucount++; VU->ialucount++;
} }