arm64: Add stubs for EE/VU/IOP recs

pcsx2/CMakeLists.txt

@@ -1023,6 +1023,7 @@ set(pcsx2arm64Sources
 	arm64/AsmHelpers.cpp
 	arm64/newVif_Dynarec.cpp
 	arm64/newVif_UnpackNEON.cpp
+	arm64/RecStubs.cpp
 	)
 
 set(pcsx2arm64Headers

pcsx2/Config.h

@@ -1236,7 +1236,11 @@ namespace EmuFolders
 
 // ------------ CPU / Recompiler Options ---------------
 
+#ifdef _M_X86 // TODO(Stenzek): Remove me once EE/VU/IOP recs are added.
 #define THREAD_VU1 (EmuConfig.Cpu.Recompiler.EnableVU1 && EmuConfig.Speedhacks.vuThread)
+#else
+#define THREAD_VU1 false
+#endif
 #define INSTANT_VU1 (EmuConfig.Speedhacks.vu1Instant)
 #define CHECK_EEREC (EmuConfig.Cpu.Recompiler.EnableEE)
 #define CHECK_CACHE (EmuConfig.Cpu.Recompiler.EnableEECache)

pcsx2/R5900OpcodeTables.cpp

@@ -6,6 +6,7 @@
 #include "R5900OpcodeTables.h"
 #include "R5900.h"
 
+// TODO(Stenzek): Move headers to common code.
 #include "x86/iR5900AritImm.h"
 #include "x86/iR5900Arit.h"
 #include "x86/iR5900MultDiv.h"
@@ -24,6 +25,7 @@ namespace R5900
 	{
 		// Generates an entry for the given opcode name.
 		// Assumes the default function naming schemes for interpreter and recompiler  functions.
+#ifdef _M_X86 // TODO(Stenzek): Remove me once EE/VU/IOP recs are added.
 	#	define MakeOpcode( name, cycles, flags ) \
 		static const OPCODE name = { \
 			#name, \
@@ -67,6 +69,51 @@ namespace R5900
 			::R5900::Dynarec::OpcodeImpl::COP1::rec##name, \
 			::R5900::OpcodeDisasm::name \
 		}
+#else
+	#	define MakeOpcode( name, cycles, flags ) \
+		static const OPCODE name = { \
+			#name, \
+			cycles, \
+			flags, \
+			NULL, \
+			::R5900::Interpreter::OpcodeImpl::name, \
+			nullptr, \
+			::R5900::OpcodeDisasm::name \
+		}
+
+#	define MakeOpcodeM( name, cycles, flags ) \
+		static const OPCODE name = { \
+			#name, \
+			cycles, \
+			flags, \
+			NULL, \
+			::R5900::Interpreter::OpcodeImpl::MMI::name, \
+			nullptr, \
+			::R5900::OpcodeDisasm::name \
+		}
+
+#	define MakeOpcode0( name, cycles, flags ) \
+		static const OPCODE name = { \
+			#name, \
+			cycles, \
+			flags, \
+			NULL, \
+			::R5900::Interpreter::OpcodeImpl::COP0::name, \
+			nullptr, \
+			::R5900::OpcodeDisasm::name \
+		}
+
+	#	define MakeOpcode1( name, cycles, flags ) \
+		static const OPCODE name = { \
+			#name, \
+			cycles, \
+			flags, \
+			NULL, \
+			::R5900::Interpreter::OpcodeImpl::COP1::name, \
+			nullptr, \
+			::R5900::OpcodeDisasm::name \
+		}
+#endif
 
 	#	define MakeOpcodeClass( name ) \
 		static const OPCODE name = { \

pcsx2/VMManager.cpp

@@ -2540,11 +2540,13 @@ void VMManager::LogCPUCapabilities()
 
 void VMManager::InitializeCPUProviders()
 {
+#ifdef _M_X86 // TODO(Stenzek): Remove me once EE/VU/IOP recs are added.
 	recCpu.Reserve();
 	psxRec.Reserve();
 
 	CpuMicroVU0.Reserve();
 	CpuMicroVU1.Reserve();
+#endif
 
 	VifUnpackSSE_Init();
 }
@@ -2557,11 +2559,13 @@ void VMManager::ShutdownCPUProviders()
 		dVifRelease(0);
 	}
 
+#ifdef _M_X86 // TODO(Stenzek): Remove me once EE/VU/IOP recs are added.
 	CpuMicroVU1.Shutdown();
 	CpuMicroVU0.Shutdown();
 
 	psxRec.Shutdown();
 	recCpu.Shutdown();
+#endif
 }
 
 void VMManager::UpdateCPUImplementations()
@@ -2575,17 +2579,19 @@ void VMManager::UpdateCPUImplementations()
 		return;
 	}
 
+#ifdef _M_X86 // TODO(Stenzek): Remove me once EE/VU/IOP recs are added.
 	Cpu = CHECK_EEREC ? &recCpu : &intCpu;
 	psxCpu = CHECK_IOPREC ? &psxRec : &psxInt;
 
+	CpuVU0 = EmuConfig.Cpu.Recompiler.EnableVU0 ? static_cast<BaseVUmicroCPU*>(&CpuMicroVU0) : static_cast<BaseVUmicroCPU*>(&CpuIntVU0);
+	CpuVU1 = EmuConfig.Cpu.Recompiler.EnableVU1 ? static_cast<BaseVUmicroCPU*>(&CpuMicroVU1) : static_cast<BaseVUmicroCPU*>(&CpuIntVU1);
+#else
+	Cpu = &intCpu;
+	psxCpu = &psxInt;
+
 	CpuVU0 = &CpuIntVU0;
 	CpuVU1 = &CpuIntVU1;
-
+#endif
-	if (EmuConfig.Cpu.Recompiler.EnableVU0)
-		CpuVU0 = &CpuMicroVU0;
-
-	if (EmuConfig.Cpu.Recompiler.EnableVU1)
-		CpuVU1 = &CpuMicroVU1;
 }
 
 void VMManager::Internal::ClearCPUExecutionCaches()
@@ -2593,9 +2599,11 @@ void VMManager::Internal::ClearCPUExecutionCaches()
 	Cpu->Reset();
 	psxCpu->Reset();
 
+#ifdef _M_X86 // TODO(Stenzek): Remove me once EE/VU/IOP recs are added.
 	// mVU's VU0 needs to be properly initialized for macro mode even if it's not used for micro mode!
 	if (CHECK_EEREC && !EmuConfig.Cpu.Recompiler.EnableVU0)
 		CpuMicroVU0.Reset();
+#endif
 
 	CpuVU0->Reset();
 	CpuVU1->Reset();

pcsx2/arm64/RecStubs.cpp

@@ -0,0 +1,18 @@
+// SPDX-FileCopyrightText: 2021-2024 Connor McLaughlin <stenzek@gmail.com>, PCSX2 Team
+// SPDX-License-Identifier: GPL-3.0
+
+#include "SaveState.h"
+#include "vtlb.h"
+
+#include "common/Assertions.h"
+
+void vtlb_DynBackpatchLoadStore(uptr code_address, u32 code_size, u32 guest_pc, u32 guest_addr, u32 gpr_bitmask, u32 fpr_bitmask, u8 address_register, u8 data_register, u8 size_in_bits, bool is_signed, bool is_load, bool is_fpr)
+{
+  pxFailRel("Not implemented.");
+}
+
+bool SaveStateBase::vuJITFreeze()
+{
+  pxFailRel("Not implemented.");
+	return false;
+}

pcsx2/pcsx2.vcxproj

@@ -121,6 +121,7 @@
     <ClCompile Include="arm64\newVif_UnpackNEON.cpp">
       <ExcludedFromBuild Condition="'$(Platform)'!='ARM64'">true</ExcludedFromBuild>
     </ClCompile>
+    <ClCompile Include="arm64\RecStubs.cpp" />
     <ClCompile Include="CDVD\BlockdumpFileReader.cpp" />
     <ClCompile Include="CDVD\CDVDdiscReader.cpp" />
     <ClCompile Include="CDVD\CDVDdiscThread.cpp" />

pcsx2/pcsx2.vcxproj.filters

@@ -286,6 +286,9 @@
     <Filter Include="Tools\arm64">
       <UniqueIdentifier>{cf847f4e-744e-4c27-a7ac-8564726fb4e6}</UniqueIdentifier>
     </Filter>
+    <Filter Include="System\Ps2\EmotionEngine\EE\Dynarec\arm64">
+      <UniqueIdentifier>{cd8ec519-2196-43f7-86de-7faced2d4296}</UniqueIdentifier>
+    </Filter>
   </ItemGroup>
   <ItemGroup>
     <None Include="Docs\License.txt">
@@ -1413,6 +1416,9 @@
     <ClCompile Include="arm64\AsmHelpers.cpp">
       <Filter>Tools\arm64</Filter>
     </ClCompile>
+    <ClCompile Include="arm64\RecStubs.cpp">
+      <Filter>System\Ps2\EmotionEngine\EE\Dynarec\arm64</Filter>
+    </ClCompile>
   </ItemGroup>
   <ItemGroup>
     <ClInclude Include="Patch.h">