mirror of https://github.com/PCSX2/pcsx2.git
Add an SPU2reset callback to SPU2 plugins, needed to put a stop to SPU2 sound generation when resetting the PS2 VM. If a plugin doesn't implement it directly, it automatically falls back on a manual soft reset using the SPU2's builtin software Core0/1 register writes.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@3575 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -344,6 +344,7 @@ void CALLBACK SPU2shutdown();
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void CALLBACK SPU2setSettingsDir( const char* dir );
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void CALLBACK SPU2setLogDir( const char* dir );
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void CALLBACK SPU2reset();
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void CALLBACK SPU2write(u32 mem, u16 value);
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u16 CALLBACK SPU2read(u32 mem);
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@ -589,11 +590,6 @@ typedef void (CALLBACK* _GSwriteCSR)(u32 value);
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typedef void (CALLBACK* _GSmakeSnapshot)(const char *path);
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typedef void (CALLBACK* _GSmakeSnapshot2)(const char *path, int*, int);
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// Worthless crap function that returns GS plugin specific data via some
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// undocumented void* to a struct. If any pad plugin actually relies on
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// this info, it deserves to fail new newer pcsx2s. -- air
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//typedef void (CALLBACK* _GSgetDriverInfo)(GSdriverInfo *info);
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// PAD
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typedef s32 (CALLBACK* _PADinit)(u32 flags);
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typedef s32 (CALLBACK* _PADopen)(void *pDsp);
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@ -607,9 +603,8 @@ typedef s32 (CALLBACK* _PADsetSlot)(u8 port, u8 slot);
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typedef s32 (CALLBACK* _PADqueryMtap)(u8 port);
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// SPU2
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// NOTE: The read/write functions CANNOT use XMM/MMX regs
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// If you want to use them, need to save and restore current ones
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typedef s32 (CALLBACK* _SPU2open)(void *pDsp);
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typedef void (CALLBACK* _SPU2reset)();
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typedef void (CALLBACK* _SPU2write)(u32 mem, u16 value);
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typedef u16 (CALLBACK* _SPU2read)(u32 mem);
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@ -761,6 +756,7 @@ extern _PADqueryMtap PADqueryMtap;
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// SPU2
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extern _SPU2open SPU2open;
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extern _SPU2reset SPU2reset;
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extern _SPU2write SPU2write;
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extern _SPU2read SPU2read;
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@ -60,10 +60,13 @@ void hwReset()
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//memset(PS2MEM_HW+0x2000, 0, 0x0000e000);
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psHu32(SBUS_F260) = 0x1D000060;
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// i guess this is kinda a version, it's used by some bioses
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psHu32(DMAC_ENABLEW) = 0x1201;
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psHu32(DMAC_ENABLER) = 0x1201;
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SPU2reset();
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sifInit();
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sprInit();
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@ -254,6 +254,7 @@ static void PAD_update( u32 padslot ) { }
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// SPU2
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_SPU2open SPU2open;
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_SPU2write SPU2write;
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_SPU2reset SPU2reset;
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_SPU2read SPU2read;
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#ifdef ENABLE_NEW_IOPDMA_SPU2
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_SPU2dmaRead SPU2dmaRead;
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@ -529,9 +530,18 @@ static const LegacyApi_OptMethod s_MethMessOpt_CDVD[] =
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// ----------------------------------------------------------------------------
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// SPU2 Mess!
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// ----------------------------------------------------------------------------
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// manualized reset that writes core reset registers of the SPU2 plugin:
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static void CALLBACK SPU2_Reset()
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{
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SPU2write( 0x1f90019A, 1<<15 ); // core 0
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SPU2write( 0x1f90059A, 1<<15 ); // core 1
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}
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static const LegacyApi_ReqMethod s_MethMessReq_SPU2[] =
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{
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{ "SPU2open", (vMeth**)&SPU2open, NULL },
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{ "SPU2reset", (vMeth**)&SPU2reset, SPU2_Reset },
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{ "SPU2write", (vMeth**)&SPU2write, NULL },
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{ "SPU2read", (vMeth**)&SPU2read, NULL },
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#ifdef ENABLE_NEW_IOPDMA_SPU2
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