diff --git a/pcsx2/Common.h b/pcsx2/Common.h index 2eab8c2314..d6799583c1 100644 --- a/pcsx2/Common.h +++ b/pcsx2/Common.h @@ -21,10 +21,6 @@ #include "PS2Etypes.h" -#if defined(__x86_64__) -#define DONT_USE_GETTEXT -#endif - struct TESTRUNARGS { u8 enabled; @@ -83,7 +79,7 @@ extern TESTRUNARGS g_TestRun; #include "Patch.h" #include "COP0.h" #include "VifDma.h" -#if (defined(__i386__) || defined(__x86_64__)) +#if defined(__i386__) #include "x86/ix86/ix86.h" #endif diff --git a/pcsx2/DebugTools/Makefile.am b/pcsx2/DebugTools/Makefile.am index 01f0130ddf..17eb15baa7 100644 --- a/pcsx2/DebugTools/Makefile.am +++ b/pcsx2/DebugTools/Makefile.am @@ -1,4 +1,4 @@ -INCLUDES = -I@srcdir@/../ +INCLUDES = -I@srcdir@/../ -I@srcdir@/../../common/ noinst_LIBRARIES = libDebugTools.a libDebugTools_a_SOURCES = \ diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp index 88d82f3ae8..576fe81afa 100644 --- a/pcsx2/IPU/IPU.cpp +++ b/pcsx2/IPU/IPU.cpp @@ -100,11 +100,8 @@ int IPU1dma(); // Color conversion stuff, the memory layout is a total hack // convert_data_buffer is a pointer to the internal rgb struct (the first param in convert_init_t) //char convert_data_buffer[sizeof(convert_rgb_t)]; -#ifdef __x86_64__ -char convert_data_buffer[0x24]; -#else char convert_data_buffer[0x1C]; -#endif + convert_init_t convert_init={convert_data_buffer, sizeof(convert_data_buffer)}; convert_t *convert; @@ -303,8 +300,6 @@ u64 ipuRead64(u32 mem) return *(u64*)(((u8*)ipuRegs)+(mem&0xff)); } -#ifndef __x86_64__ - int ipuConstRead32(u32 x86reg, u32 mem) { int workingreg, tempreg, tempreg2; @@ -407,25 +402,6 @@ void ipuConstRead64(u32 mem, int mmreg) } } -#else - -int ipuConstRead32(u32 x86reg, u32 mem) -{ - // Let's see if this ever gets called - printf("ipuConstRead32 called on a 64-bit system!\n"); - assert(0); - return 0; //It won't return, but it makes the compiler happy. -} - -void ipuConstRead64(u32 mem, int mmreg) -{ - // Let's see if this ever gets called - printf("ipuConstRead64 called on a 64-bit system!\n"); - assert(0); -} - -#endif // __x86_64__ - void ipuSoftReset() { if (!mpeg2_inited){ @@ -506,8 +482,6 @@ void ipuWrite64(u32 mem, u64 value) } } -#ifndef __x86_64__ - void ipuConstWrite32(u32 mem, int mmreg) { iFlushCall(0); @@ -578,20 +552,6 @@ void ipuConstWrite64(u32 mem, int mmreg) } } -#else - -void ipuConstWrite32(u32 mem, int mmreg) -{ - assert(0); -} - -void ipuConstWrite64(u32 mem, int mmreg) -{ - assert(0); -} - -#endif - /////////////////////////////////////////// // IPU Commands (exec on worker thread only) diff --git a/pcsx2/IPU/Makefile.am b/pcsx2/IPU/Makefile.am index d73e82510f..114c4c2e95 100644 --- a/pcsx2/IPU/Makefile.am +++ b/pcsx2/IPU/Makefile.am @@ -1,4 +1,4 @@ -INCLUDES = -I@srcdir@/../ -I@srcdir@/../x86 +INCLUDES = -I@srcdir@/../ -I@srcdir@/../x86 -I@srcdir@/../../common/ noinst_LIBRARIES = libIPU.a libIPU_a_SOURCES = IPU.c yuv2rgb.cpp coroutine.cpp acoroutine.S diff --git a/pcsx2/IPU/coroutine.cpp b/pcsx2/IPU/coroutine.cpp index cc0cb3726f..4384b5e953 100644 --- a/pcsx2/IPU/coroutine.cpp +++ b/pcsx2/IPU/coroutine.cpp @@ -26,17 +26,9 @@ struct coroutine { void* pcalladdr; void *pcurstack; -#ifdef __x86_64__ - uptr storerbx, storerbp, r12, r13, r14, r15; -#ifdef _MSC_VER - // msft also has rsi and rdi as non-volatile - uptr storersi, storerdi; -#endif - void* data; -#else uptr storeebx, storeesi, storeedi, storeebp; -#endif + int restore; // if nonzero, restore the registers int alloc; //struct s_coroutine *caller; @@ -68,11 +60,8 @@ coroutine_t so_create(void (*func)(void *), void *data, void *stack, int size) endstack = (char*)stack + size - 64; co = (coroutine*)stack; stack = (char *) stack + CO_STK_COROSIZE; - *(void**)endstack = NULL; - *(void**)((char*)endstack+sizeof(void*)) = data; -#ifdef __x86_64__ - co->data = data; -#endif + *(void**)endstack = NULL; + *(void**)((char*)endstack+sizeof(void*)) = data; co->alloc = alloc; co->pcalladdr = (void*)func; co->pcurstack = endstack; @@ -88,7 +77,7 @@ void so_delete(coroutine_t coro) } // see acoroutines.S and acoroutines.asm for other asm implementations -#if defined(_MSC_VER) && !defined(__x86_64__) +#if defined(_MSC_VER) __declspec(naked) void so_call(coroutine_t coro) { diff --git a/pcsx2/IPU/mpeg2lib/Makefile.am b/pcsx2/IPU/mpeg2lib/Makefile.am index 146fbf1895..341be48142 100644 --- a/pcsx2/IPU/mpeg2lib/Makefile.am +++ b/pcsx2/IPU/mpeg2lib/Makefile.am @@ -1,4 +1,4 @@ -INCLUDES = -I@srcdir@/../ -I@srcdir@/../../ +INCLUDES = -I@srcdir@/../ -I@srcdir@/../../ -I@srcdir@/../../../common/ noinst_LIBRARIES = libmpeg2IPU.a libmpeg2IPU_a_SOURCES = Idct.cpp Mpeg.cpp Mpeg.h Vlc.h \ No newline at end of file diff --git a/pcsx2/Linux/Makefile.am b/pcsx2/Linux/Makefile.am index 6525c26684..d32363c6d7 100644 --- a/pcsx2/Linux/Makefile.am +++ b/pcsx2/Linux/Makefile.am @@ -1,5 +1,5 @@ AUTOMAKE_OPTIONS = foreign -INCLUDES = $(shell pkg-config --cflags gtk+-2.0) -I@srcdir@/../ +INCLUDES = $(shell pkg-config --cflags gtk+-2.0) -I@srcdir@/../ -I@srcdir@/../../common/ bin_PROGRAMS = pcsx2 diff --git a/pcsx2/Makefile.am b/pcsx2/Makefile.am index d140007c8a..41f6a3564a 100644 --- a/pcsx2/Makefile.am +++ b/pcsx2/Makefile.am @@ -1,5 +1,5 @@ AUTOMAKE_OPTIONS = foreign -INCLUDES = -I@srcdir@/x86/ +INCLUDES = -I@srcdir@/x86/ -I@srcdir@/../common/ noinst_LIBRARIES = libpcsx2.a libpcsx2_a_SOURCES = \ diff --git a/pcsx2/Memory.cpp b/pcsx2/Memory.cpp index 6e931e8ec6..e90238eb16 100644 --- a/pcsx2/Memory.cpp +++ b/pcsx2/Memory.cpp @@ -71,9 +71,7 @@ BIOS extern u32 maxrecmem; extern int rdram_devices, rdram_sdevid; -#ifndef __x86_64__ extern void * memcpy_fast(void *dest, const void *src, size_t n); -#endif //#define FULLTLB int MemMode = 0; // 0 is Kernel Mode, 1 is Supervisor Mode, 2 is User Mode diff --git a/pcsx2/Misc.h b/pcsx2/Misc.h index a3ed29c2ae..74712f8ca1 100644 --- a/pcsx2/Misc.h +++ b/pcsx2/Misc.h @@ -184,15 +184,12 @@ int IsBIOS(char *filename, char *description); // check to see if needs freezing extern void FreezeXMMRegs_(int save); +extern void FreezeMMXRegs_(int save); extern bool g_EEFreezeRegs; #define FreezeXMMRegs(save) if( g_EEFreezeRegs ) { FreezeXMMRegs_(save); } -#ifndef __x86_64__ - void FreezeMMXRegs_(int save); #define FreezeMMXRegs(save) if( g_EEFreezeRegs ) { FreezeMMXRegs_(save); } -#else -# define FreezeMMXRegs(save) -#endif + #if defined(_WIN32) && !defined(__x86_64__) // faster memcpy diff --git a/pcsx2/PrecompiledHeader.h b/pcsx2/PrecompiledHeader.h index f75787c30b..ac328c6d8d 100644 --- a/pcsx2/PrecompiledHeader.h +++ b/pcsx2/PrecompiledHeader.h @@ -128,12 +128,6 @@ static __forceinline u32 timeGetTime() # define C_ASSERT(e) typedef char __C_ASSERT__[(e)?1:-1] #endif -#ifdef __x86_64__ -# define X86_32CODE(x) -#else -# define X86_32CODE(x) x -#endif - #ifndef __LINUX__ # define __unused #endif diff --git a/pcsx2/R5900.cpp b/pcsx2/R5900.cpp index bb2b2d63c4..f8700bc6e3 100644 --- a/pcsx2/R5900.cpp +++ b/pcsx2/R5900.cpp @@ -550,7 +550,7 @@ static __forceinline void _cpuBranchTest_Shared() #ifdef PCSX2_DEVBUILD extern u8 g_globalXMMSaved; -X86_32CODE(extern u8 g_globalMMXSaved;) +extern u8 g_globalMMXSaved; #endif void cpuBranchTest() @@ -560,9 +560,9 @@ void cpuBranchTest() #ifdef PCSX2_DEVBUILD // dont' remove this check unless doing an official release - if( g_globalXMMSaved X86_32CODE(|| g_globalMMXSaved) ) + if( g_globalXMMSaved || g_globalMMXSaved) SysPrintf("frozen regs have not been restored!!!\n"); - assert( !g_globalXMMSaved X86_32CODE(&& !g_globalMMXSaved) ); + assert( !g_globalXMMSaved && !g_globalMMXSaved); #endif // Don't need to freeze any regs during a BranchTest. @@ -591,7 +591,7 @@ void cpuBranchTest() // bother to return until the program is completely finished. #ifdef PCSX2_DEVBUILD - assert( !g_globalXMMSaved X86_32CODE(&& !g_globalMMXSaved) ); + assert( !g_globalXMMSaved && !g_globalMMXSaved); #endif g_EEFreezeRegs = true; } diff --git a/pcsx2/RDebug/Makefile.am b/pcsx2/RDebug/Makefile.am index ead84e4e2a..4fa1c8fd91 100644 --- a/pcsx2/RDebug/Makefile.am +++ b/pcsx2/RDebug/Makefile.am @@ -1,4 +1,4 @@ -INCLUDES = -I@srcdir@/../ +INCLUDES = -I@srcdir@/../ -I@srcdir@/../../common/ noinst_LIBRARIES = libRDebug.a libRDebug_a_SOURCES = \ diff --git a/pcsx2/Stats.cpp b/pcsx2/Stats.cpp index a844a94fca..e3a8046175 100644 --- a/pcsx2/Stats.cpp +++ b/pcsx2/Stats.cpp @@ -49,9 +49,7 @@ void statsClose() { fprintf(f, "-- PCSX2 v%s statics--\n\n", PCSX2_VERSION); fprintf(f, "Ran for %d seconds\n", t); fprintf(f, "Total VSyncs: %d (%s)\n", stats.vsyncCount, Config.PsxType ? "PAL" : "NTSC"); -#ifndef __x86_64__ fprintf(f, "VSyncs per Seconds: %g\n", (double)stats.vsyncCount / t); -#endif fprintf(f, "Total EE Instructions Executed: %lld\n", stats.eeCycles); fprintf(f, "Total IOP Instructions Executed: %lld\n", stats.iopCycles); if (!CHECK_EEREC) fprintf(f, "Interpreter Mode\n"); diff --git a/pcsx2/VifDma.cpp b/pcsx2/VifDma.cpp index a86076180c..b6afaae166 100644 --- a/pcsx2/VifDma.cpp +++ b/pcsx2/VifDma.cpp @@ -68,9 +68,7 @@ static const unsigned int VIF1dmanum = 1; int g_vifCycles = 0; int path3hack = 0; -#ifndef __x86_64__ extern void * memcpy_fast(void *dest, const void *src, size_t n); -#endif typedef void (*UNPACKFUNCTYPE)( u32 *dest, u32 *data, int size ); typedef int (*UNPACKPARTFUNCTYPESSE)( u32 *dest, u32 *data, int size ); @@ -513,10 +511,6 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma // VIFfuncTableSSE[1].funcS[6](dest, (u32*)tempdata, 8); #ifdef _MSC_VER - -#ifdef __x86_64__ - _vifCol = VIFdmanum ? g_vifCol1 : g_vifCol0; -#else if( VIFdmanum ) { __asm movaps XMM_ROW, xmmword ptr [g_vifRow1] __asm movaps XMM_COL, xmmword ptr [g_vifCol1] @@ -525,8 +519,6 @@ static void VIFunpack(u32 *data, vifCode *v, int size, const unsigned int VIFdma __asm movaps XMM_ROW, xmmword ptr [g_vifRow0] __asm movaps XMM_COL, xmmword ptr [g_vifCol0] } -#endif - #else if( VIFdmanum ) { __asm__(".intel_syntax\n" diff --git a/pcsx2/build.sh b/pcsx2/build.sh index 191e3b01cf..f1fbe2de8c 100644 --- a/pcsx2/build.sh +++ b/pcsx2/build.sh @@ -18,7 +18,7 @@ # #Normal -#export PCSX2OPTIONS="--enable-sse3 --enable-sse4 --prefix `pwd`" +export PCSX2OPTIONS="--enable-debug --enable-devbuild --enable-sse3 --enable-sse4 --prefix `pwd`" echo --------------- echo Building Pcsx2 diff --git a/pcsx2/configure.ac b/pcsx2/configure.ac index af4d9cd9f3..8b1103d686 100644 --- a/pcsx2/configure.ac +++ b/pcsx2/configure.ac @@ -90,30 +90,6 @@ then fi AC_MSG_RESULT(sse4) -dnl Check for 64bit CPU -AC_MSG_CHECKING(for a x86-64 CPU) -AC_TRY_RUN([ -int main() -{ -int a = 0; -int*pa = &a; -asm(".intel_syntax\n" - "mov %%rax, %0\n" - "mov %%eax, [%%rax]\n" - ".att_syntax\n" - : : "r"(pa) : "%rax"); -return 0; -} -],cpu64=yes,cpu64=no,) - -if test "x$cpu64" == xyes -then -AC_DEFINE(__x86_64__,1,[__x86_64__]) -CCASFLAGS="$CCASFLAGS -D__x86_64__" -fi -AC_MSG_RESULT($cpu64) -AM_CONDITIONAL(X86_64, test x$cpu64 = xyes) - dnl gtk AC_MSG_CHECKING(gtk+) AC_CHECK_PROG(GTK_CONFIG, pkg-config, pkg-config) @@ -154,7 +130,6 @@ dnl bindir = pcsx2exe echo "Configuration:" echo " Target system type: $target" -echo " x86-64 build? $cpu64" echo " Debug build? $debug" echo " Dev build? $devbuild" echo " Force sse3? $sse3" diff --git a/pcsx2/windows/CpuDlg.cpp b/pcsx2/windows/CpuDlg.cpp index 6c4d918876..64dbc6f3f2 100644 --- a/pcsx2/windows/CpuDlg.cpp +++ b/pcsx2/windows/CpuDlg.cpp @@ -78,7 +78,7 @@ BOOL CALLBACK CpuDlgProc(HWND hW, UINT uMsg, WPARAM wParam, LPARAM lParam) if(cpucaps.hasStreamingSIMD4Extensions) strcat(features,",SSE4.1"); // if(cpucaps.has3DNOWInstructionExtensions) strcat(features,",3DNOW"); // if(cpucaps.has3DNOWInstructionExtensionsExt)strcat(features,",3DNOW+"); - if(cpucaps.hasAMD64BitArchitecture) strcat(features,",x86-64"); +// if(cpucaps.hasAMD64BitArchitecture) strcat(features,",x86-64"); SetDlgItemText(hW, IDC_FEATURESINPUT, features); CheckDlgButton(hW, IDC_CPU_EEREC, !!CHECK_EEREC); diff --git a/pcsx2/x86/Makefile.am b/pcsx2/x86/Makefile.am index 9aa824100a..219921ce4b 100644 --- a/pcsx2/x86/Makefile.am +++ b/pcsx2/x86/Makefile.am @@ -1,16 +1,11 @@ -INCLUDES = -I@srcdir@/../ +INCLUDES = -I@srcdir@/../ -I@srcdir@/../../common/ noinst_LIBRARIES = libx86recomp.a # have to add the sources instead of making a library since the linking is complicated -if X86_64 -archfiles = ix86-64/iR5900-64.cpp ix86-64/iR5900AritImm-64.cpp ix86-64/iR5900Jump-64.cpp \ -ix86-64/iR5900Move-64.cpp ix86-64/iR5900Shift-64.cpp ix86-64/iR5900Arit-64.cpp ix86-64/iR5900Branch-64.cpp \ -ix86-64/iR5900LoadStore-64.cpp ix86-64/iR5900MultDiv-64.cpp ix86-64/iCore-64.cpp ix86-64/aR5900-64.S -else + archfiles = ix86-32/iR5900-32.cpp ix86-32/iR5900AritImm.cpp ix86-32/iR5900Jump.cpp \ ix86-32/iR5900Move.cpp ix86-32/iR5900Shift.cpp ix86-32/iR5900Arit.cpp ix86-32/iR5900Branch.cpp \ ix86-32/iR5900LoadStore.cpp ix86-32/iR5900MultDiv.cpp ix86-32/iCore-32.cpp ix86-32/aR5900-32.S -endif libx86recomp_a_SOURCES = iCOP2.cpp iCP0.cpp iFPU.cpp iHw.cpp iMMI.cpp iPsxHw.cpp iPsxMem.cpp \ ir5900tables.cpp iVU0micro.cpp iVU1micro.cpp iVUmicro.cpp iVUmicroUpper.cpp iVUmicroLower.cpp \ diff --git a/pcsx2/x86/fast_routines.cpp b/pcsx2/x86/fast_routines.cpp index 39cd7a1fe0..d0f5de2595 100644 --- a/pcsx2/x86/fast_routines.cpp +++ b/pcsx2/x86/fast_routines.cpp @@ -78,7 +78,7 @@ MEMCPY_AMD.CPP #include "Misc.h" -#if defined(_MSC_VER) && !defined(__x86_64__) +#if defined(_MSC_VER) #ifdef _DEBUG extern u8 g_globalMMXSaved; diff --git a/pcsx2/x86/iCOP2.cpp b/pcsx2/x86/iCOP2.cpp index 8e0872b8d6..fac402cfde 100644 --- a/pcsx2/x86/iCOP2.cpp +++ b/pcsx2/x86/iCOP2.cpp @@ -46,7 +46,7 @@ void recCop2BranchCall( void (*func)() ) { - X86_32CODE(SetFPUstate()); + SetFPUstate(); EE::Dynarec::recBranchCall( func ); _freeX86regs(); } @@ -95,77 +95,6 @@ void recCOP2_BC2(s32 info); void recCOP2_SPECIAL2(s32 info); extern void _vu0WaitMicro(); - -#ifdef __x86_64__ -static void recCFC2() -{ - int mmreg; - int creg; - - if (cpuRegs.code & 1) - { - iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86); - CALLFunc((uptr)_vu0WaitMicro); - } - - if(!_Rt_) return; - - _deleteGPRtoXMMreg(_Rt_, 2); - - mmreg = _allocX86reg(-1, X86TYPE_GPR, _Rt_, MODE_WRITE); - creg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_READ); - - if( creg >= 0 ) - { - if(EEINST_ISLIVE1(_Rt_)) - { - if( _Fs_ < 16 ) - { - // zero extending - MOVZX64R16toR(mmreg, creg); - } - else - { - // sign extend, use full 32 bits - MOV32RtoR(mmreg, creg); - SHL64ItoR(mmreg, 32); - SAR64ItoR(mmreg, 32); - } - } - else - { - // just move - MOV32RtoR(mmreg, creg); - EEINST_RESETHASLIVE1(_Rt_); - } - } - else - { - if(EEINST_ISLIVE1(_Rt_)) - { - if( _Fs_ < 16 ) - { - // zero extending - MOVZX64M16toR(mmreg, (uptr)&VU0.VI[ _Fs_ ].UL); - } - else - { - // sign extend, use full 32 bits - MOV32MtoR(RAX, (uptr)&VU0.VI[ _Fs_ ].UL); - CDQE(); - MOV64RtoR(mmreg, RAX); - } - } - else - { - // just move - MOV32MtoR(mmreg, (uptr)&VU0.VI[ _Fs_ ].UL); - EEINST_RESETHASLIVE1(_Rt_); - } - } - _eeOnWriteReg(_Rt_, 1); -} -#else static void recCFC2(s32 info) { @@ -228,16 +157,11 @@ static void recCFC2(s32 info) _eeOnWriteReg(_Rt_, 1); } -#endif static void recCTC2(s32 info) { if (cpuRegs.code & 1) { - #ifdef __x86_64__ - iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86); - #else iFlushCall(FLUSH_NOCONST); - #endif CALLFunc((uptr)_vu0WaitMicro); } @@ -263,16 +187,9 @@ static void recCTC2(s32 info) MOV16ItoM((uptr)&VU0.VI[REG_FBRST].UL,g_cpuConstRegs[_Rt_].UL[0]&0x0c0c); break; case REG_CMSAR1: // REG_CMSAR1 -#ifdef __x86_64__ - iFlushCall(FLUSH_FREE_TEMPX86); // since CALLFunc - - assert( _checkX86reg(X86TYPE_VI, REG_VPU_STAT, 0) < 0 && - _checkX86reg(X86TYPE_VI, REG_TPC, 0) < 0 ); -#else iFlushCall(FLUSH_NOCONST);// since CALLFunc assert( _checkX86reg(X86TYPE_VI, REG_VPU_STAT, 0) < 0 && _checkX86reg(X86TYPE_VI, REG_TPC, 0) < 0 ); -#endif // Execute VU1 Micro SubRoutine _callFunctionArg1((uptr)vu1ExecMicro, MEM_CONSTTAG, g_cpuConstRegs[_Rt_].UL[0]&0xffff); break; @@ -284,14 +201,8 @@ static void recCTC2(s32 info) // a lot of games have vu0 spinning on some integer // then they modify the register and expect vu0 to stop spinning within 10 cycles (donald duck) -#ifdef __x86_64__ - int mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE); - if( mmreg >= 0 ) MOV32ItoR(mmreg, g_cpuConstRegs[_Rt_].UL[0]); - iFlushCall(FLUSH_FREE_TEMPX86|FLUSH_FREE_VU0); -#else MOV32ItoM((uptr)&VU0.VI[_Fs_].UL,g_cpuConstRegs[_Rt_].UL[0]); iFlushCall(FLUSH_NOCONST); -#endif CALLFunc((uptr)Cpu->ExecuteVU0Block); // fixme: if the VU0 stat&1 is still enabled, then we should probably set a cpuBranchTest @@ -330,33 +241,16 @@ static void recCTC2(s32 info) MOV16RtoM((uptr)&VU0.VI[REG_FBRST].UL,EAX); break; case REG_CMSAR1: // REG_CMSAR1 - #ifdef __x86_64__ - iFlushCall(FLUSH_FREE_TEMPX86); - #else iFlushCall(FLUSH_NOCONST); - #endif _eeMoveGPRtoR(EAX, _Rt_); _callFunctionArg1((uptr)vu1ExecMicro, MEM_X86TAG|EAX, 0); // Execute VU1 Micro SubRoutine break; default: -#ifdef __x86_64__ - mmreg = _checkX86reg(X86TYPE_VI, _Fs_, MODE_WRITE); - - if( mmreg >= 0 ) _eeMoveGPRtoR(mmreg, _Rt_); - - // a lot of games have vu0 spinning on some integer - // then they modify the register and expect vu0 to stop spinning within 10 cycles (donald duck) - iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86); - - //_callFunctionArg1((uptr)FreezeXMMRegs_, MEM_CONSTTAG, 1); // fixme - are these two calls neccessary? - //_callFunctionArg1((uptr)FreezeXMMRegs_, MEM_CONSTTAG, 0); -#else _eeMoveGPRtoM((uptr)&VU0.VI[_Fs_].UL,_Rt_); // a lot of games have vu0 spinning on some integer // then they modify the register and expect vu0 to stop spinning within 10 cycles (donald duck) iFlushCall(FLUSH_NOCONST); -#endif break; } } @@ -368,20 +262,13 @@ static void recQMFC2(s32 info) if (cpuRegs.code & 1) { - #ifdef __x86_64__ - iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86); - #else iFlushCall(FLUSH_NOCONST); - #endif CALLFunc((uptr)_vu0WaitMicro); } if(!_Rt_) return; -#ifndef __x86_64__ _deleteMMXreg(MMX_GPR+_Rt_, 2); -#endif - _deleteX86reg(X86TYPE_GPR, _Rt_, 2); _eeOnWriteReg(_Rt_, 0); @@ -427,12 +314,7 @@ static void recQMTC2(s32 info) int mmreg; if (cpuRegs.code & 1) { - - #ifdef __x86_64__ - iFlushCall(FLUSH_FREE_VU0|FLUSH_FREE_TEMPX86); - #else iFlushCall(FLUSH_NOCONST); - #endif CALLFunc((uptr)_vu0WaitMicro); } @@ -472,14 +354,6 @@ static void recQMTC2(s32 info) int fsreg = _allocVFtoXMMreg(&VU0, -1, _Fs_, MODE_WRITE); if( fsreg >= 0 ) { -#ifdef __x86_64__ - mmreg = _checkX86reg(X86TYPE_GPR, _Rt_, MODE_READ); - - if( mmreg >= 0) { - SSE2_MOVQ_R_to_XMM(fsreg, mmreg); - SSE_MOVHPS_M64_to_XMM(fsreg, (uptr)&cpuRegs.GPR.r[_Rt_].UL[2]); - } -#else mmreg = _checkMMXreg(MMX_GPR+_Rt_, MODE_READ); if( mmreg >= 0) { @@ -487,7 +361,6 @@ static void recQMTC2(s32 info) SSE2_MOVQ2DQ_MM_to_XMM(fsreg, mmreg); SSE_MOVHPS_M64_to_XMM(fsreg, (uptr)&cpuRegs.GPR.r[_Rt_].UL[2]); } -#endif else { if( GPR_IS_CONST1( _Rt_ ) ) { assert( _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ) == -1 ); diff --git a/pcsx2/x86/iCP0.cpp b/pcsx2/x86/iCP0.cpp index a23d982c2b..f296d7fd6a 100644 --- a/pcsx2/x86/iCP0.cpp +++ b/pcsx2/x86/iCP0.cpp @@ -173,14 +173,11 @@ void recMFC0( void ) else { EEINST_RESETHASLIVE1(_Rt_); -#ifndef __x86_64__ if( (mmreg = _allocCheckGPRtoMMX(g_pCurInstInfo, _Rt_, MODE_WRITE)) >= 0 ) { MOVDMtoMMX(mmreg, (uptr)&cpuRegs.CP0.r[ _Rd_ ]); SetMMXstate(); } - else -#endif - if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ)) >= 0) { + else if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ)) >= 0) { if( EEINST_ISLIVE2(_Rt_) ) { if( xmmregs[mmreg].mode & MODE_WRITE ) { diff --git a/pcsx2/x86/iCore.cpp b/pcsx2/x86/iCore.cpp index b5bcbffaaf..6eaf6b57d0 100644 --- a/pcsx2/x86/iCore.cpp +++ b/pcsx2/x86/iCore.cpp @@ -384,9 +384,8 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode) if (xmmregs[i].type != XMMTYPE_GPRREG) continue; if (xmmregs[i].reg != gprreg) continue; -#ifndef __x86_64__ assert( _checkMMXreg(MMX_GPR|gprreg, mode) == -1 ); -#endif + g_xmmtypes[i] = XMMT_INT; if (!(xmmregs[i].mode & MODE_READ) && (mode & MODE_READ)) @@ -447,7 +446,6 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode) if (mode & MODE_READ) _flushConstReg(gprreg); -#ifndef __x86_64__ mmxreg = _checkMMXreg(MMX_GPR+gprreg, 0); if (mmxreg >= 0 ) @@ -472,35 +470,12 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode) // don't flush mmxregs[mmxreg].inuse = 0; } -#else - mmxreg = _checkX86reg(X86TYPE_GPR, gprreg, 0); - - if (mmxreg >= 0 ) - { - SSE2_MOVQ_R_to_XMM(xmmreg, mmxreg); - SSE_MOVHPS_M64_to_XMM(xmmreg, (uptr)&cpuRegs.GPR.r[gprreg].UL[0]); - - // read only, instead of setting to write, just flush to mem - if (!(mode & MODE_WRITE) && (x86regs[mmxreg].mode & MODE_WRITE) ) - MOV64RtoM((uptr)&cpuRegs.GPR.r[gprreg].UL[0], mmxreg); - - x86regs[mmxreg].inuse = 0; - } -#endif else - { SSEX_MOVDQA_M128_to_XMM(xmmreg, (uptr)&cpuRegs.GPR.r[gprreg].UL[0]); - } } } else - { -#ifndef __x86_64__ _deleteMMXreg(MMX_GPR+gprreg, 0); -#else - _deleteX86reg(X86TYPE_GPR, gprreg, 0); -#endif - } return xmmreg; } @@ -1029,8 +1004,6 @@ void _freeXMMregs() } } -#if !defined(_MSC_VER) || !defined(__x86_64__) - __forceinline void FreezeXMMRegs_(int save) { //SysPrintf("FreezeXMMRegs_(%d); [%d]\n", save, g_globalXMMSaved); @@ -1066,16 +1039,6 @@ __forceinline void FreezeXMMRegs_(int save) "movaps [%0+0x50], %%xmm5\n" "movaps [%0+0x60], %%xmm6\n" "movaps [%0+0x70], %%xmm7\n" -#ifdef __x86_64__ - "movaps [%0+0x80], %%xmm8\n" - "movaps [%0+0x90], %%xmm9\n" - "movaps [%0+0xa0], %%xmm10\n" - "movaps [%0+0xb0], %%xmm11\n" - "movaps [%0+0xc0], %%xmm12\n" - "movaps [%0+0xd0], %%xmm13\n" - "movaps [%0+0xe0], %%xmm14\n" - "movaps [%0+0xf0], %%xmm15\n" -#endif ".att_syntax\n" : : "r"(g_globalXMMData) ); #endif // _MSC_VER @@ -1113,24 +1076,12 @@ __forceinline void FreezeXMMRegs_(int save) "movaps %%xmm5, [%0+0x50]\n" "movaps %%xmm6, [%0+0x60]\n" "movaps %%xmm7, [%0+0x70]\n" -#ifdef __x86_64__ - "movaps %%xmm8, [%0+0x80]\n" - "movaps %%xmm9, [%0+0x90]\n" - "movaps %%xmm10, [%0+0xa0]\n" - "movaps %%xmm11, [%0+0xb0]\n" - "movaps %%xmm12, [%0+0xc0]\n" - "movaps %%xmm13, [%0+0xd0]\n" - "movaps %%xmm14, [%0+0xe0]\n" - "movaps %%xmm15, [%0+0xf0]\n" -#endif ".att_syntax\n" : : "r"(g_globalXMMData) ); #endif // _MSC_VER } } -#endif - // PSX void _psxMoveGPRtoR(x86IntRegType to, int fromgpr) { @@ -1297,11 +1248,7 @@ void _recFillRegister(EEINST& pinst, int type, int reg, int write) } void SetMMXstate() { -#ifdef __x86_64__ - assert(0); -#else x86FpuState = MMX_STATE; -#endif } // Writebacks // diff --git a/pcsx2/x86/iCore.h b/pcsx2/x86/iCore.h index ae60369f04..1a0fdd34be 100644 --- a/pcsx2/x86/iCore.h +++ b/pcsx2/x86/iCore.h @@ -16,19 +16,15 @@ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA */ -// NOTE: x86-64 recompiler doesn't support mmx +// NOTE: x86-64 recompiler didn't support mmx #ifndef _PCSX2_CORE_RECOMPILER_ #define _PCSX2_CORE_RECOMPILER_ #include "ix86/ix86.h" #include "iVUmicro.h" -#if defined(__x86_64__) && defined(_MSC_VER) -// xp64 has stack shadow memory -#define REC_INC_STACK 48 -#else +// xp64 had a stack shadow memory #define REC_INC_STACK 0 -#endif // used to keep block information #define BLOCKTYPE_STARTPC 4 // startpc offset @@ -407,7 +403,6 @@ void SetMMXstate(); void _recMove128MtoM(u32 to, u32 from); -#ifndef __x86_64__ ///////////////////// // MMX x86-32 only // ///////////////////// @@ -477,14 +472,6 @@ extern u8 g_globalMMXSaved; extern _mmxregs mmxregs[MMXREGS], s_saveMMXregs[MMXREGS]; extern u16 x86FpuState, iCWstate; -#else - -void LogicalOp64RtoR(x86IntRegType to, x86IntRegType from, int op); -void LogicalOp64RtoM(uptr to, x86IntRegType from, int op); -void LogicalOp64MtoR(x86IntRegType to, uptr from, int op); - -#endif // __x86_64__ - void LogicalOp32RtoM(uptr to, x86IntRegType from, int op); void LogicalOp32MtoR(x86IntRegType to, uptr from, int op); void LogicalOp32ItoR(x86IntRegType to, u32 from, int op); diff --git a/pcsx2/x86/iFPU.cpp b/pcsx2/x86/iFPU.cpp index 9240e668d7..66a04f3e4a 100644 --- a/pcsx2/x86/iFPU.cpp +++ b/pcsx2/x86/iFPU.cpp @@ -50,11 +50,7 @@ #define FPUflagSO 0X00000010 #define FPUflagSU 0X00000008 -#ifndef __x86_64__ #define FPU_ADD_SUB_HACK 1 // Add/Sub opcodes produce more ps2-like results if set to 1 -#else -#define FPU_ADD_SUB_HACK 0 // DEC32R doesn't work on 64 bits -#endif extern PCSX2_ALIGNED16_DECL(u32 g_minvals[4]); extern PCSX2_ALIGNED16_DECL(u32 g_maxvals[4]); @@ -148,17 +144,14 @@ void recCFC1(void) MOV32MtoR( EAX, (uptr)&fpuRegs.fprc[ _Fs_ ] ); _deleteEEreg(_Rt_, 0); - if(EEINST_ISLIVE1(_Rt_)) { -#ifdef __x86_64__ - CDQE(); - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], RAX ); -#else + if(EEINST_ISLIVE1(_Rt_)) + { CDQ( ); MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); -#endif } - else { + else + { EEINST_RESETHASLIVE1(_Rt_); MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); } @@ -180,25 +173,7 @@ void recCTC1( void ) { SSEX_MOVD_XMM_to_M32((uptr)&fpuRegs.fprc[ _Fs_ ], mmreg); } -#ifdef __x86_64__ - else - { - mmreg = _checkX86reg(X86TYPE_GPR, _Rt_, MODE_READ); - - if ( mmreg >= 0 ) - { - MOV32RtoM((uptr)&fpuRegs.fprc[ _Fs_ ], mmreg); - } - else - { - _deleteGPRtoXMMreg(_Rt_, 1); - _deleteX86reg(X86TYPE_GPR, _Rt_, 1); - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - MOV32RtoM( (uptr)&fpuRegs.fprc[ _Fs_ ], EAX ); - } - } -#else + else { mmreg = _checkMMXreg(MMX_GPR+_Rt_, MODE_READ); @@ -217,7 +192,6 @@ void recCTC1( void ) MOV32RtoM( (uptr)&fpuRegs.fprc[ _Fs_ ], EAX ); } } -#endif } } //------------------------------------------------------------------ @@ -227,100 +201,6 @@ void recCTC1( void ) // MFC1 //------------------------------------------------------------------ -#ifdef __x86_64__ -void recMFC1(void) -{ - int regt, regs; - if ( ! _Rt_ ) return; - - _eeOnWriteReg(_Rt_, 1); - - regs = _checkXMMreg(XMMTYPE_FPREG, _Fs_, MODE_READ); - - if( regs >= 0 ) - { - _deleteGPRtoXMMreg(_Rt_, 2); - regt = _allocCheckGPRtoX86(g_pCurInstInfo, _Rt_, MODE_WRITE); - - if( regt >= 0 ) - { - if(EEINST_ISLIVE1(_Rt_)) - { - SSE2_MOVD_XMM_to_R(RAX, regs); - - // sign extend - CDQE(); - MOV64RtoR(regt, RAX); - } - else - { - SSE2_MOVD_XMM_to_R(regt, regs); - EEINST_RESETHASLIVE1(_Rt_); - } - } - else - { - if(EEINST_ISLIVE1(_Rt_)) - { - _signExtendXMMtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], regs, 0); - } - else - { - EEINST_RESETHASLIVE1(_Rt_); - SSE_MOVSS_XMM_to_M32((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], regs); - } - } - } - else - { - regs = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_READ); - - if( regs >= 0 ) - { - if( xmmregs[regs].mode & MODE_WRITE ) - { - SSE_MOVHPS_XMM_to_M64((uptr)&cpuRegs.GPR.r[_Rt_].UL[2], regs); - } - xmmregs[regs].inuse = 0; - } - else - { - regt = _allocCheckGPRtoX86(g_pCurInstInfo, _Rt_, MODE_WRITE); - - if( regt >= 0 ) - { - if(EEINST_ISLIVE1(_Rt_)) - { - MOV32MtoR( RAX, (uptr)&fpuRegs.fpr[ _Fs_ ].UL ); - CDQE(); - MOV64RtoR(regt, RAX); - } - else - { - MOV32MtoR( regt, (uptr)&fpuRegs.fpr[ _Fs_ ].UL ); - EEINST_RESETHASLIVE1(_Rt_); - } - } - else - { - _deleteEEreg(_Rt_, 0); - MOV32MtoR( EAX, (uptr)&fpuRegs.fpr[ _Fs_ ].UL ); - - if(EEINST_ISLIVE1(_Rt_)) - { - CDQE(); - MOV64RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], RAX); - } - else - { - EEINST_RESETHASLIVE1(_Rt_); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - } - } - } - } -} -#else void recMFC1(void) { int regt, regs; @@ -398,7 +278,7 @@ void recMFC1(void) } } } -#endif + //------------------------------------------------------------------ @@ -436,21 +316,6 @@ void recMTC1(void) } } else - #ifdef __x86_64__ - { - mmreg = _allocCheckFPUtoXMM(g_pCurInstInfo, _Fs_, MODE_WRITE); - - if( mmreg >= 0 ) - { - SSE_MOVSS_M32_to_XMM(mmreg, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); - } - else - { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ]); - MOV32RtoM((uptr)&fpuRegs.fpr[ _Fs_ ].UL, EAX); - } - } - #else { int mmreg2; @@ -483,7 +348,6 @@ void recMTC1(void) } } } - #endif } } //------------------------------------------------------------------ diff --git a/pcsx2/x86/iGS.cpp b/pcsx2/x86/iGS.cpp index c3ed357908..880f96990b 100644 --- a/pcsx2/x86/iGS.cpp +++ b/pcsx2/x86/iGS.cpp @@ -61,10 +61,8 @@ static void __fastcall _rec_mtgs_Send32orSmaller( GS_RINGTYPE ringtype, u32 mem, #else // GCC --> PUSH32I( (uptr)mtgsThread ); CALLFunc( mtgsThread->FnPtr_SimplePacket() ); -#ifndef __x86_64__ ADD32ItoR( ESP, 20 ); #endif -#endif } // Used to send 64 and 128 bit values to the MTGS (called twice for 128's, which @@ -82,10 +80,8 @@ static void __fastcall _rec_mtgs_Send64( uptr gsbase, u32 mem, int mmreg ) #else // GCC --> PUSH32I( (uptr)mtgsThread ); CALLFunc( mtgsThread->FnPtr_SimplePacket() ); -#ifndef __x86_64__ ADD32ItoR( ESP, 20 ); #endif -#endif } @@ -154,14 +150,12 @@ void gsConstWriteIMR(int mmreg) AND32ItoM((uptr)PS2GS_BASE(mem), 0x1f00); OR32ItoM((uptr)PS2GS_BASE(mem), 0x6000); } -#ifndef __x86_64__ else if( mmreg & MEM_MMXTAG ) { SetMMXstate(); MOVDMMXtoM((uptr)PS2GS_BASE(mem), mmreg&0xf); AND32ItoM((uptr)PS2GS_BASE(mem), 0x1f00); OR32ItoM((uptr)PS2GS_BASE(mem), 0x6000); } -#endif else if( mmreg & MEM_EECONSTTAG ) { MOV32ItoM( (uptr)PS2GS_BASE(mem), (g_cpuConstRegs[(mmreg>>16)&0x1f].UL[0]&0x1f00)|0x6000); } @@ -297,12 +291,8 @@ void gsConstRead64(u32 mem, int mmreg) GIF_LOG("GS read 64 %8.8lx (%8.8x), at %8.8lx\n", (uptr)PS2GS_BASE(mem), mem); if( IS_XMMREG(mmreg) ) SSE_MOVLPS_M64_to_XMM(mmreg&0xff, (uptr)PS2GS_BASE(mem)); else { -#ifndef __x86_64__ MOVQMtoR(mmreg, (uptr)PS2GS_BASE(mem)); SetMMXstate(); -#else - assert(0); -#endif } } diff --git a/pcsx2/x86/iHw.cpp b/pcsx2/x86/iHw.cpp index 5572948972..ba3743b55f 100644 --- a/pcsx2/x86/iHw.cpp +++ b/pcsx2/x86/iHw.cpp @@ -195,7 +195,7 @@ int hwConstRead16(u32 x86reg, u32 mem, u32 sign) #ifdef PCSX2_VIRTUAL_MEM // -//#if defined(_MSC_VER) && !defined(__x86_64__) +//#if defined(_MSC_VER) //__declspec(naked) void recCheckF440() //{ // __asm { @@ -428,7 +428,6 @@ void hwConstRead64(u32 mem, int mmreg) { if( IS_XMMREG(mmreg) ) SSE_MOVLPS_M64_to_XMM(mmreg&0xff, (uptr)PSM(mem)); else { - X86_64ASSERT(); MMXONLY(MOVQMtoR(mmreg, (uptr)PSM(mem)); SetMMXstate();) } diff --git a/pcsx2/x86/iMMI.cpp b/pcsx2/x86/iMMI.cpp index dd2e1865e8..fbcf1369d5 100644 --- a/pcsx2/x86/iMMI.cpp +++ b/pcsx2/x86/iMMI.cpp @@ -112,13 +112,11 @@ void recPLZCW() SSE2_MOVD_XMM_to_R(EAX, regs); regs |= MEM_XMMTAG; } -#ifndef __x86_64__ else if( (regs = _checkMMXreg(MMX_GPR+_Rs_, MODE_READ)) >= 0 ) { MOVD32MMXtoR(EAX, regs); SetMMXstate(); regs |= MEM_MMXTAG; } -#endif else { MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); regs = 0; @@ -126,13 +124,10 @@ void recPLZCW() if( EEINST_ISLIVE1(_Rd_) ) _deleteEEreg(_Rd_, 0); -#ifndef __x86_64__ else { - if( (regd = _checkMMXreg(MMX_GPR+_Rd_, MODE_WRITE)) < 0 ) { + if( (regd = _checkMMXreg(MMX_GPR+_Rd_, MODE_WRITE)) < 0 ) _deleteEEreg(_Rd_, 0); - } } -#endif // first word TEST32RtoR(EAX, EAX); @@ -142,13 +137,11 @@ void recPLZCW() if( EEINST_ISLIVE1(_Rd_) || regd < 0 ) { MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], 31); } -#ifndef __x86_64__ else { SetMMXstate(); PCMPEQDRtoR(regd, regd); PSRLQItoR(regd, 59); } -#endif j8Ptr[1] = JMP8(0); x86SetJ8(j8Ptr[0]); @@ -166,12 +159,10 @@ void recPLZCW() if( EEINST_ISLIVE1(_Rd_) || regd < 0 ) { MOV32RtoM((uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], ECX); } -#ifndef __x86_64__ else { SetMMXstate(); MOVD32RtoMMX(regd, ECX); } -#endif x86SetJ8(j8Ptr[1]); @@ -182,14 +173,12 @@ void recPLZCW() SSE2_MOVD_XMM_to_R(EAX, regs&0xf); SSE2_PSHUFD_XMM_to_XMM(regs&0xf, regs&0xf, 0x4e); } -#ifndef __x86_64__ else if( regs >= 0 && (regs & MEM_MMXTAG) ) { PSHUFWRtoR(regs, regs, 0x4e); MOVD32MMXtoR(EAX, regs&0xf); PSHUFWRtoR(regs&0xf, regs&0xf, 0x4e); SetMMXstate(); } -#endif else MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ]); TEST32RtoR(EAX, EAX); @@ -325,15 +314,6 @@ REC_FUNC( MMI3, _Rd_ ); #endif -#ifdef __x86_64__ - -#define MMX_ALLOC_TEMP1(code) -#define MMX_ALLOC_TEMP2(code) -#define MMX_ALLOC_TEMP3(code) -#define MMX_ALLOC_TEMP4(code) - -#else - // MMX helper routines #define MMX_ALLOC_TEMP1(code) { \ int t0reg; \ @@ -375,8 +355,6 @@ REC_FUNC( MMI3, _Rd_ ); _freeMMXreg(t3reg); \ } \ -#endif // __x86_64__ - //////////////////////////////////////////////////// void recPSRLH( void ) { diff --git a/pcsx2/x86/iPsxHw.cpp b/pcsx2/x86/iPsxHw.cpp index ec2646e814..68d1c7f0dd 100644 --- a/pcsx2/x86/iPsxHw.cpp +++ b/pcsx2/x86/iPsxHw.cpp @@ -108,7 +108,6 @@ int psxHwConstRead8(u32 x86reg, u32 add, u32 sign) { void psxConstReadCounterMode16(int x86reg, int index, int sign) { if( IS_MMXREG(x86reg) ) { - X86_64ASSERT(); MMXONLY(MOV16MtoR(ECX, (uptr)&psxCounters[index].mode); MOVDMtoMMX(x86reg&0xf, (uptr)&psxCounters[index].mode - 2);) } @@ -270,7 +269,6 @@ int psxHwConstRead16(u32 x86reg, u32 add, u32 sign) { void psxConstReadCounterMode32(int x86reg, int index) { if( IS_MMXREG(x86reg) ) { - X86_64ASSERT(); MMXONLY(MOV16MtoR(ECX, (uptr)&psxCounters[index].mode); MOVDMtoMMX(x86reg&0xf, (uptr)&psxCounters[index].mode);) } diff --git a/pcsx2/x86/iR3000A.cpp b/pcsx2/x86/iR3000A.cpp index b5390f50f6..abb5f4416c 100644 --- a/pcsx2/x86/iR3000A.cpp +++ b/pcsx2/x86/iR3000A.cpp @@ -206,11 +206,7 @@ static void iIopDumpBlock( int startpc, u8 * ptr ) f = fopen( "mydump1", "wb" ); fwrite( ptr, 1, (uptr)x86Ptr - (uptr)ptr, f ); fclose( f ); -#ifdef __x86_64__ - sprintf( command, "objdump -D --target=binary --architecture=i386:x86-64 -M intel mydump1 | cat %s - > tempdump", filename ); -#else sprintf( command, "objdump -D --target=binary --architecture=i386 -M intel mydump1 | cat %s - > tempdump", filename ); -#endif system( command ); sprintf(command, "mv tempdump %s", filename); system(command); @@ -633,7 +629,6 @@ static void recShutdown() #pragma warning(disable:4731) // frame pointer register 'ebp' modified by inline assembly code -#if !defined(__x86_64__) static u32 s_uSaveESP = 0; static __forceinline void R3000AExecute() @@ -693,14 +688,10 @@ static __forceinline void R3000AExecute() } } -#else -void R3000AExecute(); -#endif - extern u32 g_psxNextBranchCycle; u32 g_psxlastpc = 0; -#if defined(_MSC_VER) && !defined(__x86_64__) +#if defined(_MSC_VER) static u32 g_temp; @@ -875,11 +866,7 @@ static void recClear(u32 Addr, u32 Size) } } -#ifdef __x86_64__ -#define IOP_MIN_BLOCK_BYTES 16 -#else #define IOP_MIN_BLOCK_BYTES 15 -#endif void rpsxMemConstClear(u32 mem) { @@ -915,12 +902,8 @@ void psxRecClearMem(BASEBLOCK* p) // there is a small problem: mem can be ored with 0xa<<28 or 0x8<<28, and don't know which MOV32ItoR(EDX, p->startpc); - assert( (uptr)x86Ptr <= 0xffffffff ); -#ifdef __x86_64__ - MOV32ItoR(R15, (uptr)x86Ptr); // will be replaced by JMP32 -#else - PUSH32I((uptr)x86Ptr); -#endif + assert( (uptr)x86Ptr <= 0xffffffff ); + PUSH32I((uptr)x86Ptr); JMP32((uptr)psxDispatcherClear - ( (uptr)x86Ptr + 5 )); assert( x86Ptr == (u8*)p->pFnptr + IOP_MIN_BLOCK_BYTES ); @@ -1050,7 +1033,7 @@ static void iPsxBranchTest(u32 newpc, u32 cpuBranch) static int *s_pCode; -#if !defined(_MSC_VER) || !defined(__x86_64__) +#if !defined(_MSC_VER) static void checkcodefn() { int pctemp; @@ -1287,10 +1270,6 @@ void psxRecRecompile(u32 startpc) u32 willbranch3 = 0; u32* ptr; -#ifdef __x86_64__ - FreezeXMMRegs(1); // fixme - check why this is needed on x64 builds -#endif - #ifdef _DEBUG //psxdump |= 4; if( psxdump & 4 ) @@ -1575,10 +1554,6 @@ StartRecomp: } else assert( s_pCurBlock->pFnptr != 0 ); - -#ifdef __x86_64__ - FreezeXMMRegs(0); // fixme - check why this is needed on x64 builds (rama) -#endif } R3000Acpu psxRec = { diff --git a/pcsx2/x86/iVU1micro.cpp b/pcsx2/x86/iVU1micro.cpp index 09b29e484e..17cf4d1527 100644 --- a/pcsx2/x86/iVU1micro.cpp +++ b/pcsx2/x86/iVU1micro.cpp @@ -90,16 +90,10 @@ void recVU1Shutdown() } void recResetVU1( void ) { + if( CHECK_VU1REC ) SuperVUReset(1); - if( CHECK_VU1REC ) { - SuperVUReset(1); - } - -#ifndef __x86_64__ x86FpuState = FPU_STATE; -#endif iCWstate = 0; - branch = 0; } diff --git a/pcsx2/x86/iVUops.h b/pcsx2/x86/iVUops.h index 4c9dde53dd..14da460df2 100644 --- a/pcsx2/x86/iVUops.h +++ b/pcsx2/x86/iVUops.h @@ -22,14 +22,16 @@ #define REC_VUOP(VU, f) { \ _freeXMMregs(/*&VU*/); \ - X86_32CODE(_freeMMXregs(); SetFPUstate();) \ + _freeMMXregs(); \ + SetFPUstate();) \ MOV32ItoM((uptr)&VU.code, (u32)VU.code); \ CALLFunc((uptr)VU##MI_##f); \ } #define REC_VUOPs(VU, f) { \ _freeXMMregs(); \ - X86_32CODE(_freeMMXregs(); SetFPUstate();) \ + _freeMMXregs(); \ + SetFPUstate();) \ if (VU==&VU1) { \ MOV32ItoM((uptr)&VU1.code, (u32)VU1.code); \ CALLFunc((uptr)VU1MI_##f); \ @@ -42,14 +44,16 @@ #define REC_VUOPFLAGS(VU, f) { \ _freeXMMregs(/*&VU*/); \ - X86_32CODE(_freeMMXregs(); SetFPUstate();) \ + _freeMMXregs(); \ + SetFPUstate(); \ MOV32ItoM((uptr)&VU.code, (u32)VU.code); \ CALLFunc((uptr)VU##MI_##f); \ } #define REC_VUBRANCH(VU, f) { \ _freeXMMregs(/*&VU*/); \ - X86_32CODE(_freeMMXregs(); SetFPUstate();) \ + _freeMMXregs(); \ + SetFPUstate(); \ MOV32ItoM((uptr)&VU.code, (u32)VU.code); \ MOV32ItoM((uptr)&VU.VI[REG_TPC].UL, (u32)pc); \ CALLFunc((uptr)VU##MI_##f); \ diff --git a/pcsx2/x86/ix86-32/iCore-32.cpp b/pcsx2/x86/ix86-32/iCore-32.cpp index f236a9a2ab..c7a046eae9 100644 --- a/pcsx2/x86/ix86-32/iCore-32.cpp +++ b/pcsx2/x86/ix86-32/iCore-32.cpp @@ -43,7 +43,6 @@ extern u16 g_x86AllocCounter; using namespace std; // use special x86 register allocation for ia32 -#ifndef __x86_64__ void _initX86regs() { memset(x86regs, 0, sizeof(x86regs)); @@ -347,8 +346,6 @@ void _freeX86regs() { } } -#endif // __x86_64__ - // MMX Caching _mmxregs mmxregs[8], s_saveMMXregs[8]; static int s_mmxchecknext = 0; diff --git a/pcsx2/x86/ix86-64/aR3000A-64.asm b/pcsx2/x86/ix86-64/aR3000A-64.asm deleted file mode 100644 index 8c3d9b5f0e..0000000000 --- a/pcsx2/x86/ix86-64/aR3000A-64.asm +++ /dev/null @@ -1,190 +0,0 @@ -extern psxRegs:abs -extern psxRecLUT:abs -extern psxRecRecompile:near -extern EEsCycle:abs - -.code - -R3000AInterceptor proc public - sub rsp, 48 - jmp rdx -R3000AInterceptor endp - -R3000AExecute proc public - - ;;while (EEsCycle > 0) { - push rbx - push rbp - push rsi - push rdi - push r12 - push r13 - push r14 - push r15 - -Execute_CheckCycles: - cmp dword ptr [EEsCycle], 0 - jle Execute_Exit - - ;;if ( !pblock->pFnptr || (pblock->startpc&PSX_MEMMASK) != (psxRegs.pc&PSX_MEMMASK) ) - ;; psxRecRecompile(psxRegs.pc); - - mov eax, dword ptr [psxRegs + 0208h] - mov ecx, eax - mov r12d, eax - shl rax, 32 - shr rax, 48 - and r12, 0fffch - shl rax, 3 - add rax, [psxRecLUT] - shl r12, 1 - add r12, [rax] - - mov r8d, [r12+4] - mov r9d, ecx - and r8d, 05fffffffh - and r9d, 05fffffffh - cmp r8d, r9d - jne Execute_Recompile - mov edx, [r12] - and rdx, 0fffffffh ;; pFnptr - jnz Execute_Function - -Execute_Recompile: - call psxRecRecompile - mov edx, [r12] - and rdx, 0fffffffh ;; pFnptr - -Execute_Function: - call R3000AInterceptor - - jmp Execute_CheckCycles - -Execute_Exit: - pop r15 - pop r14 - pop r13 - pop r12 - pop rdi - pop rsi - pop rbp - pop rbx - ret - -R3000AExecute endp - -psxDispatcher proc public - - mov [rsp+40], rdx - - mov eax, dword ptr [psxRegs + 0208h] - mov ecx, eax - mov r12d, eax - shl rax, 32 - shr rax, 48 - and r12, 0fffch - shl rax, 3 - add rax, [psxRecLUT] - shl r12, 1 - add r12, [rax] - - - mov eax, ecx - mov edx, [r12+4] - and eax, 5fffffffh - and edx, 5fffffffh - cmp eax, edx - je psxDispatcher_CheckPtr - - call psxRecRecompile -psxDispatcher_CheckPtr: - mov r12d, dword ptr [r12] - - and r12, 00fffffffh - mov rdx, r12 - mov rcx, [rsp+40] - sub rdx, rcx - sub rdx, 4 - mov [rcx], edx - - jmp r12 -psxDispatcher endp - -psxDispatcherClear proc public - - mov dword ptr [psxRegs + 0208h], edx - mov eax, edx - - - - mov r12d, edx - shl rax, 32 - shr rax, 48 - and r12, 0fffch - shl rax, 3 - add rax, [psxRecLUT] - shl r12, 1 - add r12, [rax] - - - mov ecx, edx - mov eax, ecx - mov edx, [r12+4] - and eax, 5fffffffh - and edx, 5fffffffh - cmp eax, edx - jne psxDispatcherClear_Recompile - - mov eax, dword ptr [r12] - - and rax, 00fffffffh - jmp rax - -psxDispatcherClear_Recompile: - call psxRecRecompile - mov eax, dword ptr [r12] - - - and rax, 00fffffffh - mov byte ptr [r15], 0e9h - mov rdx, rax - sub rdx, r15 - sub rdx, 5 - mov [r15+1], edx - - jmp rax -psxDispatcherClear endp - - -psxDispatcherReg proc public - - mov eax, dword ptr [psxRegs + 0208h] - mov ecx, eax - mov r12d, eax - shl rax, 32 - shr rax, 48 - and r12, 0fffch - shl rax, 3 - add rax, [psxRecLUT] - shl r12, 1 - add r12, [rax] - - - cmp ecx, dword ptr [r12+4] - jne psxDispatcherReg_recomp - - mov r12d, dword ptr [r12] - - and r12, 00fffffffh - jmp r12 - -psxDispatcherReg_recomp: - call psxRecRecompile - - mov eax, dword ptr [r12] - and rax, 00fffffffh - jmp rax - -psxDispatcherReg endp - -end diff --git a/pcsx2/x86/ix86-64/aR5900-64.S b/pcsx2/x86/ix86-64/aR5900-64.S deleted file mode 100644 index b0a03fa49a..0000000000 --- a/pcsx2/x86/ix86-64/aR5900-64.S +++ /dev/null @@ -1,249 +0,0 @@ -// iR5900.c assembly routines -// zerofrog(@gmail.com) -.intel_syntax - -.extern cpuRegs -.extern recRecompile -.extern recLUT -.extern lbase -.extern s_pCurBlock_ltime -.extern g_EEFreezeRegs - -#define BLOCKTYPE_STARTPC 4 // startpc offset -#define BLOCKTYPE_DELAYSLOT 1 // if bit set, delay slot - -#define BASEBLOCK_SIZE 2 // in dwords -#define PCOFFSET 0x2a8 - -#define REG_PC %edi -#define REG_BLOCK %r14 // preserved across calls -#define REG_BLOCKd %r14d - -.globl R5900Execute -R5900Execute: - push %rbx - push %rbp - push %r12 - push %r13 - push %r14 - push %r15 - - // calc PC_GETBLOCK - // ((BASEBLOCK*)(recLUT[((u32)(x)) >> 16] + (sizeof(BASEBLOCK)/4)*((x) & 0xffff))) - mov %eax, dword ptr [cpuRegs + PCOFFSET] - mov REG_PC, %eax - mov REG_BLOCKd, %eax - shl %rax, 32 - shr %rax, 48 - and REG_BLOCK, 0xfffc - shl %rax, 3 - add %rax, [recLUT] - shl REG_BLOCK, 1 - add REG_BLOCK, [%rax] - - // g_EEFreezeRegs = 1; - mov dword ptr [g_EEFreezeRegs], 1 - - cmp REG_PC, [REG_BLOCK+4] - jne Execute_Recompile - mov %edx, [REG_BLOCK] - and %rdx, 0xfffffff // pFnptr - jnz Execute_Function - -Execute_Recompile: - call recRecompile - mov %edx, [REG_BLOCK] - and %rdx, 0xfffffff // pFnptr - -Execute_Function: - call %rdx - - // g_EEFreezeRegs = 0; - mov dword ptr [g_EEFreezeRegs], 0 - - pop %r15 - pop %r14 - pop %r13 - pop %r12 - pop %rbp - pop %rbx - - ret - -.globl Dispatcher -Dispatcher: - // EDX contains the jump addr to modify - push %rdx - - // calc PC_GETBLOCK - // ((BASEBLOCK*)(recLUT[((u32)(x)) >> 16] + (sizeof(BASEBLOCK)/4)*((x) & 0xffff))) - mov %eax, dword ptr [cpuRegs + PCOFFSET] - mov REG_PC, %eax - mov REG_BLOCKd, %eax - shl %rax, 32 - shr %rax, 48 - and REG_BLOCK, 0xfffc - shl %rax, 3 - add %rax, [recLUT] - shl REG_BLOCK, 1 - add REG_BLOCK, [%rax] - - // check if startpc == cpuRegs.pc - //and %ecx, 0x5fffffff // remove higher bits - cmp REG_PC, dword ptr [REG_BLOCK+BLOCKTYPE_STARTPC] - je Dispatcher_CheckPtr - - // recompile - call recRecompile -Dispatcher_CheckPtr: - mov REG_BLOCKd, dword ptr [REG_BLOCK] - -#ifdef _DEBUG - test REG_BLOCKd, REG_BLOCKd - jnz Dispatcher_CallFn - // throw an exception - int 10 - -Dispatcher_CallFn: -#endif - - and REG_BLOCK, 0x0fffffff - mov %rdx, REG_BLOCK - pop %rcx // x86Ptr to mod - sub %rdx, %rcx - sub %rdx, 4 - mov [%rcx], %edx - - jmp REG_BLOCK - - -.globl DispatcherClear -DispatcherClear: - // EDX contains the current pc - mov dword ptr [cpuRegs + PCOFFSET], %edx - mov %eax, %edx - - // calc PC_GETBLOCK - // ((BASEBLOCK*)(recLUT[((u32)(x)) >> 16] + (sizeof(BASEBLOCK)/4)*((x) & 0xffff))) - mov REG_BLOCKd, %edx - shl %rax, 32 - shr %rax, 48 - and REG_BLOCK, 0xfffc - shl %rax, 3 - add %rax, [recLUT] - shl REG_BLOCK, 1 - add REG_BLOCK, [%rax] - - cmp %edx, dword ptr [REG_BLOCK + BLOCKTYPE_STARTPC] - jne DispatcherClear_Recompile - - mov %eax, dword ptr [REG_BLOCK] - -#ifdef _DEBUG - test %eax, %eax - jnz DispatcherClear_CallFn - // throw an exception - int 10 - -DispatcherClear_CallFn: -#endif - - and %rax, 0x0fffffff - jmp %rax - -DispatcherClear_Recompile: - mov REG_PC, %edx - call recRecompile - mov %eax, dword ptr [REG_BLOCK] - - // r15 holds the prev x86 pointer - and %rax, 0x0fffffff - mov byte ptr [%r15], 0xe9 // jmp32 - mov %rdx, %rax - sub %rdx, %r15 - sub %rdx, 5 - mov [%r15+1], %edx - - jmp %rax - - - -// called when jumping to variable pc address -.globl DispatcherReg -DispatcherReg: - //s_pDispatchBlock = PC_GETBLOCK(cpuRegs.pc) - mov %eax, dword ptr [cpuRegs + PCOFFSET] - mov REG_PC, %eax - mov REG_BLOCKd, %eax - shl %rax, 32 - shr %rax, 48 - and REG_BLOCK, 0xfffc - shl %rax, 3 - add %rax, [recLUT] - shl REG_BLOCK, 1 - add REG_BLOCK, [%rax] - - // check if startpc == cpuRegs.pc - //and %eax, 0x5fffffff // remove higher bits - cmp REG_PC, dword ptr [REG_BLOCK+BLOCKTYPE_STARTPC] - jne DispatcherReg_recomp - - mov REG_BLOCKd, dword ptr [REG_BLOCK] - -#ifdef _DEBUG - test REG_BLOCKd, REG_BLOCKd - jnz CallFn2 - // throw an exception - int 10 - -CallFn2: - -#endif - - and REG_BLOCK, 0x0fffffff - jmp REG_BLOCK // fnptr - -DispatcherReg_recomp: - call recRecompile - - mov %eax, dword ptr [REG_BLOCK] - and %rax, 0x0fffffff - jmp %rax // fnptr - - -.globl _StartPerfCounter -_StartPerfCounter: - - push %rax - push %rbx - push %rcx - - rdtsc - mov dword ptr [lbase], %eax - mov dword ptr [lbase + 4], %edx - - pop %rcx - pop %rbx - pop %rax - ret - -.globl _StopPerfCounter -_StopPerfCounter: - - push %rax - push %rbx - push %rcx - - rdtsc - - sub %eax, dword ptr [lbase] - sbb %edx, dword ptr [lbase + 4] - mov %ecx, s_pCurBlock_ltime - add %eax, dword ptr [%ecx] - adc %edx, dword ptr [%ecx + 4] - mov dword ptr [%ecx], %eax - mov dword ptr [%ecx + 4], %edx - pop %rcx - pop %rbx - pop %rax - ret diff --git a/pcsx2/x86/ix86-64/aR5900-64.asm b/pcsx2/x86/ix86-64/aR5900-64.asm deleted file mode 100644 index 4f026c9486..0000000000 --- a/pcsx2/x86/ix86-64/aR5900-64.asm +++ /dev/null @@ -1,261 +0,0 @@ -extern cpuRegs:abs -extern recRecompile:near -extern recLUT:abs -extern lbase:abs -extern s_pCurBlock_ltime:abs - -extern g_globalXMMData:abs -extern g_globalXMMSaved:abs -extern g_EEFreezeRegs:abs - -.code - -FreezeXMMRegs_ proc public - ;;assert( g_EEFreezeRegs ); - test ecx, ecx - jz XMMRestore - - cmp byte ptr [g_globalXMMSaved], 0 - jne XMMSaveEnd - - mov byte ptr [g_globalXMMSaved], 1 - - movaps xmmword ptr [g_globalXMMData + 000h], xmm0 - movaps xmmword ptr [g_globalXMMData + 010h], xmm1 - movaps xmmword ptr [g_globalXMMData + 020h], xmm2 - movaps xmmword ptr [g_globalXMMData + 030h], xmm3 - movaps xmmword ptr [g_globalXMMData + 040h], xmm4 - movaps xmmword ptr [g_globalXMMData + 050h], xmm5 - movaps xmmword ptr [g_globalXMMData + 060h], xmm6 - movaps xmmword ptr [g_globalXMMData + 070h], xmm7 - -XMMSaveEnd: - ret - -XMMRestore: - - cmp byte ptr [g_globalXMMSaved], 0 - je XMMSaveEnd - - mov byte ptr [g_globalXMMSaved], 0 - - ;; TODO: really need to backup all regs? - movaps xmm0, xmmword ptr [g_globalXMMData + 000h] - movaps xmm1, xmmword ptr [g_globalXMMData + 010h] - movaps xmm2, xmmword ptr [g_globalXMMData + 020h] - movaps xmm3, xmmword ptr [g_globalXMMData + 030h] - movaps xmm4, xmmword ptr [g_globalXMMData + 040h] - movaps xmm5, xmmword ptr [g_globalXMMData + 050h] - movaps xmm6, xmmword ptr [g_globalXMMData + 060h] - movaps xmm7, xmmword ptr [g_globalXMMData + 070h] - -XMMRestoreEnd: - ret - -FreezeXMMRegs_ endp - -R5900Interceptor proc public - sub rsp, 48 - jmp rdx -R5900Interceptor endp - -R5900Execute proc public - - push rbx - push rbp - push rsi - push rdi - push r12 - push r13 - push r14 - push r15 - - ;;BASEBLOCK* pblock = PC_GETBLOCK(cpuRegs.pc); - mov eax, dword ptr [cpuRegs + 02a8h] - mov ecx, eax - mov r14d, eax - shl rax, 32 - shr rax, 48 - and r14, 0fffch - shl rax, 3 - add rax, [recLUT] - shl r14, 1 - add r14, [rax] - - ;; g_EEFreezeRegs = 1; - mov dword ptr [g_EEFreezeRegs], 1 - - cmp ecx, [r14+4] - jne Execute_Recompile - mov edx, [r14] - and rdx, 0fffffffh ;; pFnptr - jnz Execute_Function - -Execute_Recompile: - call recRecompile - mov edx, [r14] - and rdx, 0fffffffh ;; pFnptr - -Execute_Function: - call R5900Interceptor - - ;; g_EEFreezeRegs = 0; - mov dword ptr [g_EEFreezeRegs], 0 - - pop r15 - pop r14 - pop r13 - pop r12 - pop rdi - pop rsi - pop rbp - pop rbx - - ret - -R5900Execute endp - -Dispatcher proc public - - mov [rsp+40], rdx - - mov eax, dword ptr [cpuRegs + 02a8h] - mov ecx, eax - mov r14d, eax - shl rax, 32 - shr rax, 48 - and r14, 0fffch - shl rax, 3 - add rax, [recLUT] - shl r14, 1 - add r14, [rax] - - - - cmp ecx, dword ptr [r14+4] - je Dispatcher_CheckPtr - - - call recRecompile -Dispatcher_CheckPtr: - mov r14d, dword ptr [r14] - - and r14, 0fffffffh - mov rdx, r14 - mov rcx, [rsp+40] - sub rdx, rcx - sub rdx, 4 - mov [rcx], edx - - jmp r14 -Dispatcher endp - -DispatcherClear proc public - - mov dword ptr [cpuRegs + 02a8h], edx - mov eax, edx - - - - mov r14d, edx - shl rax, 32 - shr rax, 48 - and r14, 0fffch - shl rax, 3 - add rax, [recLUT] - shl r14, 1 - add r14, [rax] - - cmp edx, dword ptr [r14 + 4] - jne DispatcherClear_Recompile - - mov eax, dword ptr [r14] - - and rax, 0fffffffh - jmp rax - -DispatcherClear_Recompile: - mov ecx, edx - call recRecompile - mov eax, dword ptr [r14] - - - and rax, 0fffffffh - mov byte ptr [r15], 0e9h - mov rdx, rax - sub rdx, r15 - sub rdx, 5 - mov [r15+1], edx - - jmp rax -DispatcherClear endp - - - -DispatcherReg proc public - - mov eax, dword ptr [cpuRegs + 02a8h] - mov ecx, eax - mov r14d, eax - shl rax, 32 - shr rax, 48 - and r14, 0fffch - shl rax, 3 - add rax, [recLUT] - shl r14, 1 - add r14, [rax] - - - - cmp ecx, dword ptr [r14+4] - jne DispatcherReg_recomp - - mov r14d, dword ptr [r14] - - and r14, 0fffffffh - jmp r14 - -DispatcherReg_recomp: - call recRecompile - - mov eax, dword ptr [r14] - and rax, 0fffffffh - jmp rax -DispatcherReg endp - -_StartPerfCounter proc public - push rax - push rbx - push rcx - - rdtsc - mov dword ptr [lbase], eax - mov dword ptr [lbase + 4], edx - - pop rcx - pop rbx - pop rax - ret -_StartPerfCounter endp - -_StopPerfCounter proc public - push rax - push rbx - push rcx - - rdtsc - - sub eax, dword ptr [lbase] - sbb edx, dword ptr [lbase + 4] - mov ecx, [s_pCurBlock_ltime] - add eax, dword ptr [ecx] - adc edx, dword ptr [ecx + 4] - mov dword ptr [ecx], eax - mov dword ptr [ecx + 4], edx - pop rcx - pop rbx - pop rax - ret -_StopPerfCounter endp - -end diff --git a/pcsx2/x86/ix86-64/aVUzerorec-64.asm b/pcsx2/x86/ix86-64/aVUzerorec-64.asm deleted file mode 100644 index 4bf72c1bb4..0000000000 --- a/pcsx2/x86/ix86-64/aVUzerorec-64.asm +++ /dev/null @@ -1,126 +0,0 @@ -;; iR3000A.c assembly routines -;; zerofrog(@gmail.com) -extern svudispfntemp:near -extern QueryPerformanceCounter:near -extern s_TotalVUCycles:abs -extern s_callstack:ptr -extern s_vu1esp:abs -extern s_writeQ:abs -extern s_writeP:abs -extern g_curdebugvu:abs -extern SuperVUGetProgram:near -extern SuperVUCleanupProgram:near -extern g_sseVUMXCSR:abs -extern g_sseMXCSR:abs - -extern svubase:abs - -.code - -;; SuperVUExecuteProgram(u32 startpc, int vuindex) -SuperVUExecuteProgram proc public - - ;; uncomment only if SUPERVU_COUNT is defined - ;; { - ;push rcx - ;push rdx - ;mov rcx, svubase - ;sub rsp,32 - ;call QueryPerformanceCounter - ;add rsp,32 - ;pop rdx - ;pop rcx - ;; } - - mov rax, [rsp] - mov dword ptr [s_TotalVUCycles], 0 - - sub rsp, 48-8+80 - mov [rsp+48], rcx - mov [rsp+56], rdx - - mov [s_callstack], rax - - call SuperVUGetProgram - - mov [rsp+64], rbp - mov [rsp+72], rsi - mov [rsp+80], rdi - mov [rsp+88], rbx - mov [rsp+96], r12 - mov [rsp+104], r13 - mov [rsp+112], r14 - mov [rsp+120], r15 - - ;; _DEBUG - ;;mov [s_vu1esp], rsp - - ldmxcsr [g_sseVUMXCSR] - mov dword ptr [s_writeQ], 0ffffffffh - mov dword ptr [s_writeP], 0ffffffffh - jmp rax -SuperVUExecuteProgram endp - -SuperVUEndProgram proc public - ;; restore cpu state - ldmxcsr [g_sseMXCSR] - - mov rcx, [rsp+48] - mov rdx, [rsp+56] - mov rbp, [rsp+64] - mov rsi, [rsp+72] - mov rdi, [rsp+80] - mov rbx, [rsp+88] - mov r12, [rsp+96] - mov r13, [rsp+104] - mov r14, [rsp+112] - mov r15, [rsp+120] - - ;; _DEBUG - ;;sub [s_vu1esp], rsp - - add rsp, 128-32 - call SuperVUCleanupProgram - add rsp, 32 - jmp [s_callstack] ;; so returns correctly -SuperVUEndProgram endp - -svudispfn proc public - mov [g_curdebugvu], rax - push rcx - push rdx - push rbp - push rsi - push rdi - push rbx - push r8 - push r9 - push r10 - push r11 - push r12 - push r13 - push r14 - push r15 - - sub rsp, 32 - call svudispfntemp - add rsp, 32 - - pop r15 - pop r14 - pop r13 - pop r12 - pop r11 - pop r10 - pop r9 - pop r8 - pop rbx - pop rdi - pop rsi - pop rbp - pop rdx - pop rcx - ret -svudispfn endp - -end diff --git a/pcsx2/x86/ix86-64/aVif_proc-64.asm b/pcsx2/x86/ix86-64/aVif_proc-64.asm deleted file mode 100644 index 312bd85668..0000000000 --- a/pcsx2/x86/ix86-64/aVif_proc-64.asm +++ /dev/null @@ -1,1827 +0,0 @@ -extern _vifRegs:abs -extern _vifMaskRegs:abs -extern _vifRow:abs -extern _vifCol:abs -extern s_TempDecompress:abs - - -.code - -UNPACK_Write0_Regular macro r0, CL, DEST_OFFSET, MOVDQA - MOVDQA [rcx+DEST_OFFSET], r0 - endm - -UNPACK_Write1_Regular macro r0, CL, DEST_OFFSET, MOVDQA - MOVDQA [rcx], r0 - add rcx, rdi - endm - -UNPACK_Write0_Mask macro r0, CL, DEST_OFFSET, MOVDQA - UNPACK_Write0_Regular r0, CL, DEST_OFFSET, MOVDQA - endm - -UNPACK_Write1_Mask macro r0, CL, DEST_OFFSET, MOVDQA - UNPACK_Write1_Regular r0, CL, DEST_OFFSET, MOVDQA - endm - - -UNPACK_Write0_WriteMask macro r0, CL, DEST_OFFSET, MOVDQA - - movdqa xmm3, [rax + 64*(CL) + 48] - pand r0, xmm3 - pandn xmm3, [rcx] - por r0, xmm3 - MOVDQA [rcx], r0 - add rcx, 16 - endm - - -UNPACK_Write1_WriteMask macro r0, CL, DEST_OFFSET, MOVDQA - - movdqa xmm3, [rax + 64*(0) + 48] - pand r0, xmm3 - pandn xmm3, [rcx] - por r0, xmm3 - MOVDQA [rcx], r0 - add rcx, rdi - endm - -UNPACK_Mask_SSE_0 macro r0 - pand r0, xmm3 - por r0, xmm5 - endm - - - - -UNPACK_Mask_SSE_1 macro r0 - - pand r0, xmm3 - por r0, xmm5 - pand xmm3, xmm6 - paddd r0, xmm3 - endm - - - -UNPACK_Mask_SSE_2 macro r0 - - - pand r0, xmm3 - pand xmm3, xmm6 - paddd xmm6, r0 - por r0, xmm5 - paddd r0, xmm3 - endm - -UNPACK_WriteMask_SSE_0 macro r0 - UNPACK_Mask_SSE_0 r0 - endm -UNPACK_WriteMask_SSE_1 macro r0 - UNPACK_Mask_SSE_1 r0 - endm -UNPACK_WriteMask_SSE_2 macro r0 - UNPACK_Mask_SSE_2 r0 - endm - -UNPACK_Regular_SSE_0 macro r0 - endm - -UNPACK_Regular_SSE_1 macro r0 - paddd r0, xmm6 - endm - -UNPACK_Regular_SSE_2 macro r0 - paddd r0, xmm6 - movdqa xmm6, r0 - endm - - -UNPACK_Setup_Mask_SSE macro CL - mov rax, [_vifMaskRegs] - movdqa xmm4, [rax + 64*(CL) + 16] - movdqa xmm5, [rax + 64*(CL) + 32] - movdqa xmm3, [rax + 64*(CL)] - pand xmm4, xmm6 - pand xmm5, xmm7 - por xmm5, xmm4 - endm - -UNPACK_Start_Setup_Mask_SSE_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm - -UNPACK_Start_Setup_Mask_SSE_1 macro CL - mov rax, [_vifMaskRegs] - movdqa xmm4, [rax + 64*(CL) + 16] - movdqa xmm5, [rax + 64*(CL) + 32] - pand xmm4, xmm6 - pand xmm5, xmm7 - por xmm5, xmm4 - endm - -UNPACK_Start_Setup_Mask_SSE_2 macro CL - endm - -UNPACK_Setup_Mask_SSE_0_1 macro CL - endm -UNPACK_Setup_Mask_SSE_1_1 macro CL - mov rax, [_vifMaskRegs] - movdqa xmm3, [rax + 64*(0)] - endm - - -UNPACK_Setup_Mask_SSE_2_1 macro CL - - mov rax, [_vifMaskRegs] - movdqa xmm4, [rax + 64*(0) + 16] - movdqa xmm5, [rax + 64*(0) + 32] - movdqa xmm3, [rax + 64*(0)] - pand xmm4, xmm6 - pand xmm5, xmm7 - por xmm5, xmm4 - endm - -UNPACK_Setup_Mask_SSE_0_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm -UNPACK_Setup_Mask_SSE_1_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm -UNPACK_Setup_Mask_SSE_2_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm - - -UNPACK_Setup_WriteMask_SSE_0_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm -UNPACK_Setup_WriteMask_SSE_1_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm -UNPACK_Setup_WriteMask_SSE_2_0 macro CL - UNPACK_Setup_Mask_SSE CL - endm -UNPACK_Setup_WriteMask_SSE_0_1 macro CL - UNPACK_Setup_Mask_SSE_1_1 CL - endm - -UNPACK_Setup_WriteMask_SSE_1_1 macro CL - UNPACK_Setup_Mask_SSE_1_1 CL - endm - -UNPACK_Setup_WriteMask_SSE_2_1 macro CL - UNPACK_Setup_Mask_SSE_2_1 CL - endm - -UNPACK_Start_Setup_WriteMask_SSE_0 macro CL - UNPACK_Start_Setup_Mask_SSE_1 CL - endm -UNPACK_Start_Setup_WriteMask_SSE_1 macro CL - UNPACK_Start_Setup_Mask_SSE_1 CL - endm -UNPACK_Start_Setup_WriteMask_SSE_2 macro CL - UNPACK_Start_Setup_Mask_SSE_2 CL - endm - -UNPACK_Start_Setup_Regular_SSE_0 macro CL - endm -UNPACK_Start_Setup_Regular_SSE_1 macro CL - endm -UNPACK_Start_Setup_Regular_SSE_2 macro CL - endm -UNPACK_Setup_Regular_SSE_0_0 macro CL - endm -UNPACK_Setup_Regular_SSE_1_0 macro CL - endm -UNPACK_Setup_Regular_SSE_2_0 macro CL - endm -UNPACK_Setup_Regular_SSE_0_1 macro CL - endm -UNPACK_Setup_Regular_SSE_1_1 macro CL - endm -UNPACK_Setup_Regular_SSE_2_1 macro CL - endm - -UNPACK_INC_DST_0_Regular macro qw - add rcx, (16*qw) - endm -UNPACK_INC_DST_1_Regular macro qw - endm -UNPACK_INC_DST_0_Mask macro qw - add rcx, (16*qw) - endm -UNPACK_INC_DST_1_Mask macro qw - endm -UNPACK_INC_DST_0_WriteMask macro qw - endm -UNPACK_INC_DST_1_WriteMask macro qw - endm - - -UNPACK4_SSE macro CL, TOTALCL, MaskType, ModeType - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+0 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm0 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm0, CL, 0, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+1 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm1 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm1, CL+1, 16, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+2 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm2 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm2, CL+2, 32, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+3 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm7 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm7, CL+3, 48, movdqa - - @CatStr(UNPACK_INC_DST_, TOTALCL, _, MaskType) 4 - endm - - -UNPACK3_SSE macro CL, TOTALCL, MaskType, ModeType - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm0 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm0, CL, 0, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+1 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm1 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm1, CL+1, 16, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+2 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm2 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm2, CL+2, 32, movdqa - - @CatStr(UNPACK_INC_DST_, TOTALCL, _, MaskType) 3 - endm - -UNPACK2_SSE macro CL, TOTALCL, MaskType, ModeType - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm0 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm0, CL, 0, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+1 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm1 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm1, CL+1, 16, movdqa - - @CatStr(UNPACK_INC_DST_, TOTALCL, _, MaskType) 2 - endm - -UNPACK1_SSE macro CL, TOTALCL, MaskType, ModeType - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm0 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm0, CL, 0, movdqa - - @CatStr(UNPACK_INC_DST_, TOTALCL, _, MaskType) 1 - endm - - - -UNPACK_S_32SSE_4x macro CL, TOTALCL, MaskType, ModeType, MOVDQA - MOVDQA xmm7, [rdx] - - pshufd xmm0, xmm7, 0 - pshufd xmm1, xmm7, 055h - pshufd xmm2, xmm7, 0aah - pshufd xmm7, xmm7, 0ffh - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_S_32SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_32SSE_4x CL, TOTALCL, MaskType, ModeType, movdqa - endm -UNPACK_S_32SSE_4 macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_32SSE_4x CL, TOTALCL, MaskType, ModeType, movdqu - endm - -UNPACK_S_32SSE_3x macro CL, TOTALCL, MaskType, ModeType, MOVDQA - MOVDQA xmm2, [rdx] - - pshufd xmm0, xmm2, 0 - pshufd xmm1, xmm2, 055h - pshufd xmm2, xmm2, 0aah - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_S_32SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_32SSE_3x CL, TOTALCL, MaskType, ModeType, movdqa - endm -UNPACK_S_32SSE_3 macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_32SSE_3x CL, TOTALCL, MaskType, ModeType, movdqu - endm - -UNPACK_S_32SSE_2 macro CL, TOTALCL, MaskType, ModeType - movq xmm1, QWORD PTR [rdx] - - pshufd xmm0, xmm1, 0 - pshufd xmm1, xmm1, 055h - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_S_32SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_32SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_32SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - pshufd xmm0, xmm0, 0 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_S_32SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_32SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_S_16SSE_4 macro CL, TOTALCL, MaskType, ModeType - movq xmm7, QWORD PTR [rdx] - punpcklwd xmm7, xmm7 - UNPACK_RIGHTSHIFT xmm7, 16 - - pshufd xmm0, xmm7, 0 - pshufd xmm1, xmm7, 055h - pshufd xmm2, xmm7, 0aah - pshufd xmm7, xmm7, 0ffh - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_S_16SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_16SSE_4 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_16SSE_3 macro CL, TOTALCL, MaskType, ModeType - movq xmm2, QWORD PTR [rdx] - punpcklwd xmm2, xmm2 - UNPACK_RIGHTSHIFT xmm2, 16 - - pshufd xmm0, xmm2, 0 - pshufd xmm1, xmm2, 055h - pshufd xmm2, xmm2, 0aah - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - add rdx, 6 - endm - -UNPACK_S_16SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_16SSE_3 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_16SSE_2 macro CL, TOTALCL, MaskType, ModeType - movd xmm1, dword ptr [rdx] - punpcklwd xmm1, xmm1 - UNPACK_RIGHTSHIFT xmm1, 16 - - pshufd xmm0, xmm1, 0 - pshufd xmm1, xmm1, 055h - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_S_16SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_16SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_16SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 16 - pshufd xmm0, xmm0, 0 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 2 - endm - -UNPACK_S_16SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_16SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_S_8SSE_4 macro CL, TOTALCL, MaskType, ModeType - movd xmm7, dword ptr [rdx] - punpcklbw xmm7, xmm7 - punpcklwd xmm7, xmm7 - UNPACK_RIGHTSHIFT xmm7, 24 - - pshufd xmm0, xmm7, 0 - pshufd xmm1, xmm7, 055h - pshufd xmm2, xmm7, 0aah - pshufd xmm7, xmm7, 0ffh - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_S_8SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_8SSE_4 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_8SSE_3 macro CL, TOTALCL, MaskType, ModeType - movd xmm2, dword ptr [rdx] - punpcklbw xmm2, xmm2 - punpcklwd xmm2, xmm2 - UNPACK_RIGHTSHIFT xmm2, 24 - - pshufd xmm0, xmm2, 0 - pshufd xmm1, xmm2, 055h - pshufd xmm2, xmm2, 0aah - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 3 - endm - -UNPACK_S_8SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_8SSE_3 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_8SSE_2 macro CL, TOTALCL, MaskType, ModeType - movd xmm1, dword ptr [rdx] - punpcklbw xmm1, xmm1 - punpcklwd xmm1, xmm1 - UNPACK_RIGHTSHIFT xmm1, 24 - - pshufd xmm0, xmm1, 0 - pshufd xmm1, xmm1, 055h - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 2 - endm - -UNPACK_S_8SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_8SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_S_8SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklbw xmm0, xmm0 - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 24 - pshufd xmm0, xmm0, 0 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - inc rdx - endm - -UNPACK_S_8SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_S_8SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_V2_32SSE_4A macro CL, TOTALCL, MaskType, ModeType - MOVDQA xmm0, [rdx] - MOVDQA xmm2, [rdx+16] - - pshufd xmm1, xmm0, 0eeh - pshufd xmm7, xmm2, 0eeh - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 32 - endm - -UNPACK_V2_32SSE_4 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+8] - movq xmm2, QWORD PTR [rdx+16] - movq xmm7, QWORD PTR [rdx+24] - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 32 - endm - -UNPACK_V2_32SSE_3A macro CL, TOTALCL, MaskType, ModeType - MOVDQA xmm0, [rdx] - movq xmm2, QWORD PTR [rdx+16] - pshufd xmm1, xmm0, 0eeh - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 24 - endm - -UNPACK_V2_32SSE_3 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+8] - movq xmm2, QWORD PTR [rdx+16] - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 24 - endm - -UNPACK_V2_32SSE_2 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+8] - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V2_32SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V2_32SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V2_32SSE_1 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V2_32SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V2_32SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_V2_16SSE_4A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - punpckhwd xmm2, [rdx] - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - punpckhqdq xmm1, xmm0 - punpckhqdq xmm7, xmm2 - - punpcklqdq xmm0, xmm0 - punpcklqdq xmm2, xmm2 - punpckhqdq xmm1, xmm1 - punpckhqdq xmm7, xmm7 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - add rdx, 16 - endm - -UNPACK_V2_16SSE_4 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - - punpckhwd xmm2, xmm0 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - - punpckhqdq xmm1, xmm0 - punpckhqdq xmm7, xmm2 - - punpcklqdq xmm0, xmm0 - punpcklqdq xmm2, xmm2 - punpckhqdq xmm1, xmm1 - punpckhqdq xmm7, xmm7 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V2_16SSE_3A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - punpckhwd xmm2, [rdx] - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - - punpckhqdq xmm1, xmm0 - - punpcklqdq xmm0, xmm0 - punpcklqdq xmm2, xmm2 - punpckhqdq xmm1, xmm1 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V2_16SSE_3 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - - punpckhwd xmm2, xmm0 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - - punpckhqdq xmm1, xmm0 - - punpcklqdq xmm0, xmm0 - punpcklqdq xmm2, xmm2 - punpckhqdq xmm1, xmm1 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V2_16SSE_2A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - UNPACK_RIGHTSHIFT xmm0, 16 - - - punpckhqdq xmm1, xmm0 - - punpcklqdq xmm0, xmm0 - punpckhqdq xmm1, xmm1 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V2_16SSE_2 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 16 - - - punpckhqdq xmm1, xmm0 - - punpcklqdq xmm0, xmm0 - punpckhqdq xmm1, xmm1 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V2_16SSE_1A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - UNPACK_RIGHTSHIFT xmm0, 16 - punpcklqdq xmm0, xmm0 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_V2_16SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 16 - punpcklqdq xmm0, xmm0 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - - - -UNPACK_V2_8SSE_4 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - - punpcklbw xmm0, xmm0 - punpckhwd xmm2, xmm0 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - - punpckhqdq xmm1, xmm0 - punpckhqdq xmm7, xmm2 - - punpcklqdq xmm0, xmm0 - punpcklqdq xmm2, xmm2 - punpckhqdq xmm1, xmm1 - punpckhqdq xmm7, xmm7 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V2_8SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V2_8SSE_4 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V2_8SSE_3 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - - punpcklbw xmm0, xmm0 - punpckhwd xmm2, xmm0 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - - punpckhqdq xmm1, xmm0 - - punpcklqdq xmm0, xmm0 - punpcklqdq xmm2, xmm2 - punpckhqdq xmm1, xmm1 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 6 - endm - -UNPACK_V2_8SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V2_8SSE_3 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V2_8SSE_2 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklbw xmm0, xmm0 - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 24 - - - punpckhqdq xmm1, xmm0 - - punpcklqdq xmm0, xmm0 - punpckhqdq xmm1, xmm1 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_V2_8SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V2_8SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V2_8SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklbw xmm0, xmm0 - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 24 - punpcklqdq xmm0, xmm0 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 2 - endm - -UNPACK_V2_8SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V2_8SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_V3_32SSE_4x macro CL, TOTALCL, MaskType, ModeType, MOVDQA - MOVDQA xmm0, [rdx] - movdqu xmm1, [rdx+12] - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+0 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm0 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm0, CL, 0, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+1 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm1 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm1, CL+1, 16, movdqa - - - MOVDQA xmm7, [rdx+32] - movdqu xmm2, [rdx+24] - psrldq xmm7, 4 - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+2 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm2 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm2, CL+2, 32, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+3 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm7 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm7, CL+3, 48, movdqa - - @CatStr(UNPACK_INC_DST_, TOTALCL, _, MaskType) 4 - - add rdx, 48 - endm - -UNPACK_V3_32SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_4x CL, TOTALCL, MaskType, ModeType, movdqa - endm -UNPACK_V3_32SSE_4 macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_4x CL, TOTALCL, MaskType, ModeType, movdqu - endm - -UNPACK_V3_32SSE_3x macro CL, TOTALCL, MaskType, ModeType, MOVDQA - MOVDQA xmm0, [rdx] - movdqu xmm1, [rdx+12] - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm0 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm0, CL, 0, movdqa - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+1 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm1 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm1, CL+1, 16, movdqa - - movdqu xmm2, [rdx+24] - - @CatStr(UNPACK_Setup_, MaskType, _SSE_, ModeType, _, TOTALCL) CL+2 - @CatStr(UNPACK_, MaskType, _SSE_, ModeType) xmm2 - @CatStr(UNPACK_Write, TOTALCL, _, MaskType) xmm2, CL+2, 32, movdqa - - @CatStr(UNPACK_INC_DST_, TOTALCL, _, MaskType) 3 - - add rdx, 36 - endm - -UNPACK_V3_32SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_3x CL, TOTALCL, MaskType, ModeType, movdqa - endm -UNPACK_V3_32SSE_3 macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_3x CL, TOTALCL, MaskType, ModeType, movdqu - endm - -UNPACK_V3_32SSE_2x macro CL, TOTALCL, MaskType, ModeType, MOVDQA - MOVDQA xmm0, [rdx] - movdqu xmm1, [rdx+12] - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 24 - endm - -UNPACK_V3_32SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_2x CL, TOTALCL, MaskType, ModeType, movdqa - endm -UNPACK_V3_32SSE_2 macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_2x CL, TOTALCL, MaskType, ModeType, movdqu - endm - -UNPACK_V3_32SSE_1x macro CL, TOTALCL, MaskType, ModeType, MOVDQA - MOVDQA xmm0, [rdx] - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V3_32SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_1x CL, TOTALCL, MaskType, ModeType, movdqa - endm -UNPACK_V3_32SSE_1 macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_32SSE_1x CL, TOTALCL, MaskType, ModeType, movdqu - endm - - -UNPACK_V3_16SSE_4 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+6] - - punpcklwd xmm0, xmm0 - movq xmm2, QWORD PTR [rdx+12] - punpcklwd xmm1, xmm1 - UNPACK_RIGHTSHIFT xmm0, 16 - movq xmm7, QWORD PTR [rdx+18] - UNPACK_RIGHTSHIFT xmm1, 16 - punpcklwd xmm2, xmm2 - punpcklwd xmm7, xmm7 - - UNPACK_RIGHTSHIFT xmm2, 16 - UNPACK_RIGHTSHIFT xmm7, 16 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 24 - endm - -UNPACK_V3_16SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_16SSE_4 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V3_16SSE_3 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+6] - - punpcklwd xmm0, xmm0 - movq xmm2, QWORD PTR [rdx+12] - punpcklwd xmm1, xmm1 - UNPACK_RIGHTSHIFT xmm0, 16 - punpcklwd xmm2, xmm2 - - UNPACK_RIGHTSHIFT xmm1, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 18 - endm - -UNPACK_V3_16SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_16SSE_3 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V3_16SSE_2 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+6] - - punpcklwd xmm0, xmm0 - punpcklwd xmm1, xmm1 - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm1, 16 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V3_16SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_16SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V3_16SSE_1 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 16 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 6 - endm - -UNPACK_V3_16SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_16SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_V3_8SSE_4 macro CL, TOTALCL, MaskType, ModeType - movq xmm1, QWORD PTR [rdx] - movq xmm7, QWORD PTR [rdx+6] - - punpcklbw xmm1, xmm1 - punpcklbw xmm7, xmm7 - punpcklwd xmm0, xmm1 - psrldq xmm1, 6 - punpcklwd xmm2, xmm7 - psrldq xmm7, 6 - punpcklwd xmm1, xmm1 - UNPACK_RIGHTSHIFT xmm0, 24 - punpcklwd xmm7, xmm7 - - UNPACK_RIGHTSHIFT xmm2, 24 - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm7, 24 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V3_8SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_8SSE_4 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V3_8SSE_3 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - movd xmm1, dword ptr [rdx+3] - - punpcklbw xmm0, xmm0 - movd xmm2, dword ptr [rdx+6] - punpcklbw xmm1, xmm1 - punpcklwd xmm0, xmm0 - punpcklbw xmm2, xmm2 - - punpcklwd xmm1, xmm1 - punpcklwd xmm2, xmm2 - - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 9 - endm - -UNPACK_V3_8SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_8SSE_3 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V3_8SSE_2 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - movd xmm1, dword ptr [rdx+3] - - punpcklbw xmm0, xmm0 - punpcklbw xmm1, xmm1 - - punpcklwd xmm0, xmm0 - punpcklwd xmm1, xmm1 - - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm1, 24 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 6 - endm - -UNPACK_V3_8SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_8SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V3_8SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklbw xmm0, xmm0 - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 24 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 3 - endm - -UNPACK_V3_8SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V3_8SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -UNPACK_V4_32SSE_4A macro CL, TOTALCL, MaskType, ModeType - movdqa xmm0, [rdx] - movdqa xmm1, [rdx+16] - movdqa xmm2, [rdx+32] - movdqa xmm7, [rdx+48] - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 64 - endm - -UNPACK_V4_32SSE_4 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - movdqu xmm1, [rdx+16] - movdqu xmm2, [rdx+32] - movdqu xmm7, [rdx+48] - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 64 - endm - -UNPACK_V4_32SSE_3A macro CL, TOTALCL, MaskType, ModeType - movdqa xmm0, [rdx] - movdqa xmm1, [rdx+16] - movdqa xmm2, [rdx+32] - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 48 - endm - -UNPACK_V4_32SSE_3 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - movdqu xmm1, [rdx+16] - movdqu xmm2, [rdx+32] - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 48 - endm - -UNPACK_V4_32SSE_2A macro CL, TOTALCL, MaskType, ModeType - movdqa xmm0, [rdx] - movdqa xmm1, [rdx+16] - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 32 - endm - -UNPACK_V4_32SSE_2 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - movdqu xmm1, [rdx+16] - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 32 - endm - -UNPACK_V4_32SSE_1A macro CL, TOTALCL, MaskType, ModeType - movdqa xmm0, [rdx] - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V4_32SSE_1 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - - -UNPACK_V4_16SSE_4A macro CL, TOTALCL, MaskType, ModeType - - punpcklwd xmm0, [rdx] - punpckhwd xmm1, [rdx] - punpcklwd xmm2, [rdx+16] - punpckhwd xmm7, [rdx+16] - - UNPACK_RIGHTSHIFT xmm1, 16 - UNPACK_RIGHTSHIFT xmm7, 16 - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 32 - endm - -UNPACK_V4_16SSE_4 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - movdqu xmm2, [rdx+16] - - punpckhwd xmm1, xmm0 - punpckhwd xmm7, xmm2 - punpcklwd xmm0, xmm0 - punpcklwd xmm2, xmm2 - - UNPACK_RIGHTSHIFT xmm1, 16 - UNPACK_RIGHTSHIFT xmm7, 16 - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 32 - endm - -UNPACK_V4_16SSE_3A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - punpckhwd xmm1, [rdx] - punpcklwd xmm2, [rdx+16] - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm1, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 24 - endm - -UNPACK_V4_16SSE_3 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - movq xmm2, QWORD PTR [rdx+16] - - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - punpcklwd xmm2, xmm2 - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm1, 16 - UNPACK_RIGHTSHIFT xmm2, 16 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 24 - endm - -UNPACK_V4_16SSE_2A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - punpckhwd xmm1, [rdx] - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm1, 16 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V4_16SSE_2 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movq xmm1, QWORD PTR [rdx+8] - - punpcklwd xmm0, xmm0 - punpcklwd xmm1, xmm1 - - UNPACK_RIGHTSHIFT xmm0, 16 - UNPACK_RIGHTSHIFT xmm1, 16 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V4_16SSE_1A macro CL, TOTALCL, MaskType, ModeType - punpcklwd xmm0, [rdx] - UNPACK_RIGHTSHIFT xmm0, 16 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V4_16SSE_1 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 16 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - - -UNPACK_V4_8SSE_4A macro CL, TOTALCL, MaskType, ModeType - punpcklbw xmm0, [rdx] - punpckhbw xmm2, [rdx] - - punpckhwd xmm1, xmm0 - punpckhwd xmm7, xmm2 - punpcklwd xmm0, xmm0 - punpcklwd xmm2, xmm2 - - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm7, 24 - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V4_8SSE_4 macro CL, TOTALCL, MaskType, ModeType - movdqu xmm0, [rdx] - - punpckhbw xmm2, xmm0 - punpcklbw xmm0, xmm0 - - punpckhwd xmm7, xmm2 - punpckhwd xmm1, xmm0 - punpcklwd xmm2, xmm2 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm7, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm1, 24 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 16 - endm - -UNPACK_V4_8SSE_3A macro CL, TOTALCL, MaskType, ModeType - punpcklbw xmm0, [rdx] - punpckhbw xmm2, [rdx] - - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - punpcklwd xmm2, xmm2 - - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V4_8SSE_3 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - movd xmm2, dword ptr [rdx+8] - - punpcklbw xmm0, xmm0 - punpcklbw xmm2, xmm2 - - punpckhwd xmm1, xmm0 - punpcklwd xmm2, xmm2 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm0, 24 - UNPACK_RIGHTSHIFT xmm2, 24 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 12 - endm - -UNPACK_V4_8SSE_2A macro CL, TOTALCL, MaskType, ModeType - punpcklbw xmm0, [rdx] - - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm0, 24 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V4_8SSE_2 macro CL, TOTALCL, MaskType, ModeType - movq xmm0, QWORD PTR [rdx] - - punpcklbw xmm0, xmm0 - - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - - UNPACK_RIGHTSHIFT xmm1, 24 - UNPACK_RIGHTSHIFT xmm0, 24 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V4_8SSE_1A macro CL, TOTALCL, MaskType, ModeType - punpcklbw xmm0, [rdx] - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 24 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_V4_8SSE_1 macro CL, TOTALCL, MaskType, ModeType - movd xmm0, dword ptr [rdx] - punpcklbw xmm0, xmm0 - punpcklwd xmm0, xmm0 - UNPACK_RIGHTSHIFT xmm0, 24 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - - -DECOMPRESS_RGBA macro OFFSET - mov bl, al - shl bl, 3 - mov byte ptr [s_TempDecompress+OFFSET], bl - - mov bx, ax - shr bx, 2 - and bx, 0f8h - mov byte ptr [s_TempDecompress+OFFSET+1], bl - - mov bx, ax - shr bx, 7 - and bx, 0f8h - mov byte ptr [s_TempDecompress+OFFSET+2], bl - mov bx, ax - shr bx, 8 - and bx, 080h - mov byte ptr [s_TempDecompress+OFFSET+3], bl - endm - -UNPACK_V4_5SSE_4 macro CL, TOTALCL, MaskType, ModeType - mov eax, dword ptr [rdx] - DECOMPRESS_RGBA 0 - - shr eax, 16 - DECOMPRESS_RGBA 4 - - mov eax, dword ptr [rdx+4] - DECOMPRESS_RGBA 8 - - shr eax, 16 - DECOMPRESS_RGBA 12 - - - movdqa xmm0, XMMWORD PTR [s_TempDecompress] - - punpckhbw xmm2, xmm0 - punpcklbw xmm0, xmm0 - - punpckhwd xmm7, xmm2 - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - punpcklwd xmm2, xmm2 - - psrld xmm0, 24 - psrld xmm1, 24 - psrld xmm2, 24 - psrld xmm7, 24 - - UNPACK4_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 8 - endm - -UNPACK_V4_5SSE_4A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V4_5SSE_4 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V4_5SSE_3 macro CL, TOTALCL, MaskType, ModeType - mov eax, dword ptr [rdx] - DECOMPRESS_RGBA 0 - - shr eax, 16 - DECOMPRESS_RGBA 4 - - mov eax, dword ptr [rdx] - DECOMPRESS_RGBA 8 - - - movdqa xmm0, XMMWORD PTR [s_TempDecompress] - - punpckhbw xmm2, xmm0 - punpcklbw xmm0, xmm0 - - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - punpcklwd xmm2, xmm2 - - psrld xmm0, 24 - psrld xmm1, 24 - psrld xmm2, 24 - - UNPACK3_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 6 - endm - -UNPACK_V4_5SSE_3A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V4_5SSE_3 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V4_5SSE_2 macro CL, TOTALCL, MaskType, ModeType - mov eax, dword ptr [rdx] - DECOMPRESS_RGBA 0 - - shr eax, 16 - DECOMPRESS_RGBA 4 - - movq xmm0, QWORD PTR [s_TempDecompress] - - punpcklbw xmm0, xmm0 - - punpckhwd xmm1, xmm0 - punpcklwd xmm0, xmm0 - - psrld xmm0, 24 - psrld xmm1, 24 - - UNPACK2_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 4 - endm - -UNPACK_V4_5SSE_2A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V4_5SSE_2 CL, TOTALCL, MaskType, ModeType - endm - -UNPACK_V4_5SSE_1 macro CL, TOTALCL, MaskType, ModeType - mov ax, word ptr [rdx] - DECOMPRESS_RGBA 0 - - movd xmm0, DWORD PTR [s_TempDecompress] - punpcklbw xmm0, xmm0 - punpcklwd xmm0, xmm0 - - psrld xmm0, 24 - - UNPACK1_SSE CL, TOTALCL, MaskType, ModeType - - add rdx, 2 - endm - -UNPACK_V4_5SSE_1A macro CL, TOTALCL, MaskType, ModeType - UNPACK_V4_5SSE_1 CL, TOTALCL, MaskType, ModeType - endm - - -SAVE_ROW_REG_BASE macro - mov rax, [_vifRow] - movdqa [rax], xmm6 - mov rax, [_vifRegs] - movss dword ptr [rax+0100h], xmm6 - psrldq xmm6, 4 - movss dword ptr [rax+0110h], xmm6 - psrldq xmm6, 4 - movss dword ptr [rax+0120h], xmm6 - psrldq xmm6, 4 - movss dword ptr [rax+0130h], xmm6 - endm - -SAVE_NO_REG macro - endm - - - -INIT_ARGS macro - mov rax, qword ptr [_vifRow] - mov r9, qword ptr [_vifCol] - movaps xmm6, XMMWORD PTR [rax] - movaps xmm7, XMMWORD PTR [r9] - endm - -INC_STACK macro reg - add rsp, 8 - endm - - - -defUNPACK_SkippingWrite macro name, MaskType, ModeType, qsize, sign, SAVE_ROW_REG -@CatStr(UNPACK_SkippingWrite_, name, _, sign, _, MaskType, _, ModeType) proc public - - push rdi - INIT_ARGS - mov rax, [_vifRegs] - movzx rdi, byte ptr [rax + 040h] - movzx r9, byte ptr [rax + 041h] - sub rdi, r9 - shl rdi, 4 - - cmp r9d, 1 - je @CatStr(name, _, sign, _, MaskType, _, ModeType, _WL1) - cmp r9d, 2 - je @CatStr(name, _, sign, _, MaskType, _, ModeType, _WL2) - cmp r9d, 3 - je @CatStr(name, _, sign, _, MaskType, _, ModeType, _WL3) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _WL4) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _WL1): - @CatStr(UNPACK_Start_Setup_, MaskType, _SSE_, ModeType) 0 - - cmp r8d, qsize - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Done3) - - add rdi, 16 - - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Align16): - - test rdx, 15 - jz @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_UnpackAligned) - - @CatStr(UNPACK_, name, SSE_1) 0, 1, MaskType, ModeType - - cmp r8d, (2*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_DoneWithDec) - sub r8d, qsize - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Align16) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_UnpackAligned): - - cmp r8d, (2*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack1) - cmp r8d, (3*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack2) - cmp r8d, (4*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack3) - prefetchnta [rdx + 64] - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack4): - @CatStr(UNPACK_, name, SSE_4A) 0, 1, MaskType, ModeType - - cmp r8d, (8*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_DoneUnpack4) - sub r8d, (4*qsize) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack4) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_DoneUnpack4): - - sub r8d, (4*qsize) - cmp r8d, qsize - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Done3) - cmp r8d, (2*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack1) - cmp r8d, (3*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack2) - - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack3): - @CatStr(UNPACK_, name, SSE_3A) 0, 1, MaskType, ModeType - - sub r8d, (3*qsize) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Done3) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack2): - @CatStr(UNPACK_, name, SSE_2A) 0, 1, MaskType, ModeType - - sub r8d, (2*qsize) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Done3) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Unpack1): - @CatStr(UNPACK_, name, SSE_1A) 0, 1, MaskType, ModeType -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_DoneWithDec): - sub r8d, qsize -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C1_Done3): - SAVE_ROW_REG - mov eax, r8d - - pop rdi - ret - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _WL2): - cmp r8d, (2*qsize) - - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Done3) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Unpack): - @CatStr(UNPACK_, name, SSE_2) 0, 0, MaskType, ModeType - - - add rcx, rdi - cmp r8d, (4*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Done2) - sub r8d, (2*qsize) - - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Unpack) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Done2): - sub r8d, (2*qsize) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Done3): - cmp r8d, qsize - - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Done4) - - - @CatStr(UNPACK_, name, SSE_1) 0, 0, MaskType, ModeType - - sub r8d, qsize -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C2_Done4): - - SAVE_ROW_REG - mov eax, r8d - - pop rdi - ret - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _WL3): - cmp r8d, (3*qsize) - - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done5) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Unpack): - @CatStr(UNPACK_, name, SSE_3) 0, 0, MaskType, ModeType - - add rcx, rdi - cmp r8d, (6*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done2) - sub r8d, (3*qsize) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Unpack) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done2): - sub r8d, (3*qsize) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done5): - cmp r8d, qsize - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done4) - - cmp r8d, (2*qsize) - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done3) - - @CatStr(UNPACK_, name, SSE_2) 0, 0, MaskType, ModeType - - sub r8d, (2*qsize) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done4) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done3): - sub r8d, qsize - @CatStr(UNPACK_, name, SSE_1) 0, 0, MaskType, ModeType -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C3_Done4): - SAVE_ROW_REG - mov eax, r8d - - pop rdi - - ret - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _WL4): - sub r9, 3 - push rdi - cmp r8d, qsize - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Done) - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Unpack): - cmp r8d, (3*qsize) - jge @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Unpack3) - cmp r8d, (2*qsize) - jge @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Unpack2) - - @CatStr(UNPACK_, name, SSE_1) 0, 0, MaskType, ModeType - - - sub r8d, qsize - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Done) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Unpack2): - @CatStr(UNPACK_, name, SSE_2) 0, 0, MaskType, ModeType - - - sub r8d, (2*qsize) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Done) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Unpack3): - @CatStr(UNPACK_, name, SSE_3) 0, 0, MaskType, ModeType - - - sub r8d, (3*qsize) - mov rdi, r9 - -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_UnpackX): - - - cmp r8d, qsize - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Done) - - @CatStr(UNPACK_, name, SSE_1) 3, 0, MaskType, ModeType - - sub r8d, qsize - cmp rdi, 1 - je @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_DoneLoop) - sub rdi, 1 - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_UnpackX) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_DoneLoop): - add rcx, [rsp] - cmp r8d, qsize - jl @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Done) - jmp @CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Unpack) -@CatStr(name, _, sign, _, MaskType, _, ModeType, _C4_Done): - - SAVE_ROW_REG - INC_STACK() - mov eax, r8d - - - pop rdi - ret -@CatStr(UNPACK_SkippingWrite_, name, _, sign, _, MaskType, _, ModeType endp) -endm - -UNPACK_RIGHTSHIFT macro reg, shift - psrld reg, shift - endm - -defUNPACK_SkippingWrite2 macro name, qsize - defUNPACK_SkippingWrite name, Regular, 0, qsize, u, SAVE_NO_REG - defUNPACK_SkippingWrite name, Regular, 1, qsize, u, SAVE_NO_REG - defUNPACK_SkippingWrite name, Regular, 2, qsize, u, SAVE_ROW_REG_BASE - defUNPACK_SkippingWrite name, Mask, 0, qsize, u, SAVE_NO_REG - defUNPACK_SkippingWrite name, Mask, 1, qsize, u, SAVE_NO_REG - defUNPACK_SkippingWrite name, Mask, 2, qsize, u, SAVE_ROW_REG_BASE - defUNPACK_SkippingWrite name, WriteMask, 0, qsize, u, SAVE_NO_REG - defUNPACK_SkippingWrite name, WriteMask, 1, qsize, u, SAVE_NO_REG - defUNPACK_SkippingWrite name, WriteMask, 2, qsize, u, SAVE_ROW_REG_BASE - endm - -defUNPACK_SkippingWrite2 S_32, 4 -defUNPACK_SkippingWrite2 S_16, 2 -defUNPACK_SkippingWrite2 S_8, 1 -defUNPACK_SkippingWrite2 V2_32, 8 -defUNPACK_SkippingWrite2 V2_16, 4 -defUNPACK_SkippingWrite2 V2_8, 2 -defUNPACK_SkippingWrite2 V3_32, 12 -defUNPACK_SkippingWrite2 V3_16, 6 -defUNPACK_SkippingWrite2 V3_8, 3 -defUNPACK_SkippingWrite2 V4_32, 16 -defUNPACK_SkippingWrite2 V4_16, 8 -defUNPACK_SkippingWrite2 V4_8, 4 -defUNPACK_SkippingWrite2 V4_5, 2 - -UNPACK_RIGHTSHIFT macro reg, shift - psrad reg, shift - endm - - -defUNPACK_SkippingWrite2a macro name, qsize - defUNPACK_SkippingWrite name, Mask, 0, qsize, s, SAVE_NO_REG - defUNPACK_SkippingWrite name, Regular, 0, qsize, s, SAVE_NO_REG - defUNPACK_SkippingWrite name, Regular, 1, qsize, s, SAVE_NO_REG - defUNPACK_SkippingWrite name, Regular, 2, qsize, s, SAVE_ROW_REG_BASE - defUNPACK_SkippingWrite name, Mask, 1, qsize, s, SAVE_NO_REG - defUNPACK_SkippingWrite name, Mask, 2, qsize, s, SAVE_ROW_REG_BASE - defUNPACK_SkippingWrite name, WriteMask, 0, qsize, s, SAVE_NO_REG - defUNPACK_SkippingWrite name, WriteMask, 1, qsize, s, SAVE_NO_REG - defUNPACK_SkippingWrite name, WriteMask, 2, qsize, s, SAVE_ROW_REG_BASE - endm - -defUNPACK_SkippingWrite2a S_16, 2 -defUNPACK_SkippingWrite2a S_8, 1 -defUNPACK_SkippingWrite2a V2_16, 4 -defUNPACK_SkippingWrite2a V2_8, 2 -defUNPACK_SkippingWrite2a V3_16, 6 -defUNPACK_SkippingWrite2a V3_8, 3 -defUNPACK_SkippingWrite2a V4_16, 8 -defUNPACK_SkippingWrite2a V4_8, 4 - -end diff --git a/pcsx2/x86/ix86-64/fast_routines-64.asm b/pcsx2/x86/ix86-64/fast_routines-64.asm deleted file mode 100644 index 77e2744ff5..0000000000 --- a/pcsx2/x86/ix86-64/fast_routines-64.asm +++ /dev/null @@ -1,294 +0,0 @@ -; Pcsx2 - Pc Ps2 Emulator -; Copyright (C) 2002-2008 Pcsx2 Team -; -; This program is free software; you can redistribute it and/or modify -; it under the terms of the GNU General Public License as published by -; the Free Software Foundation; either version 2 of the License, or -; (at your option) any later version. - -; This program is distributed in the hope that it will be useful, -; but WITHOUT ANY WARRANTY; without even the implied warranty of -; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -; GNU General Public License for more details. -; -; You should have received a copy of the GNU General Public License -; along with this program; if not, write to the Free Software -; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - -;; Fast assembly routines for x86-64 masm compiler -;; zerofrog(@gmail.com) -.code - -;; mmx memcmp implementation, size has to be a multiple of 8 -;; returns 0 is equal, nonzero value if not equal -;; ~10 times faster than standard memcmp -;; (zerofrog) -;; u8 memcmp_mmx(const void* src1, const void* src2, int cmpsize) -memcmp_mmx proc public - - cmp r8d, 32 - jl memcmp_Done4 - - ;; custom test first 8 to make sure things are ok - movq mm0, [rdx] - movq mm1, [rdx+8] - pcmpeqd mm0, [rcx] - pcmpeqd mm1, [rcx+8] - pand mm0, mm1 - movq mm2, [rdx+16] - pmovmskb eax, mm0 - movq mm3, [rdx+24] - - ;; check if eq - cmp eax, 0ffh - je memcmp_NextComp - mov eax, 1 - jmp memcmp_End - -memcmp_NextComp: - pcmpeqd mm2, [rcx+16] - pcmpeqd mm3, [rcx+24] - pand mm2, mm3 - pmovmskb eax, mm2 - - sub r8d, 32 - add rdx, 32 - add rcx, 32 - - ;; check if eq - cmp eax, 0ffh - je memcmp_ContinueTest - mov eax, 1 - jmp memcmp_End - - cmp r8d, 64 - jl memcmp_Done8 - -memcmp_Cmp8: - movq mm0, [rdx] - movq mm1, [rdx+8] - movq mm2, [rdx+16] - movq mm3, [rdx+24] - movq mm4, [rdx+32] - movq mm5, [rdx+40] - movq mm6, [rdx+48] - movq mm7, [rdx+56] - pcmpeqd mm0, [rcx] - pcmpeqd mm1, [rcx+8] - pcmpeqd mm2, [rcx+16] - pcmpeqd mm3, [rcx+24] - pand mm0, mm1 - pcmpeqd mm4, [rcx+32] - pand mm0, mm2 - pcmpeqd mm5, [rcx+40] - pand mm0, mm3 - pcmpeqd mm6, [rcx+48] - pand mm0, mm4 - pcmpeqd mm7, [rcx+56] - pand mm0, mm5 - pand mm0, mm6 - pand mm0, mm7 - pmovmskb eax, mm0 - - ;; check if eq - cmp eax, 0ffh - je memcmp_Continue - mov eax, 1 - jmp memcmp_End - -memcmp_Continue: - sub r8d, 64 - add rdx, 64 - add rcx, 64 -memcmp_ContinueTest: - cmp r8d, 64 - jge memcmp_Cmp8 - -memcmp_Done8: - test r8d, 020h - jz memcmp_Done4 - movq mm0, [rdx] - movq mm1, [rdx+8] - movq mm2, [rdx+16] - movq mm3, [rdx+24] - pcmpeqd mm0, [rcx] - pcmpeqd mm1, [rcx+8] - pcmpeqd mm2, [rcx+16] - pcmpeqd mm3, [rcx+24] - pand mm0, mm1 - pand mm0, mm2 - pand mm0, mm3 - pmovmskb eax, mm0 - sub r8d, 32 - add rdx, 32 - add rcx, 32 - - ;; check if eq - cmp eax, 0ffh - je memcmp_Done4 - mov eax, 1 - jmp memcmp_End - -memcmp_Done4: - cmp r8d, 24 - jne memcmp_Done2 - movq mm0, [rdx] - movq mm1, [rdx+8] - movq mm2, [rdx+16] - pcmpeqd mm0, [rcx] - pcmpeqd mm1, [rcx+8] - pcmpeqd mm2, [rcx+16] - pand mm0, mm1 - pand mm0, mm2 - pmovmskb eax, mm0 - - ;; check if eq - cmp eax, 0ffh - je memcmp_Done - mov eax, 1 - jmp memcmp_End - -memcmp_Done2: - cmp r8d, 16 - jne memcmp_Done1 - - movq mm0, [rdx] - movq mm1, [rdx+8] - pcmpeqd mm0, [rcx] - pcmpeqd mm1, [rcx+8] - pand mm0, mm1 - pmovmskb eax, mm0 - - ;; check if eq - cmp eax, 0ffh - je memcmp_Done - mov eax, 1 - jmp memcmp_End - -memcmp_Done1: - cmp r8d, 8 - jne memcmp_Done - - mov eax, [rdx] - mov rdx, [rdx+4] - cmp eax, [rcx] - je memcmp_Next - mov eax, 1 - jmp memcmp_End - -memcmp_Next: - cmp rdx, [rcx+4] - je memcmp_Done - mov eax, 1 - jmp memcmp_End - -memcmp_Done: - xor eax, eax - -memcmp_End: - emms - ret -memcmp_mmx endp - -;; memxor_mmx -memxor_mmx proc public - - cmp r8d, 64 - jl memxor_Setup4 - - movq mm0, [rdx] - movq mm1, [rdx+8] - movq mm2, [rdx+16] - movq mm3, [rdx+24] - movq mm4, [rdx+32] - movq mm5, [rdx+40] - movq mm6, [rdx+48] - movq mm7, [rdx+56] - sub r8d, 64 - add rdx, 64 - cmp r8d, 64 - jl memxor_End8 - -memxor_Cmp8: - pxor mm0, [rdx] - pxor mm1, [rdx+8] - pxor mm2, [rdx+16] - pxor mm3, [rdx+24] - pxor mm4, [rdx+32] - pxor mm5, [rdx+40] - pxor mm6, [rdx+48] - pxor mm7, [rdx+56] - - sub r8d, 64 - add rdx, 64 - cmp r8d, 64 - jge memxor_Cmp8 - -memxor_End8: - pxor mm0, mm4 - pxor mm1, mm5 - pxor mm2, mm6 - pxor mm3, mm7 - - cmp r8d, 32 - jl memxor_End4 - pxor mm0, [rdx] - pxor mm1, [rdx+8] - pxor mm2, [rdx+16] - pxor mm3, [rdx+24] - sub r8d, 32 - add rdx, 32 - jmp memxor_End4 - -memxor_Setup4: - cmp r8d, 32 - jl memxor_Setup2 - - movq mm0, [rdx] - movq mm1, [rdx+8] - movq mm2, [rdx+16] - movq mm3, [rdx+24] - sub r8d, 32 - add rdx, 32 - -memxor_End4: - pxor mm0, mm2 - pxor mm1, mm3 - - cmp r8d, 16 - jl memxor_End2 - pxor mm0, [rdx] - pxor mm1, [rdx+8] - sub r8d, 16 - add rdx, 16 - jmp memxor_End2 - -memxor_Setup2: - cmp r8d, 16 - jl memxor_Setup1 - - movq mm0, [rdx] - movq mm1, [rdx+8] - sub r8d, 16 - add rdx, 16 - -memxor_End2: - pxor mm0, mm1 - - cmp r8d, 8 - jl memxor_End1 - pxor mm0, [rdx] -memxor_End1: - movq [rcx], mm0 - jmp memxor_End - -memxor_Setup1: - movq mm0, [rdx] - movq [rcx], mm0 -memxor_End: - emms - ret - -memxor_mmx endp - -end \ No newline at end of file diff --git a/pcsx2/x86/ix86-64/iCore-64.cpp b/pcsx2/x86/ix86-64/iCore-64.cpp deleted file mode 100644 index c136e5346f..0000000000 --- a/pcsx2/x86/ix86-64/iCore-64.cpp +++ /dev/null @@ -1,720 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include -#include - -extern "C" { - -#if defined(_WIN32) -#include -#endif - -#include "PS2Etypes.h" -#include "System.h" -#include "R5900.h" -#include "Vif.h" -#include "VU.h" -#include "ix86/ix86.h" -#include "iCore.h" -#include "R3000A.h" - -u16 x86FpuState, iCWstate; -u16 g_mmxAllocCounter = 0; - -// X86 caching -extern _x86regs x86regs[X86REGS]; -extern u16 g_x86AllocCounter; - -} // end extern "C" - -u32 g_recFnArgs[4]; - -#include -using namespace std; - -// use special x86 register allocation for ia32 -void _initX86regs() { - memset(x86regs, 0, sizeof(x86regs)); - g_x86AllocCounter = 0; -} - -uptr _x86GetAddr(int type, int reg) -{ - switch(type&~X86TYPE_VU1) { - case X86TYPE_GPR: return (uptr)&cpuRegs.GPR.r[reg]; - case X86TYPE_VI: { - //assert( reg < 16 || reg == REG_R ); - return (type&X86TYPE_VU1)?(uptr)&VU1.VI[reg]:(uptr)&VU0.VI[reg]; - } - case X86TYPE_MEMOFFSET: return 0; - case X86TYPE_VIMEMOFFSET: return 0; - case X86TYPE_VUQREAD: return (type&X86TYPE_VU1)?(uptr)&VU1.VI[REG_Q]:(uptr)&VU0.VI[REG_Q]; - case X86TYPE_VUPREAD: return (type&X86TYPE_VU1)?(uptr)&VU1.VI[REG_P]:(uptr)&VU0.VI[REG_P]; - case X86TYPE_VUQWRITE: return (type&X86TYPE_VU1)?(uptr)&VU1.q:(uptr)&VU0.q; - case X86TYPE_VUPWRITE: return (type&X86TYPE_VU1)?(uptr)&VU1.p:(uptr)&VU0.p; - case X86TYPE_PSX: return (uptr)&psxRegs.GPR.r[reg]; - case X86TYPE_PCWRITEBACK: - return (uptr)&g_recWriteback; - case X86TYPE_VUJUMP: - return (uptr)&g_recWriteback; - case X86TYPE_FNARG: - return (uptr)&g_recFnArgs[reg]; - default: assert(0); - } - - return 0; -} - -int _getFreeX86reg(int mode) -{ - int i, tempi; - u32 bestcount = 0x10000; - x86IntRegType* pregs = (mode&MODE_8BITREG)?g_x868bitregs:g_x86allregs; - int maxreg = (mode&MODE_8BITREG)?ARRAYSIZE(g_x868bitregs):ARRAYSIZE(g_x86allregs); - - if( !(mode&MODE_8BITREG) && (mode&0x80000000) ) { - // prioritize the temp registers - for (i=0; i= 0 && reg < 32 ); - -// if( X86_ISVI(type) ) -// assert( reg < 16 || reg == REG_R ); - - // don't alloc EAX and ESP,EBP if MODE_NOFRAME - int oldmode = mode; - int noframe = mode&MODE_NOFRAME; - int mode8bit = mode&MODE_8BITREG; - x86IntRegType* pregs = (mode&MODE_8BITREG)?g_x868bitregs:g_x86allregs; - int maxreg = (mode&MODE_8BITREG)?ARRAYSIZE(g_x868bitregs):ARRAYSIZE(g_x86allregs); - mode &= ~(MODE_NOFRAME|MODE_8BITREG); - int readfromreg = -1; - - - if( type != X86TYPE_TEMP ) { - - if( mode8bit ) { - // make sure reg isn't in the non8bit regs - - for(j = 0; j < ARRAYSIZE(g_x86non8bitregs); ++j) { - int i = g_x86non8bitregs[j]; - if (!x86regs[i].inuse || x86regs[i].type != type || x86regs[i].reg != reg) - continue; - - if( mode & MODE_READ ) { - readfromreg = i; - x86regs[i].inuse = 0; - break; - } - else if( mode & MODE_WRITE ) { - x86regs[i].inuse = 0; - break; - } - } - } - - for (j=0; j= 0 ) { - // requested specific reg, so return that instead - if( i != x86reg ) { - if( x86regs[i].mode & MODE_READ ) readfromreg = i; - //if( x86regs[i].mode & MODE_WRITE ) mode |= MODE_WRITE; - mode |= x86regs[i].mode&MODE_WRITE; - x86regs[i].inuse = 0; - break; - } - } - - if( type != X86TYPE_TEMP && !(x86regs[i].mode & MODE_READ) && (mode&MODE_READ)) { - - if( type == X86TYPE_GPR ) { - - if( reg == 0 ) XOR64RtoR(i, i); - else { - if( GPR_IS_CONST1(reg) ) - MOV64ItoR(i, g_cpuConstRegs[reg].UD[0]); - else - MOV64MtoR(i, _x86GetAddr(type, reg)); - } - } - else if( X86_ISVI(type) && reg < 16 ) MOVZX32M16toR(i, _x86GetAddr(type, reg)); - else // the rest are 32 bit - MOV32MtoR(i, _x86GetAddr(type, reg)); - - x86regs[i].mode |= MODE_READ; - } - - x86regs[i].needed = 1; - x86regs[i].mode|= mode; - return i; - } - } - - // currently only gpr regs are const - if( type == X86TYPE_GPR && (mode & MODE_WRITE) && reg < 32 ) { - //assert( !(g_cpuHasConstReg & (1<= 0 ) MOV64RtoR(x86reg, readfromreg); - else { - if( type == X86TYPE_GPR ) { - - if( reg == 0 ) { - if( mode & MODE_READ ) - XOR64RtoR(x86reg, x86reg); - return x86reg; - } - - int xmmreg; - if( (xmmreg = _checkXMMreg(XMMTYPE_GPRREG, reg, 0)) >= 0 ) { - // destroy the xmm reg, but don't flush - SSE_MOVHPS_XMM_to_M64(_x86GetAddr(type, reg)+8, xmmreg); - - if( mode & MODE_READ ) - SSE2_MOVQ_XMM_to_R(x86reg, xmmreg); - - if( xmmregs[xmmreg].mode & MODE_WRITE ) - x86regs[x86reg].mode |= MODE_WRITE; - - // don't flush - xmmregs[xmmreg].inuse = 0; - } - else { - if( mode & MODE_READ ) { - if( GPR_IS_CONST1(reg) ) - MOV64ItoR(x86reg, g_cpuConstRegs[reg].UD[0]); - else - MOV64MtoR(x86reg, _x86GetAddr(type, reg)); - } - } - } - else if( mode & MODE_READ ) { - if( X86_ISVI(type) && reg < 16 ) { - if( reg == 0 ) XOR32RtoR(x86reg, x86reg); - else MOVZX32M16toR(x86reg, _x86GetAddr(type, reg)); - } - else MOV32MtoR(x86reg, _x86GetAddr(type, reg)); - } - } - - return x86reg; -} - -int _checkX86reg(int type, int reg, int mode) -{ - int i; - - for (i=0; i= 0 && x86reg < X86REGS ); - - if( x86regs[x86reg].inuse && (x86regs[x86reg].mode&MODE_WRITE) ) { - - if( x86regs[x86reg].type == X86TYPE_GPR ) - MOV64RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg); - if( X86_ISVI(x86regs[x86reg].type) && x86regs[x86reg].reg < 16 ) - MOV16RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg); - else - MOV32RtoM(_x86GetAddr(x86regs[x86reg].type, x86regs[x86reg].reg), x86reg); - } - - x86regs[x86reg].mode &= ~MODE_WRITE; - x86regs[x86reg].inuse = 0; -} - -void _flushX86regs() -{ - int i; - - for (i=0; iregs[x86regs[i].reg]&EEINST_USED) ) { - return 1; - } - } - } - return 0; -} - -// EE -void _eeMoveGPRtoR(x86IntRegType to, int fromgpr) -{ - if( GPR_IS_CONST1(fromgpr) ) - MOV64ItoR( to, g_cpuConstRegs[fromgpr].UD[0] ); - else { - int mmreg; - - if( (mmreg = _checkX86reg(X86TYPE_GPR, fromgpr, MODE_READ)) >= 0) { - MOV64RtoR(to, mmreg); - } - if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 && (xmmregs[mmreg].mode&MODE_WRITE)) { - SSE2_MOVQ_XMM_to_R(to, mmreg); - } - else { - MOV64MtoR(to, (uptr)&cpuRegs.GPR.r[ fromgpr ].UD[ 0 ] ); - } - } -} - -// 32 bit move -void _eeMoveGPRtoM(u32 to, int fromgpr) -{ - if( GPR_IS_CONST1(fromgpr) ) - MOV32ItoM( to, g_cpuConstRegs[fromgpr].UL[0] ); - else { - int mmreg; - - if( (mmreg = _checkX86reg(X86TYPE_GPR, fromgpr, MODE_READ)) >= 0 ) { - MOV32RtoM(to, mmreg); - } - if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) { - SSEX_MOVD_XMM_to_M32(to, mmreg); - } - else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ fromgpr ].UD[ 0 ] ); - MOV32RtoM(to, EAX ); - } - } -} - -void _eeMoveGPRtoRm(x86IntRegType to, int fromgpr) -{ - if( GPR_IS_CONST1(fromgpr) ) - MOV64ItoRmOffset( to, g_cpuConstRegs[fromgpr].UD[0], 0 ); - else { - int mmreg; - - if( (mmreg = _checkX86reg(X86TYPE_GPR, fromgpr, MODE_READ)) >= 0 ) { - MOV64RtoRmOffset(to, mmreg, 0); - } - if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, fromgpr, MODE_READ)) >= 0 ) { - SSEX_MOVD_XMM_to_Rm(to, mmreg); - } - else { - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[ fromgpr ].UD[ 0 ] ); - MOV64RtoRmOffset(to, RAX, 0 ); - } - } -} - -void _callPushArg(u32 arg, uptr argmem, x86IntRegType X86ARG) -{ - if( IS_X86REG(arg) ) { - if( (arg&0xff) != X86ARG ) { - _freeX86reg(X86ARG); - MOV64RtoR(X86ARG, (arg&0xf)); - } - } - else if( IS_GPRREG(arg) ) { - _allocX86reg(X86ARG, X86TYPE_GPR, arg&0xff, MODE_READ); - } - else if( IS_CONSTREG(arg) ) { - _freeX86reg(X86ARG); - MOV32ItoR(X86ARG, argmem); - } - else if( IS_EECONSTREG(arg) ) { - _freeX86reg(X86ARG); - MOV32ItoR(X86ARG, g_cpuConstRegs[(arg>>16)&0x1f].UD[0]); - } - else if( IS_PSXCONSTREG(arg) ) { - _freeX86reg(X86ARG); - MOV32ItoR(X86ARG, g_psxConstRegs[(arg>>16)&0x1f]); - } - else if( IS_MEMORYREG(arg) ) { - _freeX86reg(X86ARG); - MOV64MtoR(X86ARG, argmem); - } - else if( IS_XMMREG(arg) ) { - _freeX86reg(X86ARG); - SSEX_MOVD_XMM_to_Rm(X86ARG, arg&0xf); - } - else { - assert((arg&0xfff0)==0); - _freeX86reg(X86ARG); - MOV64RtoR(X86ARG, (arg&0xf)); - } -} - -void _callFunctionArg1(uptr fn, u32 arg1, uptr arg1mem) -{ - _callPushArg(arg1, arg1mem, X86ARG1); - CALLFunc((uptr)fn); -} - -void _callFunctionArg2(uptr fn, u32 arg1, u32 arg2, uptr arg1mem, uptr arg2mem) -{ - _callPushArg(arg1, arg1mem, X86ARG1); - _callPushArg(arg2, arg2mem, X86ARG2); - CALLFunc((uptr)fn); -} - -void _callFunctionArg3(uptr fn, u32 arg1, u32 arg2, u32 arg3, uptr arg1mem, uptr arg2mem, uptr arg3mem) -{ - _callPushArg(arg1, arg1mem, X86ARG1); - _callPushArg(arg2, arg2mem, X86ARG2); - _callPushArg(arg3, arg3mem, X86ARG3); - CALLFunc((uptr)fn); -} - -void _recPushReg(int mmreg) -{ - assert(0); -} - -void _signExtendSFtoM(u32 mem) -{ - assert(0); -} - -void _recMove128MtoM(u32 to, u32 from) -{ - MOV64MtoR(RAX, from); - MOV64RtoM(to, RAX); - MOV64MtoR(RAX, from+8); - MOV64RtoM(to+8, RAX); -} - -void _recMove128RmOffsettoM(u32 to, u32 offset) -{ - MOV64RmOffsettoR(RAX, RCX, offset); - MOV64RtoM(to, RAX); - MOV64RmOffsettoR(RAX, RCX, offset+8); - MOV64RtoM(to+8, RAX); -} - -void _recMove128MtoRmOffset(u32 offset, u32 from) -{ - MOV64MtoR(RAX, from); - MOV64RtoRmOffset(RCX, RAX, offset); - MOV64MtoR(RAX, from+8); - MOV64RtoRmOffset(RCX, RAX, offset+8); -} - -// 32 bit -void LogicalOp32RtoM(uptr to, x86IntRegType from, int op) -{ - switch(op) { - case 0: AND32RtoM(to, from); break; - case 1: OR32RtoM(to, from); break; - case 2: XOR32RtoM(to, from); break; - case 3: OR32RtoM(to, from); break; - } -} - -void LogicalOp32MtoR(x86IntRegType to, uptr from, int op) -{ - switch(op) { - case 0: AND32MtoR(to, from); break; - case 1: OR32MtoR(to, from); break; - case 2: XOR32MtoR(to, from); break; - case 3: OR32MtoR(to, from); break; - } -} - -void LogicalOp32ItoR(x86IntRegType to, u32 from, int op) -{ - switch(op) { - case 0: AND32ItoR(to, from); break; - case 1: OR32ItoR(to, from); break; - case 2: XOR32ItoR(to, from); break; - case 3: OR32ItoR(to, from); break; - } -} - -void LogicalOp32ItoM(uptr to, u32 from, int op) -{ - switch(op) { - case 0: AND32ItoM(to, from); break; - case 1: OR32ItoM(to, from); break; - case 2: XOR32ItoM(to, from); break; - case 3: OR32ItoM(to, from); break; - } -} - -// 64 bit -void LogicalOp64RtoR(x86IntRegType to, x86IntRegType from, int op) -{ - switch(op) { - case 0: AND64RtoR(to, from); break; - case 1: OR64RtoR(to, from); break; - case 2: XOR64RtoR(to, from); break; - case 3: OR64RtoR(to, from); break; - } -} - -void LogicalOp64RtoM(uptr to, x86IntRegType from, int op) -{ - switch(op) { - case 0: AND64RtoM(to, from); break; - case 1: OR64RtoM(to, from); break; - case 2: XOR64RtoM(to, from); break; - case 3: OR64RtoM(to, from); break; - } -} - -void LogicalOp64MtoR(x86IntRegType to, uptr from, int op) -{ - switch(op) { - case 0: AND64MtoR(to, from); break; - case 1: OR64MtoR(to, from); break; - case 2: XOR64MtoR(to, from); break; - case 3: OR64MtoR(to, from); break; - } -} - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900-64.c b/pcsx2/x86/ix86-64/iR5900-64.c deleted file mode 100644 index 61ce550be8..0000000000 --- a/pcsx2/x86/ix86-64/iR5900-64.c +++ /dev/null @@ -1,2730 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// 64 bit recompiler - difference between 32bit is that mmx is gone -// and x86 regs are now cached (also fancier block linking) (zerofrog) - -// liveness analysis/constant propagation Apr06 (zerofrog@gmail.com) -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include -#include -#include - -#include "Common.h" -#include "Memory.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" -#include "iR5900AritImm.h" -#include "iR5900Arit.h" -#include "iR5900MultDiv.h" -#include "iR5900Shift.h" -#include "iR5900Branch.h" -#include "iR5900Jump.h" -#include "iR5900LoadStore.h" -#include "iR5900Move.h" -#include "iMMI.h" -#include "iFPU.h" -#include "iCP0.h" -#include "iVUmicro.h" -#include "iVU0micro.h" -#include "iVU1micro.h" -#include "VU.h" -#include "VUmicro.h" - -#include "iVUzerorec.h" - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -u32 maxrecmem = 0; -uptr *recLUT=NULL; - -#define X86 -#define RECSTACK_SIZE 0x00010000 - -#define EE_NUMBLOCKS (1<<15) - -static char *recMem = NULL; // the recompiled blocks will be here -static char* recStack = NULL; // stack mem -static BASEBLOCK *recRAM = NULL; // and the ptr to the blocks here -static BASEBLOCK *recROM = NULL; // and here -static BASEBLOCK *recROM1 = NULL; // also here -static BASEBLOCKEX *recBlocks = NULL; -static char *recPtr = NULL, *recStackPtr = NULL; -static EEINST* s_pInstCache = NULL; -static u32 s_nInstCacheSize = 0; - -u32 g_EEFreezeRegs = 0; // if set, should freeze the regs - -static BASEBLOCK* s_pCurBlock = NULL; -static BASEBLOCKEX* s_pCurBlockEx = NULL; -//static BASEBLOCK* s_pDispatchBlock = NULL; -static u32 s_nEndBlock = 0; // what pc the current block ends -static u32 s_nHasDelay = 0; - -static u32 s_nNextBlock = 0; // next free block in recBlocks - -extern void (*recBSC[64])(); -extern void (*recBSC_co[64])(); -extern void rpropBSC(EEINST* prev, EEINST* pinst); - -// save states for branches -static u16 s_savex86FpuState, s_saveiCWstate; -static GPR_reg64 s_ConstGPRreg; -static u32 s_saveConstGPRreg = 0, s_saveHasConstReg = 0, s_saveFlushedConstReg = 0, s_saveRegHasLive1 = 0, s_saveRegHasSignExt = 0; -static EEINST* s_psaveInstInfo = NULL; - -u32 s_nBlockCycles = 0; // cycles of current block recompiling -static u32 s_savenBlockCycles = 0; - -void recCOP2RecompileInst(); -int recCOP2AnalyzeBlock(u32 startpc, u32 endpc); -void recCOP2EndBlock(void); - -#ifdef _DEBUG -u32 dumplog = 0; -#else -#define dumplog 0 -#endif - -u32 pc; // recompiler pc -int branch; // set for branch - -//#ifdef PCSX2_DEVBUILD -LARGE_INTEGER lbase = {0}, lfinal = {0}; -//static u32 s_startcount = 0; -//#endif - -void _cop2AnalyzeOp(EEINST* pinst, int dostalls); // reccop2.c -static void iBranchTest(u32 newpc, u32 cpuBranch); -void recRecompile( u32 startpc ); -void recCOP22( void ); - -BASEBLOCKEX* PC_GETBLOCKEX(BASEBLOCK* p) -{ -// BASEBLOCKEX* pex = *(BASEBLOCKEX**)(p+1); -// if( pex >= recBlocks && pex < recBlocks+EE_NUMBLOCKS ) -// return pex; - - // otherwise, use the sorted list - return GetBaseBlockEx(p->startpc, 0); -} - -//////////////////////////////////////////////////// -void iDumpBlock( int startpc, s8 * ptr ) -{ - FILE *f; - char filename[ 256 ]; - u32 i, j; - EEINST* pcur; - extern char *disRNameGPR[]; - u8 used[34]; - u8 fpuused[33]; - int numused, count, fpunumused; - char command[256]; - - SysPrintf( "dump %x:%x, %x\n", startpc, pc, cpuRegs.cycle ); -#ifdef _WIN32 - CreateDirectory("dumps", NULL); - sprintf( filename, "dumps\\dump%.8X.txt", startpc); -#else - mkdir("dumps", 0755); - sprintf( filename, "dumps/dump%.8X.txt", startpc); -#endif - - fflush( stdout ); - - f = fopen( filename, "w" ); - - for ( i = startpc; i < s_nEndBlock; i += 4 ) { - fprintf( f, "%s\n", disR5900Fasm( PSMu32( i ), i ) ); - } - - // write the instruction info - - fprintf(f, "\n\nlive0 - %x, live1 - %x, live2 - %x, lastuse - %x\nxmm - %x, used - %x\n", - EEINST_LIVE0, EEINST_LIVE1, EEINST_LIVE2, EEINST_LASTUSE, EEINST_XMM, EEINST_USED); - - memset(used, 0, sizeof(used)); - numused = 0; - for(i = 0; i < ARRAYSIZE(s_pInstCache->regs); ++i) { - if( s_pInstCache->regs[i] & EEINST_USED ) { - used[i] = 1; - numused++; - } - } - - memset(fpuused, 0, sizeof(fpuused)); - fpunumused = 0; - for(i = 0; i < ARRAYSIZE(s_pInstCache->fpuregs); ++i) { - if( s_pInstCache->fpuregs[i] & EEINST_USED ) { - fpuused[i] = 1; - fpunumused++; - } - } - - fprintf(f, " "); - for(i = 0; i < ARRAYSIZE(s_pInstCache->regs); ++i) { - if( used[i] ) fprintf(f, "%2d ", i); - } - for(i = 0; i < ARRAYSIZE(s_pInstCache->fpuregs); ++i) { - if( fpuused[i] ) fprintf(f, "%2d ", i); - } - fprintf(f, "\n"); - - fprintf(f, " "); - for(i = 0; i < ARRAYSIZE(s_pInstCache->regs); ++i) { - if( used[i] ) fprintf(f, "%s ", disRNameGPR[i]); - } - for(i = 0; i < ARRAYSIZE(s_pInstCache->fpuregs); ++i) { - if( fpuused[i] ) fprintf(f, "%s ", i<32?"FR":"FA"); - } - fprintf(f, "\n"); - - pcur = s_pInstCache+1; - for( i = 0; i < (s_nEndBlock-startpc)/4; ++i, ++pcur) { - fprintf(f, "%2d: %2.2x ", i+1, pcur->info); - - count = 1; - for(j = 0; j < ARRAYSIZE(s_pInstCache->regs); j++) { - if( used[j] ) { - fprintf(f, "%2.2x%s", pcur->regs[j], ((count%8)&&countfpuregs); j++) { - if( fpuused[j] ) { - fprintf(f, "%2.2x%s", pcur->fpuregs[j], ((count%8)&&count tempdump", filename ); - system( command ); - sprintf(command, "mv tempdump %s", filename); - system(command); - f = fopen( filename, "a+" ); -#endif -} - -u8 _eeLoadWritesRs(u32 tempcode) -{ - switch(tempcode>>26) { - case 26: // ldl - case 27: // ldr - case 32: case 33: case 34: case 35: case 36: case 37: case 38: case 39: - case 55: // LD - case 30: // lq - return ((tempcode>>21)&0x1f)==((tempcode>>16)&0x1f); // rs==rt - } - return 0; -} - -u8 _eeIsLoadStoreCoIssue(u32 firstcode, u32 secondcode) -{ - switch(firstcode>>26) { - case 34: // lwl - return (secondcode>>26)==38; - case 38: // lwr - return (secondcode>>26)==34; - case 42: // swl - return (secondcode>>26)==46; - case 46: // swr - return (secondcode>>26)==42; - case 26: // ldl - return (secondcode>>26)==27; - case 27: // ldr - return (secondcode>>26)==26; - case 44: // sdl - return (secondcode>>26)==45; - case 45: // sdr - return (secondcode>>26)==44; - - case 32: case 33: case 35: case 36: case 37: case 39: - case 55: // LD - - // stores - case 40: case 41: case 43: - case 63: // sd - return (secondcode>>26)==(firstcode>>26); - - case 30: // lq - case 31: // sq - case 49: // lwc1 - case 57: // swc1 - case 54: // lqc2 - case 62: // sqc2 - return (secondcode>>26)==(firstcode>>26); - } - return 0; -} - -u8 _eeIsLoadStoreCoX(u32 tempcode) -{ - switch( tempcode>>26 ) { - case 30: case 31: case 49: case 57: case 55: case 63: - return 1; - } - return 0; -} - -void _eeFlushAllUnused() -{ - int i; - for(i = 0; i < 34; ++i) { - if( pc < s_nEndBlock ) { - if( (g_pCurInstInfo[1].regs[i]&EEINST_USED) ) - continue; - } - else if( (g_pCurInstInfo[0].regs[i]&EEINST_USED) ) - continue; - - if( i < 32 && GPR_IS_CONST1(i) ) _flushConstReg(i); - else { - _deleteGPRtoXMMreg(i, 1); - } - } - - //TODO when used info is done for FPU and VU0 - for(i = 0; i < XMMREGS; ++i) { - if( xmmregs[i].inuse && xmmregs[i].type != XMMTYPE_GPRREG ) - _freeXMMreg(i); - } - for(i = 0; i < X86REGS; ++i) { - if( x86regs[i].inuse && x86regs[i].type != X86TYPE_GPR ) - _freeX86reg(i); - } -} - -u32* _eeGetConstReg(int reg) -{ - assert( GPR_IS_CONST1( reg ) ); - - if( g_cpuFlushedConstReg & (1<regs[xmmregs[i].reg]&EEINST_USED) ) { - if( !_recIsRegWritten(g_pCurInstInfo+1, (s_nEndBlock-pc)/4, XMMTYPE_GPRREG, xmmregs[i].reg) ) { - _freeXMMreg(i); - xmmregs[i].inuse = 1; - return 1; - } - } - } - - return 0; -} - -int _flushX86unused() -{ - int i; - for (i=0; iregs[x86regs[i].reg]&EEINST_USED) ) { - if( !_recIsRegWritten(g_pCurInstInfo+1, (s_nEndBlock-pc)/4, XMMTYPE_GPRREG, x86regs[i].reg) ) { - _freeX86reg(i); - x86regs[i].inuse = 1; - return 1; - } - } - } - - return 0; -} - -int _flushUnusedConstReg() -{ - int i; - for(i = 1; i < 32; ++i) { - if( (g_cpuHasConstReg & (1<>31) == g_cpuConstRegs[i].SL[1] ) - MOV64I32toM((uptr)&cpuRegs.GPR.r[i].UD[0], g_cpuConstRegs[i].UL[0]); - else { - MOV32ItoM((uptr)&cpuRegs.GPR.r[i].UL[0], g_cpuConstRegs[i].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[i].UL[1], g_cpuConstRegs[i].UL[1]); - } - - g_cpuFlushedConstReg |= 1<>31) == g_cpuConstRegs[reg].SL[1] ) - MOV64I32toM((uptr)&cpuRegs.GPR.r[reg].UD[0], g_cpuConstRegs[reg].UL[0]); - else { - MOV32ItoM((uptr)&cpuRegs.GPR.r[reg].UL[0], g_cpuConstRegs[reg].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[reg].UL[1], g_cpuConstRegs[reg].UL[1]); - } - - g_cpuFlushedConstReg |= (1<>31) == g_cpuConstRegs[i].SL[1] ) - MOV64I32toM((uptr)&cpuRegs.GPR.r[i].UD[0], g_cpuConstRegs[i].UL[0]); - else { - MOV32ItoM((uptr)&cpuRegs.GPR.r[i].UL[0], g_cpuConstRegs[i].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[i].UL[1], g_cpuConstRegs[i].UL[1]); - } - g_cpuFlushedConstReg |= 1<regs[reg]&EEINST_LASTUSE) ) { - if( usex86 ) return _allocX86reg(-1, X86TYPE_GPR, reg, mode); - return _allocGPRtoXMMreg(-1, reg, mode); - } - - return -1; -} - -#define PROCESS_EE_SETMODES(mmreg) 0//((mmxregs[mmreg].mode&MODE_WRITE)?PROCESS_EE_MODEWRITES:0) -#define PROCESS_EE_SETMODET(mmreg) 0//((mmxregs[mmreg].mode&MODE_WRITE)?PROCESS_EE_MODEWRITET:0) - -// ignores XMMINFO_READS, XMMINFO_READT, and XMMINFO_READD_LO from xmminfo -// core of reg caching -void eeRecompileCode0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R5900FNPTR_INFO consttcode, R5900FNPTR_INFO noconstcode, int xmminfo) -{ - int mmreg1, mmreg2, mmreg3, mmtemp, moded; - - if ( ! _Rd_ && (xmminfo&XMMINFO_WRITED) ) return; - - if( xmminfo&XMMINFO_WRITED) { - CHECK_SAVE_REG(_Rd_); - _eeProcessHasLive(_Rd_, 0); - EEINST_RESETSIGNEXT(_Rd_); - } - - if( GPR_IS_CONST2(_Rs_, _Rt_) ) { - if( xmminfo & XMMINFO_WRITED ) { - _deleteGPRtoXMMreg(_Rd_, 2); - } - if( xmminfo&XMMINFO_WRITED ) GPR_SET_CONST(_Rd_); - constcode(); - return; - } - - moded = MODE_WRITE|((xmminfo&XMMINFO_READD)?MODE_READ:0); - - // test if should write xmm, mirror to mmx code - if( g_pCurInstInfo->info & EEINST_XMM ) { - - if( xmminfo & (XMMINFO_READLO|XMMINFO_WRITELO) ) _addNeededGPRtoXMMreg(XMMGPR_LO); - if( xmminfo & (XMMINFO_READHI|XMMINFO_WRITEHI) ) _addNeededGPRtoXMMreg(XMMGPR_HI); - _addNeededGPRtoXMMreg(_Rs_); - _addNeededGPRtoXMMreg(_Rt_); - - if( GPR_IS_CONST1(_Rs_) || GPR_IS_CONST1(_Rt_) ) { - int creg = GPR_IS_CONST1(_Rs_) ? _Rs_ : _Rt_; - int vreg = creg == _Rs_ ? _Rt_ : _Rs_; - -// if(g_pCurInstInfo->regs[vreg]&EEINST_XMM) { -// mmreg1 = _allocGPRtoXMMreg(-1, vreg, MODE_READ); -// _addNeededGPRtoXMMreg(vreg); -// } - mmreg1 = _allocCheckGPRtoXMM(g_pCurInstInfo, vreg, MODE_READ); - - if( mmreg1 >= 0 ) { - int info = PROCESS_EE_XMM; - - if( GPR_IS_CONST1(_Rs_) ) info |= PROCESS_EE_SETMODET(mmreg1); - else info |= PROCESS_EE_SETMODES(mmreg1); - - if( xmminfo & XMMINFO_WRITED ) { - - _addNeededGPRtoXMMreg(_Rd_); - mmreg3 = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_WRITE); - - if( !(xmminfo&XMMINFO_READD) && mmreg3 < 0 && ((g_pCurInstInfo->regs[vreg] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(vreg)) ) { - _freeXMMreg(mmreg1); - if( GPR_IS_CONST1(_Rs_) ) info &= ~PROCESS_EE_MODEWRITET; - else info &= ~PROCESS_EE_MODEWRITES; - xmmregs[mmreg1].inuse = 1; - xmmregs[mmreg1].reg = _Rd_; - xmmregs[mmreg1].mode = moded; - mmreg3 = mmreg1; - } - else if( mmreg3 < 0 ) mmreg3 = _allocGPRtoXMMreg(-1, _Rd_, moded); - - info |= PROCESS_EE_SET_D(mmreg3); - } - - if( xmminfo & (XMMINFO_READLO|XMMINFO_WRITELO) ) { - mmtemp = eeProcessHILO(XMMGPR_LO, ((xmminfo&XMMINFO_READLO)?MODE_READ:0)|((xmminfo&XMMINFO_WRITELO)?MODE_WRITE:0), 0); - if( mmtemp >= 0 ) info |= PROCESS_EE_SET_LO(mmtemp); - } - if( xmminfo & (XMMINFO_READHI|XMMINFO_WRITEHI) ) { - mmtemp = eeProcessHILO(XMMGPR_HI, ((xmminfo&XMMINFO_READLO)?MODE_READ:0)|((xmminfo&XMMINFO_WRITELO)?MODE_WRITE:0), 0); - if( mmtemp >= 0 ) info |= PROCESS_EE_SET_HI(mmtemp); - } - - if( creg == _Rs_ ) constscode(info|PROCESS_EE_SET_T(mmreg1)); - else consttcode(info|PROCESS_EE_SET_S(mmreg1)); - _clearNeededXMMregs(); - if( xmminfo & XMMINFO_WRITED ) GPR_DEL_CONST(_Rd_); - return; - } - } - else { - // no const regs - mmreg1 = _allocCheckGPRtoXMM(g_pCurInstInfo, _Rs_, MODE_READ); - mmreg2 = _allocCheckGPRtoXMM(g_pCurInstInfo, _Rt_, MODE_READ); - - if( mmreg1 >= 0 || mmreg2 >= 0 ) { - int info = PROCESS_EE_XMM; - - // do it all in xmm - if( mmreg1 < 0 ) mmreg1 = _allocGPRtoXMMreg(-1, _Rs_, MODE_READ); - if( mmreg2 < 0 ) mmreg2 = _allocGPRtoXMMreg(-1, _Rt_, MODE_READ); - - info |= PROCESS_EE_SETMODES(mmreg1)|PROCESS_EE_SETMODET(mmreg2); - - if( xmminfo & XMMINFO_WRITED ) { - // check for last used, if so don't alloc a new XMM reg - _addNeededGPRtoXMMreg(_Rd_); - mmreg3 = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, moded); - - if( mmreg3 < 0 ) { - if( !(xmminfo&XMMINFO_READD) && ((g_pCurInstInfo->regs[_Rt_] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(_Rt_)) ) { - _freeXMMreg(mmreg2); - info &= ~PROCESS_EE_MODEWRITET; - xmmregs[mmreg2].inuse = 1; - xmmregs[mmreg2].reg = _Rd_; - xmmregs[mmreg2].mode = moded; - mmreg3 = mmreg2; - } - else if( !(xmminfo&XMMINFO_READD) && ((g_pCurInstInfo->regs[_Rs_] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(_Rs_)) ) { - _freeXMMreg(mmreg1); - info &= ~PROCESS_EE_MODEWRITES; - xmmregs[mmreg1].inuse = 1; - xmmregs[mmreg1].reg = _Rd_; - xmmregs[mmreg1].mode = moded; - mmreg3 = mmreg1; - } - else mmreg3 = _allocGPRtoXMMreg(-1, _Rd_, moded); - } - - info |= PROCESS_EE_SET_D(mmreg3); - } - - if( xmminfo & (XMMINFO_READLO|XMMINFO_WRITELO) ) { - mmtemp = eeProcessHILO(XMMGPR_LO, ((xmminfo&XMMINFO_READLO)?MODE_READ:0)|((xmminfo&XMMINFO_WRITELO)?MODE_WRITE:0), 0); - if( mmtemp >= 0 ) info |= PROCESS_EE_SET_LO(mmtemp); - } - if( xmminfo & (XMMINFO_READHI|XMMINFO_WRITEHI) ) { - mmtemp = eeProcessHILO(XMMGPR_HI, ((xmminfo&XMMINFO_READLO)?MODE_READ:0)|((xmminfo&XMMINFO_WRITELO)?MODE_WRITE:0), 0); - if( mmtemp >= 0 ) info |= PROCESS_EE_SET_HI(mmtemp); - } - - noconstcode(info|PROCESS_EE_SET_S(mmreg1)|PROCESS_EE_SET_T(mmreg2)); - _clearNeededXMMregs(); - if( xmminfo & XMMINFO_WRITED ) GPR_DEL_CONST(_Rd_); - return; - } - } - - _clearNeededXMMregs(); - } - - // regular x86 - _deleteGPRtoXMMreg(_Rs_, 1); - _deleteGPRtoXMMreg(_Rt_, 1); - if( xmminfo&XMMINFO_WRITED ) - _deleteGPRtoXMMreg(_Rd_, (xmminfo&XMMINFO_READD)?0:2); - - if( GPR_IS_CONST1(_Rs_) ) { - constscode(0); - if( xmminfo&XMMINFO_WRITED ) GPR_DEL_CONST(_Rd_); - return; - } - - if( GPR_IS_CONST1(_Rt_) ) { - consttcode(0); - if( xmminfo&XMMINFO_WRITED ) GPR_DEL_CONST(_Rd_); - return; - } - - noconstcode(0); - if( xmminfo&XMMINFO_WRITED ) GPR_DEL_CONST(_Rd_); -} - -// rt = rs op imm16 -void eeRecompileCode1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode) -{ - int mmreg1, mmreg2; - if ( ! _Rt_ ) return; - - CHECK_SAVE_REG(_Rt_); - _eeProcessHasLive(_Rt_, 0); - EEINST_RESETSIGNEXT(_Rt_); - - if( GPR_IS_CONST1(_Rs_) ) { - _deleteGPRtoXMMreg(_Rt_, 2); - GPR_SET_CONST(_Rt_); - constcode(); - return; - } - - // test if should write xmm, mirror to mmx code - if( g_pCurInstInfo->info & EEINST_XMM ) { - - // no const regs - mmreg1 = _allocCheckGPRtoXMM(g_pCurInstInfo, _Rs_, MODE_READ); - - if( mmreg1 >= 0 ) { - int info = PROCESS_EE_XMM|PROCESS_EE_SETMODES(mmreg1); - - // check for last used, if so don't alloc a new XMM reg - _addNeededGPRtoXMMreg(_Rt_); - mmreg2 = _checkXMMreg(XMMTYPE_GPRREG, _Rt_, MODE_WRITE); - - if( mmreg2 < 0 ) { - if( (g_pCurInstInfo->regs[_Rs_] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(_Rs_) ) { - _freeXMMreg(mmreg1); - info &= ~PROCESS_EE_MODEWRITES; - xmmregs[mmreg1].inuse = 1; - xmmregs[mmreg1].reg = _Rt_; - xmmregs[mmreg1].mode = MODE_WRITE|MODE_READ; - mmreg2 = mmreg1; - } - else mmreg2 = _allocGPRtoXMMreg(-1, _Rt_, MODE_WRITE); - } - - noconstcode(info|PROCESS_EE_SET_S(mmreg1)|PROCESS_EE_SET_T(mmreg2)); - _clearNeededXMMregs(); - GPR_DEL_CONST(_Rt_); - return; - } - - _clearNeededXMMregs(); - } - - // regular x86 - _deleteGPRtoXMMreg(_Rs_, 1); - _deleteGPRtoXMMreg(_Rt_, 2); - - noconstcode(0); - GPR_DEL_CONST(_Rt_); -} - -// rd = rt op sa -void eeRecompileCode2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode) -{ - int mmreg1, mmreg2; - if ( ! _Rd_ ) return; - - CHECK_SAVE_REG(_Rd_); - _eeProcessHasLive(_Rd_, 0); - EEINST_RESETSIGNEXT(_Rd_); - - if( GPR_IS_CONST1(_Rt_) ) { - _deleteGPRtoXMMreg(_Rd_, 2); - GPR_SET_CONST(_Rd_); - constcode(); - return; - } - - // test if should write xmm, mirror to mmx code - if( g_pCurInstInfo->info & EEINST_XMM ) { - - // no const regs - mmreg1 = _allocCheckGPRtoXMM(g_pCurInstInfo, _Rt_, MODE_READ); - - if( mmreg1 >= 0 ) { - int info = PROCESS_EE_XMM|PROCESS_EE_SETMODET(mmreg1); - - // check for last used, if so don't alloc a new XMM reg - _addNeededGPRtoXMMreg(_Rd_); - mmreg2 = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_WRITE); - - if( mmreg2 < 0 ) { - if( (g_pCurInstInfo->regs[_Rt_] & EEINST_LASTUSE) || !EEINST_ISLIVE64(_Rt_) ) { - _freeXMMreg(mmreg1); - info &= ~PROCESS_EE_MODEWRITET; - xmmregs[mmreg1].inuse = 1; - xmmregs[mmreg1].reg = _Rd_; - xmmregs[mmreg1].mode = MODE_WRITE|MODE_READ; - mmreg2 = mmreg1; - } - else mmreg2 = _allocGPRtoXMMreg(-1, _Rd_, MODE_WRITE); - } - - noconstcode(info|PROCESS_EE_SET_T(mmreg1)|PROCESS_EE_SET_D(mmreg2)); - _clearNeededXMMregs(); - GPR_DEL_CONST(_Rd_); - return; - } - - _clearNeededXMMregs(); - } - - // regular x86 - _deleteGPRtoXMMreg(_Rt_, 1); - _deleteGPRtoXMMreg(_Rd_, 2); - - noconstcode(0); - GPR_DEL_CONST(_Rd_); -} - -// rt op rs -void eeRecompileCode3(R5900FNPTR constcode, R5900FNPTR_INFO multicode) -{ - assert(0); - // for now, don't support xmm - _deleteEEreg(_Rs_, 1); - _deleteEEreg(_Rt_, 1); - - if( GPR_IS_CONST2(_Rs_, _Rt_) ) { - constcode(); - return; - } - - if( GPR_IS_CONST1(_Rs_) ) { - //multicode(PROCESS_EE_CONSTT); - return; - } - - if( GPR_IS_CONST1(_Rt_) ) { - //multicode(PROCESS_EE_CONSTT); - return; - } - - multicode(0); -} - -// Simple Code Templates // - -// rd = rs op rt -void eeRecompileCodeConst0(R5900FNPTR constcode, R5900FNPTR_INFO constscode, R5900FNPTR_INFO consttcode, R5900FNPTR_INFO noconstcode) -{ - if ( ! _Rd_ ) return; - - // for now, don't support xmm - CHECK_SAVE_REG(_Rd_); - - _deleteGPRtoXMMreg(_Rs_, 1); - _deleteGPRtoXMMreg(_Rt_, 1); - _deleteGPRtoXMMreg(_Rd_, 0); - - if( GPR_IS_CONST2(_Rs_, _Rt_) ) { - GPR_SET_CONST(_Rd_); - constcode(); - return; - } - - if( GPR_IS_CONST1(_Rs_) ) { - constscode(0); - GPR_DEL_CONST(_Rd_); - return; - } - - if( GPR_IS_CONST1(_Rt_) ) { - consttcode(0); - GPR_DEL_CONST(_Rd_); - return; - } - - noconstcode(0); - GPR_DEL_CONST(_Rd_); -} - -// rt = rs op imm16 -void eeRecompileCodeConst1(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode) -{ - if ( ! _Rt_ ) return; - - // for now, don't support xmm - CHECK_SAVE_REG(_Rt_); - - _deleteGPRtoXMMreg(_Rs_, 1); - _deleteGPRtoXMMreg(_Rt_, 0); - - if( GPR_IS_CONST1(_Rs_) ) { - GPR_SET_CONST(_Rt_); - constcode(); - return; - } - - noconstcode(0); - GPR_DEL_CONST(_Rt_); -} - -// rd = rt op sa -void eeRecompileCodeConst2(R5900FNPTR constcode, R5900FNPTR_INFO noconstcode) -{ - if ( ! _Rd_ ) return; - - // for now, don't support xmm - CHECK_SAVE_REG(_Rd_); - - _deleteGPRtoXMMreg(_Rt_, 1); - _deleteGPRtoXMMreg(_Rd_, 0); - - if( GPR_IS_CONST1(_Rt_) ) { - GPR_SET_CONST(_Rd_); - constcode(); - return; - } - - noconstcode(0); - GPR_DEL_CONST(_Rd_); -} - -// rd = rt MULT rs (SPECIAL) -void eeRecompileCodeConstSPECIAL(R5900FNPTR constcode, R5900FNPTR_INFO multicode, int MULT) -{ - assert(0); - // for now, don't support xmm - if( MULT ) { - CHECK_SAVE_REG(_Rd_); - _deleteGPRtoXMMreg(_Rd_, 0); - } - - _deleteGPRtoXMMreg(_Rs_, 1); - _deleteGPRtoXMMreg(_Rt_, 1); - - if( GPR_IS_CONST2(_Rs_, _Rt_) ) { - if( MULT && _Rd_ ) GPR_SET_CONST(_Rd_); - constcode(); - return; - } - - if( GPR_IS_CONST1(_Rs_) ) { - //multicode(PROCESS_EE_CONSTS); - if( MULT && _Rd_ ) GPR_DEL_CONST(_Rd_); - return; - } - - if( GPR_IS_CONST1(_Rt_) ) { - //multicode(PROCESS_EE_CONSTT); - if( MULT && _Rd_ ) GPR_DEL_CONST(_Rd_); - return; - } - - multicode(0); - if( MULT && _Rd_ ) GPR_DEL_CONST(_Rd_); -} - -// EE XMM allocation code -int eeRecompileCodeXMM(int xmminfo) -{ - int info = PROCESS_EE_XMM; - - // save state - if( xmminfo & XMMINFO_WRITED ) { - CHECK_SAVE_REG(_Rd_); - _eeProcessHasLive(_Rd_, 0); - EEINST_RESETSIGNEXT(_Rd_); - } - - // flush consts - if( xmminfo & XMMINFO_READT ) { - if( GPR_IS_CONST1( _Rt_ ) && !(g_cpuFlushedConstReg&(1<<_Rt_)) ) { - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], g_cpuConstRegs[_Rt_].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], g_cpuConstRegs[_Rt_].UL[1]); - g_cpuFlushedConstReg |= (1<<_Rt_); - } - } - if( xmminfo & XMMINFO_READS) { - if( GPR_IS_CONST1( _Rs_ ) && !(g_cpuFlushedConstReg&(1<<_Rs_)) ) { - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ], g_cpuConstRegs[_Rs_].UL[0]); - MOV32ItoM((uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 1 ], g_cpuConstRegs[_Rs_].UL[1]); - g_cpuFlushedConstReg |= (1<<_Rs_); - } - } - - if( xmminfo & XMMINFO_WRITED ) { - GPR_DEL_CONST(_Rd_); - } - - // add needed - if( xmminfo & (XMMINFO_READLO|XMMINFO_WRITELO) ) { - _addNeededGPRtoXMMreg(XMMGPR_LO); - } - if( xmminfo & (XMMINFO_READHI|XMMINFO_WRITEHI) ) { - _addNeededGPRtoXMMreg(XMMGPR_HI); - } - if( xmminfo & XMMINFO_READS) _addNeededGPRtoXMMreg(_Rs_); - if( xmminfo & XMMINFO_READT) _addNeededGPRtoXMMreg(_Rt_); - if( xmminfo & XMMINFO_WRITED ) _addNeededGPRtoXMMreg(_Rd_); - - // allocate - if( xmminfo & XMMINFO_READS) { - int reg = _allocGPRtoXMMreg(-1, _Rs_, MODE_READ); - info |= PROCESS_EE_SET_S(reg)|PROCESS_EE_SETMODES(reg); - } - if( xmminfo & XMMINFO_READT) { - int reg = _allocGPRtoXMMreg(-1, _Rt_, MODE_READ); - info |= PROCESS_EE_SET_T(reg)|PROCESS_EE_SETMODET(reg); - } - - if( xmminfo & XMMINFO_WRITED ) { - int readd = MODE_WRITE|((xmminfo&XMMINFO_READD)?((xmminfo&XMMINFO_READD_LO)?(MODE_READ|MODE_READHALF):MODE_READ):0); - - int regd = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, readd); - - if( regd < 0 ) { - if( !(xmminfo&XMMINFO_READD) && (xmminfo & XMMINFO_READT) && (_Rt_ == 0 || (g_pCurInstInfo->regs[_Rt_] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(_Rt_)) ) { - _freeXMMreg(EEREC_T); - _deleteX86reg(X86TYPE_GPR, _Rd_, 2); - xmmregs[EEREC_T].inuse = 1; - xmmregs[EEREC_T].reg = _Rd_; - xmmregs[EEREC_T].mode = readd; - regd = EEREC_T; - } - else if( !(xmminfo&XMMINFO_READD) && (xmminfo & XMMINFO_READS) && (_Rs_ == 0 || (g_pCurInstInfo->regs[_Rs_] & EEINST_LASTUSE) || !EEINST_ISLIVEXMM(_Rs_)) ) { - _freeXMMreg(EEREC_S); - _deleteX86reg(X86TYPE_GPR, _Rd_, 2); - xmmregs[EEREC_S].inuse = 1; - xmmregs[EEREC_S].reg = _Rd_; - xmmregs[EEREC_S].mode = readd; - regd = EEREC_S; - } - else regd = _allocGPRtoXMMreg(-1, _Rd_, readd); - } - - info |= PROCESS_EE_SET_D(regd); - } - if( xmminfo & (XMMINFO_READLO|XMMINFO_WRITELO) ) { - info |= PROCESS_EE_SET_LO(_allocGPRtoXMMreg(-1, XMMGPR_LO, ((xmminfo&XMMINFO_READLO)?MODE_READ:0)|((xmminfo&XMMINFO_WRITELO)?MODE_WRITE:0))); - info |= PROCESS_EE_LO; - } - if( xmminfo & (XMMINFO_READHI|XMMINFO_WRITEHI) ) { - info |= PROCESS_EE_SET_HI(_allocGPRtoXMMreg(-1, XMMGPR_HI, ((xmminfo&XMMINFO_READHI)?MODE_READ:0)|((xmminfo&XMMINFO_WRITEHI)?MODE_WRITE:0))); - info |= PROCESS_EE_HI; - } - return info; -} - -// EE COP1(FPU) XMM allocation code -#define _Ft_ _Rt_ -#define _Fs_ _Rd_ -#define _Fd_ _Sa_ - -#define PROCESS_EE_SETMODES_XMM(mmreg) ((xmmregs[mmreg].mode&MODE_WRITE)?PROCESS_EE_MODEWRITES:0) -#define PROCESS_EE_SETMODET_XMM(mmreg) ((xmmregs[mmreg].mode&MODE_WRITE)?PROCESS_EE_MODEWRITET:0) - -// rd = rs op rt -void eeFPURecompileCode(R5900FNPTR_INFO xmmcode, R5900FNPTR fpucode, int xmminfo) -{ - int mmregs=-1, mmregt=-1, mmregd=-1, mmregacc=-1; - - int info = PROCESS_EE_XMM; - - if( xmminfo & XMMINFO_READS ) _addNeededFPtoXMMreg(_Fs_); - if( xmminfo & XMMINFO_READT ) _addNeededFPtoXMMreg(_Ft_); - if( xmminfo & (XMMINFO_WRITED|XMMINFO_READD) ) _addNeededFPtoXMMreg(_Fd_); - if( xmminfo & (XMMINFO_WRITEACC|XMMINFO_READACC) ) _addNeededFPACCtoXMMreg(); - - if( xmminfo & XMMINFO_READT ) { - if( g_pCurInstInfo->fpuregs[_Ft_] & EEINST_LASTUSE ) mmregt = _checkXMMreg(XMMTYPE_FPREG, _Ft_, MODE_READ); - else mmregt = _allocFPtoXMMreg(-1, _Ft_, MODE_READ); - } - - if( xmminfo & XMMINFO_READS ) { - if( ( !(xmminfo & XMMINFO_READT) || (mmregt >= 0) ) && (g_pCurInstInfo->fpuregs[_Fs_] & EEINST_LASTUSE) ) { - mmregs = _checkXMMreg(XMMTYPE_FPREG, _Fs_, MODE_READ); - } - else mmregs = _allocFPtoXMMreg(-1, _Fs_, MODE_READ); - } - - if( mmregs >= 0 ) info |= PROCESS_EE_SETMODES_XMM(mmregs); - if( mmregt >= 0 ) info |= PROCESS_EE_SETMODET_XMM(mmregt); - - if( xmminfo & XMMINFO_READD ) { - assert( xmminfo & XMMINFO_WRITED ); - mmregd = _allocFPtoXMMreg(-1, _Fd_, MODE_READ); - } - - if( xmminfo & XMMINFO_READACC ) { - if( !(xmminfo&XMMINFO_WRITEACC) && (g_pCurInstInfo->fpuregs[_Ft_] & EEINST_LASTUSE) ) - mmregacc = _checkXMMreg(XMMTYPE_FPACC, 0, MODE_READ); - else mmregacc = _allocFPACCtoXMMreg(-1, MODE_READ); - } - - if( xmminfo & XMMINFO_WRITEACC ) { - - // check for last used, if so don't alloc a new XMM reg - int readacc = MODE_WRITE|((xmminfo&XMMINFO_READACC)?MODE_READ:0); - - mmregacc = _checkXMMreg(XMMTYPE_FPACC, 0, readacc); - - if( mmregacc < 0 ) { - if( (xmminfo&XMMINFO_READT) && mmregt >= 0 && (FPUINST_LASTUSE(_Ft_) || !FPUINST_ISLIVE(_Ft_)) ) { - if( FPUINST_ISLIVE(_Ft_) ) { - _freeXMMreg(mmregt); - info &= ~PROCESS_EE_MODEWRITET; - } - xmmregs[mmregt].inuse = 1; - xmmregs[mmregt].reg = 0; - xmmregs[mmregt].mode = readacc; - xmmregs[mmregt].type = XMMTYPE_FPACC; - mmregacc = mmregt; - } - else if( (xmminfo&XMMINFO_READS) && mmregs >= 0 && (FPUINST_LASTUSE(_Fs_) || !FPUINST_ISLIVE(_Fs_)) ) { - if( FPUINST_ISLIVE(_Fs_) ) { - _freeXMMreg(mmregs); - info &= ~PROCESS_EE_MODEWRITES; - } - xmmregs[mmregs].inuse = 1; - xmmregs[mmregs].reg = 0; - xmmregs[mmregs].mode = readacc; - xmmregs[mmregs].type = XMMTYPE_FPACC; - mmregacc = mmregs; - } - else mmregacc = _allocFPACCtoXMMreg(-1, readacc); - } - - xmmregs[mmregacc].mode |= MODE_WRITE; - } - else if( xmminfo & XMMINFO_WRITED ) { - // check for last used, if so don't alloc a new XMM reg - int readd = MODE_WRITE|((xmminfo&XMMINFO_READD)?MODE_READ:0); - if( xmminfo&XMMINFO_READD ) mmregd = _allocFPtoXMMreg(-1, _Fd_, readd); - else mmregd = _checkXMMreg(XMMTYPE_FPREG, _Fd_, readd); - - if( mmregd < 0 ) { - if( (xmminfo&XMMINFO_READT) && mmregt >= 0 && (FPUINST_LASTUSE(_Ft_) || !FPUINST_ISLIVE(_Ft_)) ) { - if( FPUINST_ISLIVE(_Ft_) ) { - _freeXMMreg(mmregt); - info &= ~PROCESS_EE_MODEWRITET; - } - xmmregs[mmregt].inuse = 1; - xmmregs[mmregt].reg = _Fd_; - xmmregs[mmregt].mode = readd; - mmregd = mmregt; - } - else if( (xmminfo&XMMINFO_READS) && mmregs >= 0 && (FPUINST_LASTUSE(_Fs_) || !FPUINST_ISLIVE(_Fs_)) ) { - if( FPUINST_ISLIVE(_Fs_) ) { - _freeXMMreg(mmregs); - info &= ~PROCESS_EE_MODEWRITES; - } - xmmregs[mmregs].inuse = 1; - xmmregs[mmregs].reg = _Fd_; - xmmregs[mmregs].mode = readd; - mmregd = mmregs; - } - else if( (xmminfo&XMMINFO_READACC) && mmregacc >= 0 && (FPUINST_LASTUSE(XMMFPU_ACC) || !FPUINST_ISLIVE(XMMFPU_ACC)) ) { - if( FPUINST_ISLIVE(XMMFPU_ACC) ) - _freeXMMreg(mmregacc); - xmmregs[mmregacc].inuse = 1; - xmmregs[mmregacc].reg = _Fd_; - xmmregs[mmregacc].mode = readd; - xmmregs[mmregacc].type = XMMTYPE_FPREG; - mmregd = mmregacc; - } - else mmregd = _allocFPtoXMMreg(-1, _Fd_, readd); - } - } - - assert( mmregs >= 0 || mmregt >= 0 || mmregd >= 0 || mmregacc >= 0 ); - - if( xmminfo & XMMINFO_WRITED ) { - assert( mmregd >= 0 ); - info |= PROCESS_EE_SET_D(mmregd); - } - if( xmminfo & (XMMINFO_WRITEACC|XMMINFO_READACC) ) { - if( mmregacc >= 0 ) info |= PROCESS_EE_SET_ACC(mmregacc)|PROCESS_EE_ACC; - else assert( !(xmminfo&XMMINFO_WRITEACC)); - } - - if( xmminfo & XMMINFO_READS ) { - if( mmregs >= 0 ) info |= PROCESS_EE_SET_S(mmregs)|PROCESS_EE_S; - } - if( xmminfo & XMMINFO_READT ) { - if( mmregt >= 0 ) info |= PROCESS_EE_SET_T(mmregt)|PROCESS_EE_T; - } - - // at least one must be in xmm - if( (xmminfo & (XMMINFO_READS|XMMINFO_READT)) == (XMMINFO_READS|XMMINFO_READT) ) { - assert( mmregs >= 0 || mmregt >= 0 ); - } - - xmmcode(info); - _clearNeededXMMregs(); -} - -#undef _Ft_ -#undef _Fs_ -#undef _Fd_ - -//////////////////////////////////////////////////// -extern u8 g_MACFlagTransform[256]; // for vus - -u32 g_sseMXCSR = DEFAULT_sseMXCSR; -u32 g_sseVUMXCSR = DEFAULT_sseVUMXCSR; - -#if defined(_MSC_VER) -#include -#endif - -void SetCPUState(u32 sseMXCSR, u32 sseVUMXCSR) -{ - // SSE STATE // - // WARNING: do not touch unless you know what you are doing - - sseMXCSR &= 0xffff; // clear the upper 16 bits since they shouldn't be set - sseVUMXCSR &= 0xffff; - - g_sseMXCSR = sseMXCSR; - g_sseVUMXCSR = sseVUMXCSR; - // do NOT set Denormals-Are-Zero flag (charlie and chocfac messes up) - // Update 11/05/08 - Doesnt seem to effect it anymore, for the speed boost, its on :p - //g_sseMXCSR = 0x9f80; // changing the rounding mode to 0x2000 (near) kills grandia III! - // changing the rounding mode to 0x0000 or 0x4000 totally kills gitaroo - // so... grandia III wins (you can change individual games with the 'roundmode' patch command) - -#ifdef _MSC_VER - _mm_setcsr(g_sseMXCSR); // set the new sse control -#else - __asm__("ldmxcsr %0" : : "m"(g_sseMXCSR) ); -#endif - //g_sseVUMXCSR = g_sseMXCSR|0x6000; -} - -extern BOOL install_my_handler(); - -#define REC_CACHEMEM 0x01000000 - -int recInit( void ) -{ - int i; - u32 startaddr; - const u8 macarr[16] = {0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15 }; - - startaddr = 0x0d000000; - while(!(startaddr & 0xf0000000)) { - recMem = (char*)SysMmap(startaddr, REC_CACHEMEM); - if( (uptr)recMem & 0xf0000000 ) { - SysMunmap((uptr)recMem, REC_CACHEMEM); recMem = NULL; - startaddr += 0x00100000; - continue; - } - else break; - } - - if( (uptr)recMem & 0xf0000000 ) { - SysPrintf("R5900 bad rec memory allocation\n"); - return 1; - } - - recLUT = (uptr*) _aligned_malloc( 0x010000 * sizeof(uptr), 16 ); - memset( recLUT, 0, 0x010000 * sizeof(uptr) ); - - // 32 alignment necessary - recRAM = (BASEBLOCK*) _aligned_malloc( sizeof(BASEBLOCK)/4*0x02000000 , 4*sizeof(BASEBLOCK)); - recROM = (BASEBLOCK*) _aligned_malloc( sizeof(BASEBLOCK)/4*0x00400000 , 4*sizeof(BASEBLOCK)); - recROM1= (BASEBLOCK*) _aligned_malloc( sizeof(BASEBLOCK)/4*0x00040000 , 4*sizeof(BASEBLOCK)); - recBlocks = (BASEBLOCKEX*) _aligned_malloc( sizeof(BASEBLOCKEX)*EE_NUMBLOCKS, 16); - recStack = (char*)malloc( RECSTACK_SIZE ); - - s_nInstCacheSize = 128; - s_pInstCache = (EEINST*)malloc( sizeof(EEINST) * s_nInstCacheSize ); - - if ( recBlocks == NULL || recRAM == NULL || recROM == NULL || recROM1 == NULL || recMem == NULL || recLUT == NULL ) { - SysMessage( _( "Error allocating memory" ) ); - return -1; - } - - for ( i = 0x0000; i < 0x0200; i++ ) - { - recLUT[ i + 0x0000 ] = (uptr)&recRAM[ i << 14 ]; - recLUT[ i + 0x2000 ] = (uptr)&recRAM[ i << 14 ]; - recLUT[ i + 0x3000 ] = (uptr)&recRAM[ i << 14 ]; - } - - for ( i = 0x0000; i < 0x0040; i++ ) - { - recLUT[ i + 0x1fc0 ] = (uptr)&recROM[ i << 14 ]; - recLUT[ i + 0x9fc0 ] = (uptr)&recROM[ i << 14 ]; - recLUT[ i + 0xbfc0 ] = (uptr)&recROM[ i << 14 ]; - } - - for ( i = 0x0000; i < 0x0004; i++ ) - { - recLUT[ i + 0x1e00 ] = (uptr)&recROM1[ i << 14 ]; - recLUT[ i + 0x9e00 ] = (uptr)&recROM1[ i << 14 ]; - recLUT[ i + 0xbe00 ] = (uptr)&recROM1[ i << 14 ]; - } - - memcpy( recLUT + 0x8000, recLUT, 0x2000 * sizeof(uptr) ); - memcpy( recLUT + 0xa000, recLUT, 0x2000 * sizeof(uptr) ); - - memset(recMem, 0xcd, REC_CACHEMEM); - memset(recStack, 0, RECSTACK_SIZE); - - // SSE3 detection, manually create the code - x86SetPtr(recMem); - SSE3_MOVSLDUP_XMM_to_XMM(XMM0, XMM0); - RET(); - cpudetectSSE3(recMem); - - SysPrintf( "x86Init: \n" ); - SysPrintf( "\tCPU vendor name = %s\n", cpuinfo.x86ID ); - SysPrintf( "\tFamilyID = %x\n", cpuinfo.x86StepID ); - SysPrintf( "\tx86Family = %s\n", cpuinfo.x86Fam ); - SysPrintf( "\tCPU speed = %d.%03d Ghz\n", cpuinfo.cpuspeed / 1000, cpuinfo.cpuspeed%1000); - SysPrintf( "\tx86PType = %s\n", cpuinfo.x86Type ); - SysPrintf( "\tx86Flags = %8.8x\n", cpuinfo.x86Flags ); - SysPrintf( "\tx86EFlags = %8.8x\n", cpuinfo.x86EFlags ); - SysPrintf( "Features: \n" ); - SysPrintf( "\t%sDetected MMX\n", cpucaps.hasMultimediaExtensions ? "" : "Not " ); - SysPrintf( "\t%sDetected SSE\n", cpucaps.hasStreamingSIMDExtensions ? "" : "Not " ); - SysPrintf( "\t%sDetected SSE2\n", cpucaps.hasStreamingSIMD2Extensions ? "" : "Not " ); - SysPrintf( "\t%sDetected SSE3\n", cpucaps.hasStreamingSIMD3Extensions ? "" : "Not " ); - - if ( cpuinfo.x86ID[0] == 'A' ) //AMD cpu - { - SysPrintf( " Extended AMD Features: \n" ); - SysPrintf( "\t%sDetected MMX2\n", cpucaps.hasMultimediaExtensionsExt ? "" : "Not " ); - SysPrintf( "\t%sDetected 3DNOW\n", cpucaps.has3DNOWInstructionExtensions ? "" : "Not " ); - SysPrintf( "\t%sDetected 3DNOW2\n", cpucaps.has3DNOWInstructionExtensionsExt ? "" : "Not " ); - } - if ( !( cpucaps.hasMultimediaExtensions ) ) - { - SysMessage( _( "Processor doesn't supports MMX, can't run recompiler without that" ) ); - return -1; - } - - SuperVUInit(-1); - - for(i = 0; i < 256; ++i) { //x0-xF //0x-Fx - g_MACFlagTransform[i] = macarr[i>>4]|(macarr[i&15]<<4); - } - - SetCPUState(Config.sseMXCSR, Config.sseVUMXCSR); - - return 0; -} - -//////////////////////////////////////////////////// -void recReset( void ) { -#ifdef PCSX2_DEVBUILD - SysPrintf("EE Recompiler data reset\n"); -#endif - - s_nNextBlock = 0; - maxrecmem = 0; - memset( recRAM, 0, sizeof(BASEBLOCK)/4*0x02000000 ); - memset( recROM, 0, sizeof(BASEBLOCK)/4*0x00400000 ); - memset( recROM1, 0, sizeof(BASEBLOCK)/4*0x00040000 ); - memset( recBlocks, 0, sizeof(BASEBLOCKEX)*EE_NUMBLOCKS ); - if( s_pInstCache ) memset( s_pInstCache, 0, sizeof(EEINST)*s_nInstCacheSize ); - ResetBaseBlockEx(0); - -#ifdef _DEBUG - // don't clear since save states won't work - //memset(recMem, 0xcd, REC_CACHEMEM); -#endif - - recPtr = recMem; - recStackPtr = recStack; - iCWstate = 0; - - branch = 0; -} - -void recShutdown( void ) -{ - if ( recMem == NULL ) { - return; - } - - _aligned_free( recLUT ); - SysMunmap((uptr)recMem, REC_CACHEMEM); recMem = NULL; - _aligned_free( recRAM ); recRAM = NULL; - _aligned_free( recROM ); recROM = NULL; - _aligned_free( recROM1 ); recROM1 = NULL; - _aligned_free( recBlocks ); recBlocks = NULL; - free( s_pInstCache ); s_pInstCache = NULL; s_nInstCacheSize = 0; - - SuperVUDestroy(-1); - - x86Shutdown( ); -} - -void recEnableVU0micro(int enable) { -} - -void recEnableVU1micro(int enable) { -} - -void R5900Execute(); - -void recStep( void ) { -} - -void recExecute( void ) { - //SetThreadPriority(GetCurrentThread(), THREAD_PRIORITY_HIGHEST); - //SetPriorityClass(GetCurrentProcess(), HIGH_PRIORITY_CLASS);//ABOVE_NORMAL_PRIORITY_CLASS); - //SetThreadAffinityMask(GetCurrentThread(), 0); - if( Config.Options & PCSX2_EEREC ) Config.Options |= PCSX2_COP2REC; - - for (;;) - R5900Execute(); -} - -void recExecuteBlock( void ) { - R5900Execute(); -} - -//////////////////////////////////////////////////// -extern u32 g_nextBranchCycle; - -u32 g_lastpc = 0; -u32 g_EEDispatchTemp; -u32 s_pCurBlock_ltime; - -extern void Dispatcher(); -extern void DispatcherClear(); -extern void DispatcherReg(); -extern void _StartPerfCounter(); -extern void _StopPerfCounter(); - -//////////////////////////////////////////////////// -void recClear64(BASEBLOCK* p) -{ - int left = 4 - ((uptr)p % 16)/sizeof(BASEBLOCK); - recClearMem(p); - - if( left > 1 && *(u32*)(p+1) ) recClearMem(p+1); -} - -void recClear128(BASEBLOCK* p) -{ - int left = 4 - ((uptr)p % 32)/sizeof(BASEBLOCK); - recClearMem(p); - - if( left > 1 && *(u32*)(p+1) ) recClearMem(p+1); - if( left > 2 && *(u32*)(p+2) ) recClearMem(p+2); - if( left > 3 && *(u32*)(p+3) ) recClearMem(p+3); -} - -void recClear( u32 Addr, u32 Size ) -{ - u32 i; - for(i = 0; i < Size; ++i, Addr+=4) { - REC_CLEARM(Addr); - } -} - -#define EE_MIN_BLOCK_BYTES 16 - -void recClearMem(BASEBLOCK* p) -{ - BASEBLOCKEX* pexblock; - BASEBLOCK* pstart; - int lastdelay; - - assert( p != NULL ); - - if( p->uType & BLOCKTYPE_DELAYSLOT ) { - recClearMem(p-1); - if( p->pFnptr == 0 ) - return; - } - - assert( p->pFnptr != 0 ); - assert( p->startpc ); - - x86Ptr = (s8*)p->pFnptr; - - // there is a small problem: mem can be ored with 0xa<<28 or 0x8<<28, and don't know which - MOV32ItoR(EDX, p->startpc); - assert( (uptr)x86Ptr <= 0xffffffff ); - MOV32ItoR(R15, (uptr)x86Ptr); // will be replaced by JMP32 - JMP32((uptr)DispatcherClear - ( (uptr)x86Ptr + 5 )); - assert( x86Ptr == (s8*)p->pFnptr + EE_MIN_BLOCK_BYTES ); - - pstart = PC_GETBLOCK(p->startpc); - pexblock = PC_GETBLOCKEX(pstart); - assert( pexblock->startpc == pstart->startpc ); - -// if( pexblock->pOldFnptr ) { -// // have to mod oldfnptr too -// x86Ptr = pexblock->pOldFnptr; -// -// MOV32ItoR(EDX, p->startpc); -// JMP32((u32)DispatcherClear - ( (u32)x86Ptr + 5 )); -// } -// else -// pexblock->pOldFnptr = (u8*)p->pFnptr; - - // don't delete if last is delay - lastdelay = pexblock->size; - if( pstart[pexblock->size-1].uType & BLOCKTYPE_DELAYSLOT ) { - assert( pstart[pexblock->size-1].pFnptr != pstart->pFnptr ); - if( pstart[pexblock->size-1].pFnptr != 0 ) { - pstart[pexblock->size-1].uType = 0; - --lastdelay; - } - } - - memset(pstart, 0, lastdelay*sizeof(BASEBLOCK)); - - RemoveBaseBlockEx(pexblock, 0); - pexblock->size = 0; - pexblock->startpc = 0; -} - -// check for end of bios -void CheckForBIOSEnd() -{ - MOV32MtoR(EAX, (uptr)&cpuRegs.pc); - - CMP32ItoR(EAX, 0x00200008); - j8Ptr[0] = JE8(0); - - CMP32ItoR(EAX, 0x00100008); - j8Ptr[1] = JE8(0); - - // return - j8Ptr[2] = JMP8(0); - - x86SetJ8( j8Ptr[0] ); - x86SetJ8( j8Ptr[1] ); - - // bios end - if( REC_INC_STACK ) - ADD64ItoR(RSP, REC_INC_STACK); - RET2(); - - x86SetJ8( j8Ptr[2] ); -} - -static int *s_pCode; - -void SetBranchReg( u32 reg ) -{ - branch = 1; - - if( reg != 0xffffffff ) { -// if( GPR_IS_CONST1(reg) ) -// MOV32ItoM( (uptr)&cpuRegs.pc, g_cpuConstRegs[reg].UL[0] ); -// else { -// int mmreg; -// -// if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, reg, MODE_READ)) >= 0 ) { -// SSE_MOVSS_XMM_to_M32((uptr)&cpuRegs.pc, mmreg); -// } -// else { -// MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[ reg ].UL[ 0 ] ); -// MOV32RtoM((uptr)&cpuRegs.pc, EAX); -// } -// } - _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); - _eeMoveGPRtoR(ESI, reg); - - recompileNextInstruction(1); - - if( x86regs[ESI].inuse ) { - assert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); - MOV32RtoM((uptr)&cpuRegs.pc, ESI); - x86regs[ESI].inuse = 0; - } - else { - MOV32MtoR(EAX, (uptr)&g_recWriteback); - MOV32RtoM((uptr)&cpuRegs.pc, EAX); - } - } - -// CMP32ItoM((uptr)&cpuRegs.pc, 0); -// j8Ptr[5] = JNE8(0); -// CALLFunc((uptr)tempfn); -// x86SetJ8( j8Ptr[5] ); - - iFlushCall(FLUSH_EVERYTHING); - - iBranchTest(0xffffffff, 1); - if( bExecBIOS ) CheckForBIOSEnd(); - - JMP32((uptr)DispatcherReg - ( (uptr)x86Ptr + 5 )); -} - -void SetBranchImm( u32 imm ) -{ - u32* ptr; - branch = 1; - - assert( imm ); - - // end the current block - MOV32ItoM( (uptr)&cpuRegs.pc, imm ); - iFlushCall(FLUSH_EVERYTHING); - - iBranchTest(imm, imm <= pc); - if( bExecBIOS ) CheckForBIOSEnd(); - - MOV32ItoR(EDX, 0); - ptr = (u32*)(x86Ptr-4); - *ptr = (u32)JMP32((uptr)Dispatcher - ( (uptr)x86Ptr + 5 )); -} - -void SaveBranchState() -{ - s_savex86FpuState = x86FpuState; - s_saveiCWstate = iCWstate; - s_savenBlockCycles = s_nBlockCycles; - s_saveConstGPRreg = 0xffffffff; // indicate searching - s_saveHasConstReg = g_cpuHasConstReg; - s_saveFlushedConstReg = g_cpuFlushedConstReg; - s_psaveInstInfo = g_pCurInstInfo; - s_saveRegHasLive1 = g_cpuRegHasLive1; - s_saveRegHasSignExt = g_cpuRegHasSignExt; - - // save all mmx regs - memcpy(s_saveXMMregs, xmmregs, sizeof(xmmregs)); - memcpy(s_saveX86regs, x86regs, sizeof(x86regs)); -} - -void LoadBranchState() -{ - x86FpuState = s_savex86FpuState; - iCWstate = s_saveiCWstate; - s_nBlockCycles = s_savenBlockCycles; - - if( s_saveConstGPRreg != 0xffffffff ) { - assert( s_saveConstGPRreg > 0 ); - - // make sure right GPR was saved - assert( g_cpuHasConstReg == s_saveHasConstReg || (g_cpuHasConstReg ^ s_saveHasConstReg) == (1<ltime); -// CALLFunc((uptr)_StopPerfCounter); -// } -#endif -} - -//void testfpu() -//{ -// int i; -// for(i = 0; i < 32; ++i ) { -// if( fpuRegs.fpr[i].UL== 0x7f800000 || fpuRegs.fpr[i].UL == 0xffc00000) { -// SysPrintf("bad fpu: %x %x %x\n", i, cpuRegs.cycle, g_lastpc); -// } -// -// if( VU0.VF[i].UL[0] == 0xffc00000 || //(VU0.VF[i].UL[1]&0xffc00000) == 0xffc00000 || -// VU0.VF[i].UL[0] == 0x7f800000) { -// SysPrintf("bad vu0: %x %x %x\n", i, cpuRegs.cycle, g_lastpc); -// } -// } -//} - -//static void cleanup() -//{ -// assert( !g_globalXMMSaved ); -//} - -//fixme : this is all a huge hack, we base the counter advancements on the average an opcode should take (wtf?) -// If that wasn't bad enough we have default values like 9/8 which will get cast to int later -// (yeah, that means all sync code couldn't have worked to beginn with) -// So for now these are new settings that work. I would've set 1 for default but that seemed too low -// (rama) -// applying this to 64 bit as well - arcum42 - -//#define EECYCLE_MULT (CHECK_EESYNC_HACK ? (CHECK_EE_IOP_EXTRA ? 3.375 : 2.25) : (9/8)) -#define EECYCLE_MULT (CHECK_EESYNC_HACK ? (CHECK_EE_IOP_EXTRA ? 3 : 2) : (1.2)) - -static void iBranchTest(u32 newpc, u32 cpuBranch) -{ -#ifdef PCSX2_DEVBUILD -// if( s_startcount ) { -// StopPerfCounter(); -// ADD32ItoM( (uptr)&s_pCurBlockEx->visited, 1 ); -// } -#endif - -#ifdef _DEBUG - //CALLFunc((uptr)testfpu); -#endif - - MOV32MtoR(ECX, (uptr)&cpuRegs.cycle); - ADD32ItoR(ECX, s_nBlockCycles * EECYCLE_MULT); - MOV32RtoM((uptr)&cpuRegs.cycle, ECX); // update cycles - SUB32MtoR(ECX, (uptr)&g_nextBranchCycle); - - // check if should branch - j8Ptr[0] = JS8( 0 ); - - // has to be in the middle of Save/LoadBranchState - CALLFunc((uptr)cpuBranchTest ); - - if( newpc != 0xffffffff ) { - CMP32ItoM((uptr)&cpuRegs.pc, newpc); - JNE32((uptr)DispatcherReg - ( (uptr)x86Ptr + 6 )); - } - - x86SetJ8( j8Ptr[0] ); -} - - -//////////////////////////////////////////////////// -#ifndef CP2_RECOMPILE - -REC_SYS(COP2); - -#else - -void recCOP2( void ) -{ - CPU_LOG( "Recompiling COP2:%s\n", disR5900Fasm( cpuRegs.code, cpuRegs.pc ) ); - recCOP22( ); -} - -#endif - -//////////////////////////////////////////////////// -void recSYSCALL( void ) { - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - iFlushCall(FLUSH_NODESTROY); - CALLFunc( (uptr)SYSCALL ); - - CMP32ItoM((uptr)&cpuRegs.pc, pc); - j8Ptr[0] = JE8(0); - ADD32ItoM((uptr)&cpuRegs.cycle, s_nBlockCycles); - JMP32((uptr)DispatcherReg - ( (uptr)x86Ptr + 5 )); - x86SetJ8(j8Ptr[0]); - //branch = 2; -} - -//////////////////////////////////////////////////// -void recBREAK( void ) { - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - iFlushCall(FLUSH_EVERYTHING); - CALLFunc( (uptr)BREAK ); - - CMP32ItoM((uptr)&cpuRegs.pc, pc); - j8Ptr[0] = JE8(0); - ADD32ItoM((uptr)&cpuRegs.cycle, s_nBlockCycles); - - if( REC_INC_STACK ) - ADD64ItoR(RSP, REC_INC_STACK); - RET(); - x86SetJ8(j8Ptr[0]); - //branch = 2; -} - -//////////////////////////////////////////////////// -//static void recCACHE( void ) { -// MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); -// MOV32ItoM( (uptr)&cpuRegs.pc, pc ); -// iFlushCall(FLUSH_EVERYTHING); -// CALLFunc( (uptr)CACHE ); -// //branch = 2; -// -// CMP32ItoM((uptr)&cpuRegs.pc, pc); -// j8Ptr[0] = JE8(0); -// RET(); -// x86SetJ8(j8Ptr[0]); -//} - - -void recPREF( void ) -{ -} - -void recSYNC( void ) -{ -} - -void recMFSA( void ) -{ - int mmreg; - if (!_Rd_) return; - - if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rd_, MODE_WRITE)) >= 0 ) { - SSE_MOVLPS_M64_to_XMM(mmreg, (uptr)&cpuRegs.sa); - } - else { - MOV64MtoR(RAX, (uptr)&cpuRegs.sa); - _deleteEEreg(_Rd_, 0); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } - //else { - // mmreg = _allocX86reg(-1, X86TYPE_GPR, _Rd_, MODE_WRITE); - // MOV64MtoR(mmreg, (uptr)&cpuRegs.sa); - //} -} - -void recMTSA( void ) -{ - if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, g_cpuConstRegs[_Rs_].UL[0] ); - } - else { - int mmreg; - - if( (mmreg = _checkXMMreg(XMMTYPE_GPRREG, _Rs_, MODE_READ)) >= 0 ) { - SSE_MOVSS_XMM_to_M32((uptr)&cpuRegs.sa, mmreg); - } - else { - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - MOV32RtoM((uptr)&cpuRegs.sa, EAX); - } - } -} - -void recMTSAB( void ) -{ - if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0xF) ^ (_Imm_ & 0xF)) << 3); - } - else { - _eeMoveGPRtoR(EAX, _Rs_); - AND32ItoR(EAX, 0xF); - XOR32ItoR(EAX, _Imm_&0xf); - SHL32ItoR(EAX, 3); - MOV32RtoM((uptr)&cpuRegs.sa, EAX); - } -} - -void recMTSAH( void ) -{ - if( GPR_IS_CONST1(_Rs_) ) { - MOV32ItoM((uptr)&cpuRegs.sa, ((g_cpuConstRegs[_Rs_].UL[0] & 0x7) ^ (_Imm_ & 0x7)) << 4); - } - else { - _eeMoveGPRtoR(EAX, _Rs_); - AND32ItoR(EAX, 0x7); - XOR32RtoR(EAX, _Imm_&0x7); - SHL32ItoR(EAX, 4); - MOV32RtoM((uptr)&cpuRegs.sa, EAX); - } -} - -#if !defined(_MSC_VER) -static void checkcodefn() -{ - int pctemp; - - __asm__("movl %%eax, %0" : "=m"(pctemp) ); - - SysPrintf("code changed! %x\n", pctemp); - assert(0); -} -#endif - -void checkpchanged(u32 startpc) -{ - assert(0); -} - -//#ifdef _DEBUG -//#define CHECK_XMMCHANGED() CALLFunc((uptr)checkxmmchanged); -//#else -//#define CHECK_XMMCHANGED() -//#endif -// -//static void checkxmmchanged() -//{ -// assert( !g_globalXMMSaved ); -//} - -u32 recompileCodeSafe(u32 temppc) -{ - BASEBLOCK* pblock = PC_GETBLOCK(temppc); - - if( pblock->pFnptr != 0 && pblock->startpc != s_pCurBlock->startpc ) { - if( pc == pblock->startpc ) - return 0; - } - - return 1; -} - -void recompileNextInstruction(int delayslot) -{ - static u8 s_bFlushReg = 1; - int i, count; - - BASEBLOCK* pblock = PC_GETBLOCK(pc); - - // need *ppblock != s_pCurBlock because of branches - if( pblock->pFnptr != 0 && pblock->startpc != s_pCurBlock->startpc ) { - - if( !delayslot && pc == pblock->startpc ) { - // code already in place, so jump to it and exit recomp - assert( PC_GETBLOCKEX(pblock)->startpc == pblock->startpc ); - - iFlushCall(FLUSH_EVERYTHING); - MOV32ItoM((uptr)&cpuRegs.pc, pc); - -// if( pexblock->pOldFnptr ) { -// // code already in place, so jump to it and exit recomp -// JMP32((u32)pexblock->pOldFnptr - ((u32)x86Ptr + 5)); -// branch = 3; -// return; -// } - - JMP32((uptr)pblock->pFnptr - ((uptr)x86Ptr + 5)); - branch = 3; - return; - } - else { - - if( !(delayslot && pblock->startpc == pc) ) { - s8* oldX86 = x86Ptr; - //__Log("clear block %x\n", pblock->startpc); - recClearMem(pblock); - x86Ptr = oldX86; - if( delayslot ) - SysPrintf("delay slot %x\n", pc); - } - } - } - - if( delayslot ) - pblock->uType = BLOCKTYPE_DELAYSLOT; - - s_pCode = (int *)PSM( pc ); - assert(s_pCode); - -#ifdef _DEBUG - MOV32ItoR(EAX, pc); -#endif - - cpuRegs.code = *(int *)s_pCode; - s_nBlockCycles++; - pc += 4; - -//#ifdef _DEBUG -// CMP32ItoM((u32)s_pCode, cpuRegs.code); -// j8Ptr[0] = JE8(0); -// MOV32ItoR(EAX, pc); -// CALLFunc((uptr)checkcodefn); -// x86SetJ8( j8Ptr[ 0 ] ); -// -// if( !delayslot ) { -// CMP32ItoM((uptr)&cpuRegs.pc, s_pCurBlockEx->startpc); -// j8Ptr[0] = JB8(0); -// CMP32ItoM((uptr)&cpuRegs.pc, pc); -// j8Ptr[1] = JA8(0); -// j8Ptr[2] = JMP8(0); -// x86SetJ8( j8Ptr[ 0 ] ); -// x86SetJ8( j8Ptr[ 1 ] ); -// PUSH32I(s_pCurBlockEx->startpc); -// CALLFunc((uptr)checkpchanged); -// ADD32ItoR(ESP, 4); -// x86SetJ8( j8Ptr[ 2 ] ); -// } -//#endif - - g_pCurInstInfo++; - - // reorder register priorities - for(i = 0; i < X86REGS; ++i) { - if( x86regs[i].inuse ) { - if( x86regs[i].type == X86TYPE_GPR ) { - count = _recIsRegWritten(g_pCurInstInfo, (s_nEndBlock-pc)/4 + 1, XMMTYPE_GPRREG, x86regs[i].reg); - if( count > 0 ) x86regs[i].counter = 1000-count; - else x86regs[i].counter = 0; - } - else x86regs[i].counter = 0; - } - } - - for(i = 0; i < XMMREGS; ++i) { - if( xmmregs[i].inuse ) { - count = _recIsRegWritten(g_pCurInstInfo, (s_nEndBlock-pc)/4 + 1, xmmregs[i].type, xmmregs[i].reg); - if( count > 0 ) xmmregs[i].counter = 1000-count; - else xmmregs[i].counter = 0; - } - } - - // peephole optimizations - if( g_pCurInstInfo->info & EEINSTINFO_COREC ) { - -#ifdef PCSX2_VIRTUAL_MEM - if( g_pCurInstInfo->numpeeps > 1 ) { - switch(cpuRegs.code>>26) { - case 30: recLQ_coX(g_pCurInstInfo->numpeeps); break; - case 31: recSQ_coX(g_pCurInstInfo->numpeeps); break; - case 49: recLWC1_coX(g_pCurInstInfo->numpeeps); break; - case 57: recSWC1_coX(g_pCurInstInfo->numpeeps); break; - case 55: recLD_coX(g_pCurInstInfo->numpeeps); break; - case 63: recSD_coX(g_pCurInstInfo->numpeeps, 1); break; //not sure if should be set to 1 or 0; looks like "1" handles alignment, so i'm going with that for now - default: - assert(0); - } - - pc += g_pCurInstInfo->numpeeps*4; - s_nBlockCycles += g_pCurInstInfo->numpeeps; - g_pCurInstInfo += g_pCurInstInfo->numpeeps; - } - else { - recBSC_co[cpuRegs.code>>26](); - pc += 4; - s_nBlockCycles++; - g_pCurInstInfo++; - } -#else - assert(0); -#endif - } - else { - assert( !(g_pCurInstInfo->info & EEINSTINFO_NOREC) ); - - // if this instruction is a jump or a branch, exit right away - if( delayslot ) { - switch(cpuRegs.code>>26) { - case 1: - switch(_Rt_) { - case 0: case 1: case 2: case 3: case 0x10: case 0x11: case 0x12: case 0x13: - SysPrintf("branch %x in delay slot!\n", cpuRegs.code); - _clearNeededX86regs(); - _clearNeededXMMregs(); - return; - } - break; - - case 2: case 3: case 4: case 5: case 6: case 7: case 0x14: case 0x15: case 0x16: case 0x17: - SysPrintf("branch %x in delay slot!\n", cpuRegs.code); - _clearNeededX86regs(); - _clearNeededXMMregs(); - return; - } - } - recBSC[ cpuRegs.code >> 26 ](); - } - - if( !delayslot ) { - if( s_bFlushReg ) { - //if( !_flushUnusedConstReg() ) { - int flushed = 0; - if( !flushed && _getNumXMMwrite() > 2 ) _flushXMMunused(); - s_bFlushReg = !flushed; -// } -// else s_bFlushReg = 0; - } - else s_bFlushReg = 1; - } - else s_bFlushReg = 1; - - //CHECK_XMMCHANGED(); - _clearNeededX86regs(); - _clearNeededXMMregs(); - - // for now - _freeXMMregs(); - _flushCachedRegs(); - g_cpuHasConstReg = 0; -} - -//////////////////////////////////////////////////// -#include "R3000A.h" -#include "PsxCounters.h" -#include "PsxMem.h" -extern tIPU_BP g_BP; - -extern u32 psxdump; -extern s32 psxNextCounter; -extern u32 psxNextsCounter; -extern void iDumpPsxRegisters(u32 startpc, u32 temp); -extern Counter counters[6]; - -void iDumpRegisters(u32 startpc, u32 temp) -{ - int i; - char* pstr = temp ? "t" : ""; - const u32 dmacs[] = {0x8000, 0x9000, 0xa000, 0xb000, 0xb400, 0xc000, 0xc400, 0xc800, 0xd000, 0xd400 }; - extern char *disRNameGPR[]; - - __Log("%sreg: %x %x\n", pstr, startpc, cpuRegs.interrupt); - for(i = 1; i < 32; ++i) __Log("%s: %x_%x_%x_%x\n", disRNameGPR[i], cpuRegs.GPR.r[i].UL[3], cpuRegs.GPR.r[i].UL[2], cpuRegs.GPR.r[i].UL[1], cpuRegs.GPR.r[i].UL[0]); - //for(i = 0; i < 32; ++i) __Log("%sf%d: %f %x\n", pstr, i, fpuRegs.fpr[i].f, fpuRegs.fprc[i]); - //for(i = 1; i < 32; ++i) __Log("%svf%d: %f %f %f %f, vi: %x\n", pstr, i, VU0.VF[i].F[3], VU0.VF[i].F[2], VU0.VF[i].F[1], VU0.VF[i].F[0], VU0.VI[i].UL); - for(i = 0; i < 32; ++i) __Log("%sf%d: %x %x\n", pstr, i, fpuRegs.fpr[i].UL, fpuRegs.fprc[i]); - for(i = 1; i < 32; ++i) __Log("%svf%d: %x %x %x %x, vi: %x\n", pstr, i, VU0.VF[i].UL[3], VU0.VF[i].UL[2], VU0.VF[i].UL[1], VU0.VF[i].UL[0], VU0.VI[i].UL); - __Log("%svfACC: %x %x %x %x\n", pstr, VU0.ACC.UL[3], VU0.ACC.UL[2], VU0.ACC.UL[1], VU0.ACC.UL[0]); - __Log("%sLO: %x_%x_%x_%x, HI: %x_%x_%x_%x\n", pstr, cpuRegs.LO.UL[3], cpuRegs.LO.UL[2], cpuRegs.LO.UL[1], cpuRegs.LO.UL[0], - cpuRegs.HI.UL[3], cpuRegs.HI.UL[2], cpuRegs.HI.UL[1], cpuRegs.HI.UL[0]); - __Log("%sCycle: %x %x, Count: %x\n", pstr, cpuRegs.cycle, g_nextBranchCycle, cpuRegs.CP0.n.Count); - iDumpPsxRegisters(psxRegs.pc, temp); - - __Log("cyc11: %x %x; vu0: %x, vu1: %x\n", cpuRegs.sCycle[1], cpuRegs.eCycle[1], VU0.cycle, VU1.cycle); - - __Log("%scounters: %x %x; psx: %x %x\n", pstr, nextsCounter, nextCounter, psxNextsCounter, psxNextCounter); - for(i = 0; i < 4; ++i) { - __Log("eetimer%d: count: %x mode: %x target: %x %x; %x %x; %x %x %x %x\n", i, - counters[i].count, counters[i].mode, counters[i].target, counters[i].hold, counters[i].rate, - counters[i].interrupt, counters[i].Cycle, counters[i].sCycle, counters[i].CycleT, counters[i].sCycleT); - } - __Log("VIF0_STAT = %x, VIF1_STAT = %x\n", psHu32(0x3800), psHu32(0x3C00)); - __Log("ipu %x %x %x %x; bp: %x %x %x %x\n", psHu32(0x2000), psHu32(0x2010), psHu32(0x2020), psHu32(0x2030), g_BP.BP, g_BP.bufferhasnew, g_BP.FP, g_BP.IFC); - __Log("gif: %x %x %x\n", psHu32(0x3000), psHu32(0x3010), psHu32(0x3020)); - for(i = 0; i < ARRAYSIZE(dmacs); ++i) { - DMACh* p = (DMACh*)(PS2MEM_HW+dmacs[i]); - __Log("dma%d c%x m%x q%x t%x s%x\n", i, p->chcr, p->madr, p->qwc, p->tadr, p->sadr); - } - __Log("dmac %x %x %x %x\n", psHu32(DMAC_CTRL), psHu32(DMAC_STAT), psHu32(DMAC_RBSR), psHu32(DMAC_RBOR)); - __Log("intc %x %x\n", psHu32(INTC_STAT), psHu32(INTC_MASK)); - __Log("sif: %x %x %x %x %x\n", psHu32(0xf200), psHu32(0xf220), psHu32(0xf230), psHu32(0xf240), psHu32(0xf260)); -} - -extern u32 psxdump; - -static void printfn() -{ - static int lastrec = 0; - static int curcount = 0; - const int skip = 0; - - assert( !g_globalXMMSaved ); - -#ifdef _DEBUG - //__asm stmxcsr i - //assert( i = g_sseMXCSR ); -#endif - - if( (dumplog&2) ) {//&& lastrec != g_lastpc ) { - - curcount++; - - if( curcount > skip ) { - iDumpRegisters(g_lastpc, 1); - curcount = 0; - } - - lastrec = g_lastpc; - } -} - -u32 s_recblocks[] = {0}; - -void badespfn() { - assert(0); - SysPrintf("Bad esp!\n"); -} - -#define OPTIMIZE_COP2 0//CHECK_VU0REC - -void recRecompile( u32 startpc ) -{ - u32 i = 0; - u32 branchTo; - u32 willbranch3 = 0; - u32* ptr; - u32 usecop2; - -#ifdef _DEBUG - //dumplog |= 4; - if( dumplog & 4 ) - iDumpRegisters(startpc, 0); -#endif - - assert( startpc ); - - // if recPtr reached the mem limit reset whole mem - if ( ( (uptr)recPtr - (uptr)recMem ) >= REC_CACHEMEM-0x40000 || dumplog == 0xffffffff) { - recReset(); - } - if ( ( (uptr)recStackPtr - (uptr)recStack ) >= RECSTACK_SIZE-0x100 ) { -#ifdef _DEBUG - SysPrintf("stack reset\n"); -#endif - recReset(); - } - - s_pCurBlock = PC_GETBLOCK(startpc); - - if( s_pCurBlock->pFnptr ) { - // clear if already taken - assert( s_pCurBlock->startpc < startpc ); - recClearMem(s_pCurBlock); - } - - if( s_pCurBlock->startpc == startpc ) { - s_pCurBlockEx = PC_GETBLOCKEX(s_pCurBlock); - assert( s_pCurBlockEx->startpc == startpc ); - } - else { - s_pCurBlockEx = NULL; - for(i = 0; i < EE_NUMBLOCKS; ++i) { - if( recBlocks[(i+s_nNextBlock)%EE_NUMBLOCKS].size == 0 ) { - s_pCurBlockEx = recBlocks+(i+s_nNextBlock)%EE_NUMBLOCKS; - s_nNextBlock = (i+s_nNextBlock+1)%EE_NUMBLOCKS; - break; - } - } - - if( s_pCurBlockEx == NULL ) { - //SysPrintf("ee reset (blocks)\n"); - recReset(); - s_nNextBlock = 0; - s_pCurBlockEx = recBlocks; - } - - s_pCurBlockEx->startpc = startpc; - } - - x86SetPtr( recPtr ); - x86Align(16); - recPtr = x86Ptr; - - assert( (uptr)x86Ptr <= 0xffffffff ); - s_pCurBlock->pFnptr = (u32)x86Ptr; - s_pCurBlock->startpc = startpc; - - branch = 0; - - // reset recomp state variables - s_nBlockCycles = 0; - pc = startpc; - iCWstate = 0; - s_saveConstGPRreg = 0; - g_cpuHasConstReg = g_cpuFlushedConstReg = 1; - g_cpuPrevRegHasLive1 = g_cpuRegHasLive1 = 0xffffffff; - g_cpuPrevRegHasSignExt = g_cpuRegHasSignExt = 0; - _recClearWritebacks(); - assert( g_cpuConstRegs[0].UD[0] == 0 ); - - _initX86regs(); - _initXMMregs(); - -#ifdef _DEBUG - //CMP64MtoR(RSP, (uptr)&s_uSaveESP); - //j8Ptr[0] = JE8(0); - //CALLFunc((uptr)badespfn); - //x86SetJ8(j8Ptr[0]); - - // for debugging purposes - MOV32ItoM((uptr)&g_lastpc, pc); - CALLFunc((uptr)printfn); -#endif - - // go until the next branch - i = startpc; - s_nEndBlock = 0xffffffff; - s_nHasDelay = 0; - - while(1) { - BASEBLOCK* pblock = PC_GETBLOCK(i); - if( pblock->pFnptr != 0 && pblock->startpc != s_pCurBlock->startpc ) { - - if( i == pblock->startpc ) { - // branch = 3 - willbranch3 = 1; - s_nEndBlock = i; - break; - } - } - - cpuRegs.code = *(int *)PSM(i); - - switch(cpuRegs.code >> 26) { - case 0: // special - - if( _Funct_ == 8 || _Funct_ == 9 ) { // JR, JALR - s_nEndBlock = i + 8; - s_nHasDelay = 1; - goto StartRecomp; - } - - break; - case 1: // regimm - - if( _Rt_ < 4 || (_Rt_ >= 16 && _Rt_ < 20) ) { - // branches - if( _Rt_ == 2 || _Rt_ == 3 || _Rt_ == 18 || _Rt_ == 19 ) s_nHasDelay = 1; - else s_nHasDelay = 2; - - branchTo = _Imm_ * 4 + i + 4; - if( branchTo > startpc && branchTo < i ) s_nEndBlock = branchTo; - else s_nEndBlock = i+8; - - goto StartRecomp; - } - - break; - - case 2: // J - case 3: // JAL - s_nHasDelay = 1; - s_nEndBlock = i + 8; - goto StartRecomp; - - // branches - case 4: case 5: case 6: case 7: - case 20: case 21: case 22: case 23: - - if( (cpuRegs.code >> 26) >= 20 ) s_nHasDelay = 1; - else s_nHasDelay = 2; - - branchTo = _Imm_ * 4 + i + 4; - if( branchTo > startpc && branchTo < i ) s_nEndBlock = branchTo; - else s_nEndBlock = i+8; - - goto StartRecomp; - - case 16: // cp0 - if( _Rs_ == 16 ) { - if( _Funct_ == 24 ) { // eret - s_nEndBlock = i+4; - goto StartRecomp; - } - } - - break; - case 17: // cp1 - case 18: // cp2 - if( _Rs_ == 8 ) { - // BC1F, BC1T, BC1FL, BC1TL - // BC2F, BC2T, BC2FL, BC2TL - if( _Rt_ >= 2 ) s_nHasDelay = 1; - else s_nHasDelay = 2; - - branchTo = _Imm_ * 4 + i + 4; - if( branchTo > startpc && branchTo < i ) s_nEndBlock = branchTo; - else s_nEndBlock = i+8; - - goto StartRecomp; - } - break; - } - - i += 4; - } - -StartRecomp: - - // rec info // - { - EEINST* pcur; - - if( s_nInstCacheSize < (s_nEndBlock-startpc)/4+1 ) { - free(s_pInstCache); - s_nInstCacheSize = (s_nEndBlock-startpc)/4+10; - s_pInstCache = (EEINST*)malloc(sizeof(EEINST)*s_nInstCacheSize); - assert( s_pInstCache != NULL ); - } - - pcur = s_pInstCache + (s_nEndBlock-startpc)/4; - _recClearInst(pcur); - pcur->info = 0; - - for(i = s_nEndBlock; i > startpc; i -= 4 ) { - cpuRegs.code = *(int *)PSM(i-4); - pcur[-1] = pcur[0]; - rpropBSC(pcur-1, pcur); - pcur--; - } - } - - // analyze instructions // - { - usecop2 = 0; - g_pCurInstInfo = s_pInstCache; - - for(i = startpc; i < s_nEndBlock; i += 4) { - g_pCurInstInfo++; - cpuRegs.code = *(u32*)PSM(i); - - // cop2 // - if( g_pCurInstInfo->info & EEINSTINFO_COP2 ) { - - if( !usecop2 ) { - // init - if( OPTIMIZE_COP2 ) { - memset(VU0.fmac,0,sizeof(VU0.fmac)); - memset(&VU0.fdiv,0,sizeof(VU0.fdiv)); - memset(&VU0.efu,0,sizeof(VU0.efu)); - } - vucycle = 0; - usecop2 = 1; - } - - VU0.code = cpuRegs.code; - _cop2AnalyzeOp(g_pCurInstInfo, OPTIMIZE_COP2); - continue; - } - - if( usecop2 ) vucycle++; - - // peephole optimizations // -#ifdef PCSX2_VIRTUAL_MEM - if( i < s_nEndBlock-4 && recompileCodeSafe(i) ) { - u32 curcode = cpuRegs.code; - u32 nextcode = *(u32*)PSM(i+4); - if( _eeIsLoadStoreCoIssue(curcode, nextcode) && recBSC_co[curcode>>26] != NULL ) { - - // rs has to be the same, and cannot be just written - if( ((curcode >> 21) & 0x1F) == ((nextcode >> 21) & 0x1F) && !_eeLoadWritesRs(curcode) ) { - - if( _eeIsLoadStoreCoX(curcode) && ((nextcode>>16)&0x1f) != ((curcode>>21)&0x1f) ) { - // see how many stores there are - u32 j; - // use xmmregs since only supporting lwc1,lq,swc1,sq - for(j = i+8; j < s_nEndBlock && j < i+4*XMMREGS; j += 4 ) { - u32 nncode = *(u32*)PSM(j); - if( (nncode>>26) != (curcode>>26) || ((curcode>>21)&0x1f) != ((nncode>>21)&0x1f) || - _eeLoadWritesRs(nncode)) - break; - } - - if( j > i+8 ) { - u32 num = (j-i)>>2; // number of stores that can coissue - assert( num <= XMMREGS ); - - g_pCurInstInfo[0].numpeeps = num-1; - g_pCurInstInfo[0].info |= EEINSTINFO_COREC; - - while(i < j-4) { - g_pCurInstInfo++; - g_pCurInstInfo[0].info |= EEINSTINFO_NOREC; - i += 4; - } - - continue; - } - - // fall through - } - - // unaligned loadstores - - // if LWL, check if LWR and that offsets are +3 away - switch(curcode >> 26) { - case 0x22: // LWL - if( (nextcode>>26) != 0x26 || ((s16)nextcode)+3 != (s16)curcode ) - continue; - break; - case 0x26: // LWR - if( (nextcode>>26) != 0x22 || ((s16)nextcode) != (s16)curcode+3 ) - continue; - break; - - case 0x2a: // SWL - if( (nextcode>>26) != 0x2e || ((s16)nextcode)+3 != (s16)curcode ) - continue; - break; - case 0x2e: // SWR - if( (nextcode>>26) != 0x2a || ((s16)nextcode) != (s16)curcode+3 ) - continue; - break; - - case 0x1a: // LDL - if( (nextcode>>26) != 0x1b || ((s16)nextcode)+7 != (s16)curcode ) - continue; - break; - case 0x1b: // LWR - if( (nextcode>>26) != 0x1aa || ((s16)nextcode) != (s16)curcode+7 ) - continue; - break; - - case 0x2c: // SWL - if( (nextcode>>26) != 0x2d || ((s16)nextcode)+7 != (s16)curcode ) - continue; - break; - case 0x2d: // SWR - if( (nextcode>>26) != 0x2c || ((s16)nextcode) != (s16)curcode+7 ) - continue; - break; - } - - // good enough - g_pCurInstInfo[0].info |= EEINSTINFO_COREC; - g_pCurInstInfo[0].numpeeps = 1; - g_pCurInstInfo[1].info |= EEINSTINFO_NOREC; - g_pCurInstInfo++; - i += 4; - continue; - } - } - } -#endif // end peephole - } - - if( usecop2 ) { - // add necessary mac writebacks - g_pCurInstInfo = s_pInstCache; - - for(i = startpc; i < s_nEndBlock-4; i += 4) { - g_pCurInstInfo++; - - if( g_pCurInstInfo->info & EEINSTINFO_COP2 ) { - } - } - } - } - - // perf counters // -#ifdef PCSX2_DEVBUILD -// s_startcount = 0; -// if( pc+32 < s_nEndBlock ) { -// // only blocks with more than 8 insts -// //PUSH32I((uptr)&lbase); -// //CALLFunc((uptr)QueryPerformanceCounter); -// lbase.QuadPart = GetCPUTick(); -// s_startcount = 1; -// } -#endif - -#ifdef _DEBUG - // dump code - for(i = 0; i < ARRAYSIZE(s_recblocks); ++i) { - if( startpc == s_recblocks[i] ) { - iDumpBlock(startpc, recPtr); - } - } - - if( (dumplog & 1) ) //|| usecop2 ) - iDumpBlock(startpc, recPtr); -#endif - - // finally recompile // - g_pCurInstInfo = s_pInstCache; - while (!branch && pc < s_nEndBlock) { - recompileNextInstruction(0); - } - -#ifdef _DEBUG - if( (dumplog & 1) ) - iDumpBlock(startpc, recPtr); -#endif - - assert( (pc-startpc)>>2 <= 0xffff ); - s_pCurBlockEx->size = (pc-startpc)>>2; - - for(i = 1; i < (u32)s_pCurBlockEx->size-1; ++i) { - s_pCurBlock[i].pFnptr = s_pCurBlock->pFnptr; - s_pCurBlock[i].startpc = s_pCurBlock->startpc; - } - - // don't overwrite if delay slot - if( i < (u32)s_pCurBlockEx->size && !(s_pCurBlock[i].uType & BLOCKTYPE_DELAYSLOT) ) { - s_pCurBlock[i].pFnptr = s_pCurBlock->pFnptr; - s_pCurBlock[i].startpc = s_pCurBlock->startpc; - } - - // set the block ptr - AddBaseBlockEx(s_pCurBlockEx, 0); -// if( p[1].startpc == p[0].startpc + 4 ) { -// assert( p[1].pFnptr != 0 ); -// // already fn in place, so add to list -// AddBaseBlockEx(s_pCurBlockEx, 0); -// } -// else -// *(BASEBLOCKEX**)(p+1) = pex; -// } - - //PC_SETBLOCKEX(s_pCurBlock, s_pCurBlockEx); - - if( !(pc&0x10000000) ) - maxrecmem = max( (pc&~0xa0000000), maxrecmem ); - - if( branch == 2 ) { - iFlushCall(FLUSH_EVERYTHING); - - iBranchTest(0xffffffff, 1); - if( bExecBIOS ) CheckForBIOSEnd(); - - JMP32((uptr)DispatcherReg - ( (uptr)x86Ptr + 5 )); - } - else { - assert( branch != 3 ); - if( branch ) assert( !willbranch3 ); - else ADD32ItoM((uptr)&cpuRegs.cycle, s_nBlockCycles*9/8); - - if( willbranch3 ) { - BASEBLOCK* pblock = PC_GETBLOCK(s_nEndBlock); - assert( pc == s_nEndBlock ); - iFlushCall(FLUSH_EVERYTHING); - MOV32ItoM((uptr)&cpuRegs.pc, pc); - JMP32((uptr)pblock->pFnptr - ((uptr)x86Ptr + 5)); - branch = 3; - } - else if( !branch ) { - // didn't branch, but had to stop - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - - iFlushCall(FLUSH_EVERYTHING); - - ptr = JMP32(0); - } - } - - assert( x86Ptr >= (s8*)s_pCurBlock->pFnptr + EE_MIN_BLOCK_BYTES ); - assert( x86Ptr < recMem+REC_CACHEMEM ); - assert( recStackPtr < recStack+RECSTACK_SIZE ); - assert( x86FpuState == 0 ); - - recPtr = x86Ptr; - - assert( (g_cpuHasConstReg&g_cpuFlushedConstReg) == g_cpuHasConstReg ); - - if( !branch ) { - BASEBLOCK* pcurblock = s_pCurBlock; - u32 nEndBlock = s_nEndBlock; - s_pCurBlock = PC_GETBLOCK(pc); - assert( ptr != NULL ); - - if( s_pCurBlock->startpc != pc ) - recRecompile(pc); - - if( pcurblock->startpc == startpc ) { - assert( pcurblock->pFnptr ); - assert( s_pCurBlock->startpc == nEndBlock ); - *ptr = s_pCurBlock->pFnptr - ( (uptr)ptr + 4 ); - } - else { - recRecompile(startpc); - assert( pcurblock->pFnptr != 0 ); - } - } -} - -R5900cpu recCpu = { - recInit, - recReset, - recStep, - recExecute, - recExecuteBlock, - recExecuteVU0Block, - recExecuteVU1Block, - recEnableVU0micro, - recEnableVU1micro, - recClear, - recClearVU0, - recClearVU1, - recShutdown -}; - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900Arit-64.c b/pcsx2/x86/ix86-64/iR5900Arit-64.c deleted file mode 100644 index cef80e2518..0000000000 --- a/pcsx2/x86/ix86-64/iR5900Arit-64.c +++ /dev/null @@ -1,213 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Register arithmetic * -* Format: OP rd, rs, rt * -*********************************************************/ - -#ifndef ARITHMETIC_RECOMPILE - -REC_FUNC(ADD); -REC_FUNC(ADDU); -REC_FUNC(DADD); -REC_FUNC(DADDU); -REC_FUNC(SUB); -REC_FUNC(SUBU); -REC_FUNC(DSUB); -REC_FUNC(DSUBU); -REC_FUNC(AND); -REC_FUNC(OR); -REC_FUNC(XOR); -REC_FUNC(NOR); -REC_FUNC(SLT); -REC_FUNC(SLTU); - -#else - -//////////////////////////////////////////////////// -void recADD( void ) { - if (!_Rd_) return; - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if (_Rt_ != 0) { - ADD32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recADDU( void ) -{ - recADD( ); -} - -//////////////////////////////////////////////////// -void recDADD( void ) { - if (!_Rd_) return; - - MOV64MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Rt_ != 0 ) { - ADD64MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - } - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); -} - -//////////////////////////////////////////////////// -void recDADDU( void ) -{ - recDADD( ); -} - -//////////////////////////////////////////////////// -void recSUB( void ) { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Rt_ != 0 ) { - SUB32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recSUBU( void ) -{ - recSUB( ); -} - -//////////////////////////////////////////////////// -void recDSUB( void ) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Rt_ != 0 ) { - SUB64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - } - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSUBU( void ) -{ - recDSUB( ); -} - -//////////////////////////////////////////////////// -void recAND( void ) { - if (!_Rd_) return; - - if (_Rt_ == _Rd_) { // Rd&= Rs - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - AND64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } else if (_Rs_ == _Rd_) { // Rd&= Rt - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - AND64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } else { // Rd = Rs & Rt - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - AND64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } -} - -//////////////////////////////////////////////////// -void recOR( void ) { - if (!_Rd_) return; - - if ( ( _Rs_ == 0 ) && ( _Rt_ == 0 ) ) { - XOR64RtoR(RAX, RAX); - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[0], RAX ); - } else if ( _Rs_ == 0 ) { - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } - else if ( _Rt_ == 0 ) { - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } - else { - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - OR64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); - } -} - -//////////////////////////////////////////////////// -void recXOR( void ) { - if (!_Rd_) return; - - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - XOR64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); -} - -//////////////////////////////////////////////////// -void recNOR( void ) { - if (!_Rd_) return; - - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - OR64MtoR(RAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - NOT64R(RAX); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); -} - -//////////////////////////////////////////////////// -void recSLT( void ) { - if (!_Rd_) return; - - MOV64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - CMP64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - SETL8R (EAX); - AND64I32toR(EAX, 0xff); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX); -} - -//////////////////////////////////////////////////// -void recSLTU( void ) { - if (!_Rd_) return; - - MOV64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rs_].UL[0]); - CMP64MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - SBB64RtoR(EAX, EAX); - NEG64R (EAX); - MOV64RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], RAX); -} - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900AritImm-64.c b/pcsx2/x86/ix86-64/iR5900AritImm-64.c deleted file mode 100644 index 4c31f31882..0000000000 --- a/pcsx2/x86/ix86-64/iR5900AritImm-64.c +++ /dev/null @@ -1,167 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Arithmetic with immediate operand * -* Format: OP rt, rs, immediate * -*********************************************************/ -#ifndef ARITHMETICIMM_RECOMPILE - -REC_FUNC(ADDI); -REC_FUNC(ADDIU); -REC_FUNC(DADDI); -REC_FUNC(DADDIU); -REC_FUNC(ANDI); -REC_FUNC(ORI); -REC_FUNC(XORI); - -REC_FUNC(SLTI); -REC_FUNC(SLTIU); - -#else - -//////////////////////////////////////////////////// -void recADDI( void ) { - if (!_Rt_) return; - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if (_Imm_ != 0) { - ADD32ItoR( EAX, _Imm_ ); - } - - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recADDIU( void ) -{ - recADDI( ); -} - -//////////////////////////////////////////////////// -void recDADDI( void ) { - - if (!_Rt_) return; - - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD64ItoR( EAX, _Imm_ ); - } - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDADDIU( void ) -{ - recDADDI( ); -} - -//////////////////////////////////////////////////// -void recSLTIU( void ) -{ - if ( ! _Rt_ ) return; - - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - CMP64I32toR(RAX, _Imm_); - SETB8R (EAX); - AND64I32toR(EAX, 0xff); - MOV64RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX); -} - -//////////////////////////////////////////////////// -void recSLTI( void ) -{ - if ( ! _Rt_ ) - return; - - MOV64MtoR(RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - CMP64I32toR(RAX, _Imm_); - SETL8R (EAX); - AND64I32toR(EAX, 0xff); - MOV64RtoM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX); -} - -//////////////////////////////////////////////////// -void recANDI( void ) { - if (!_Rt_) return; - - if ( _ImmU_ != 0 ) { - if (_Rs_ == _Rt_) { - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); - AND32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], _ImmU_ ); - } - else { - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( EAX, _ImmU_ ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], EAX ); - } - } - else { - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 1 ], 0 ); - MOV32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], 0 ); - } -} - -//////////////////////////////////////////////////// -void recORI( void ) { - if (!_Rt_) return; - - if (_Rs_ == _Rt_) { - OR32ItoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], _ImmU_ ); - } else { - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ] ); - if ( _ImmU_ != 0 ) { - OR64ItoR( RAX, _ImmU_ ); - } - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], RAX ); - } -} - -//////////////////////////////////////////////////// -void recXORI( void ) { - if (!_Rt_) return; - - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UD[ 0 ] ); - XOR64ItoR( RAX, _ImmU_ ); - MOV64RtoM( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ], RAX ); -} - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900Branch-64.c b/pcsx2/x86/ix86-64/iR5900Branch-64.c deleted file mode 100644 index da71fba46a..0000000000 --- a/pcsx2/x86/ix86-64/iR5900Branch-64.c +++ /dev/null @@ -1,537 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Register branch logic * -* Format: OP rs, rt, offset * -*********************************************************/ -#ifndef BRANCH_RECOMPILE - -REC_SYS(BEQ); -REC_SYS(BEQL); -REC_SYS(BNE); -REC_SYS(BNEL); -REC_SYS(BLTZ); -REC_SYS(BGTZ); -REC_SYS(BLEZ); -REC_SYS(BGEZ); -REC_SYS(BGTZL); -REC_SYS(BLTZL); -REC_SYS(BLTZAL); -REC_SYS(BLTZALL); -REC_SYS(BLEZL); -REC_SYS(BGEZL); -REC_SYS(BGEZAL); -REC_SYS(BGEZALL); - -#else - -u32 target; -//////////////////////////////////////////////////// -void recBEQ( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - if ( _Rs_ == _Rt_ ) - { - _clearNeededX86regs(); - _clearNeededXMMregs(); - recompileNextInstruction(1); - SetBranchImm( branchTo ); - } - else - { - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - j32Ptr[ 0 ] = JNE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - pc -= 4; - LoadBranchState(); - recompileNextInstruction(1); - - SetBranchImm(pc); - } -} - -//////////////////////////////////////////////////// -void recBNE( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - if ( _Rs_ == _Rt_ ) - { - _clearNeededX86regs(); - _clearNeededXMMregs(); - recompileNextInstruction(1); - SetBranchImm(pc); - return; - } - - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - j32Ptr[ 0 ] = JE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - pc -= 4; - LoadBranchState(); - recompileNextInstruction(1); - - SetBranchImm(pc); -} - -/********************************************************* -* Register branch logic * -* Format: OP rs, offset * -*********************************************************/ - -//////////////////////////////////////////////////// -void recBLTZAL( void ) -{ - SysPrintf("BLTZAL\n"); - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - iFlushCall(FLUSH_EVERYTHING); - CALLFunc( (uptr)BLTZAL ); - branch = 2; -} - -//////////////////////////////////////////////////// -void recBGEZAL( void ) -{ - SysPrintf("BGEZAL\n"); - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - iFlushCall(FLUSH_EVERYTHING); - CALLFunc( (uptr)BGEZAL ); - branch = 2; -} - -//////////////////////////////////////////////////// -void recBLEZ( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] <= 0) ) - branchTo = pc+4; - - recompileNextInstruction(1); - SetBranchImm( branchTo ); - return; - } - - _deleteEEreg(_Rs_, 1); - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JL32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - pc -= 4; - LoadBranchState(); - recompileNextInstruction(1); - - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBGTZ( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] > 0) ) - branchTo = pc+4; - - recompileNextInstruction(1); - SetBranchImm( branchTo ); - return; - } - - _deleteEEreg(_Rs_, 1); - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JGE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - pc -= 4; - LoadBranchState(); - recompileNextInstruction(1); - - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBLTZ( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] < 0) ) - branchTo = pc+4; - - recompileNextInstruction(1); - SetBranchImm( branchTo ); - return; - } - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JLE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - pc -= 4; - LoadBranchState(); - recompileNextInstruction(1); - - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBGEZ( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] >= 0) ) - branchTo = pc+4; - - recompileNextInstruction(1); - SetBranchImm( branchTo ); - return; - } - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JG32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - pc -= 4; - LoadBranchState(); - recompileNextInstruction(1); - - SetBranchImm(pc); -} - -/********************************************************* -* Register branch logic Likely * -* Format: OP rs, offset * -*********************************************************/ - -//////////////////////////////////////////////////// -void recBLEZL( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] <= 0) ) - SetBranchImm( pc + 4); - else { - _clearNeededX86regs(); - _clearNeededXMMregs(); - recompileNextInstruction(1); - SetBranchImm( branchTo ); - } - return; - } - - _deleteEEreg(_Rs_, 1); - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JL32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - LoadBranchState(); - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBGTZL( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] > 0) ) - SetBranchImm( pc + 4); - else { - _clearNeededX86regs(); - _clearNeededXMMregs(); - recompileNextInstruction(1); - SetBranchImm( branchTo ); - } - return; - } - - _deleteEEreg(_Rs_, 1); - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JGE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - LoadBranchState(); - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBLTZL( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] < 0) ) - SetBranchImm( pc + 4); - else { - recompileNextInstruction(1); - SetBranchImm( branchTo ); - } - return; - } - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JLE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - LoadBranchState(); - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBGEZL( void ) -{ -u32 branchTo = ((s32)_Imm_ * 4) + pc; - - _eeFlushAllUnused(); - - if( GPR_IS_CONST1(_Rs_) ) { - if( !(g_cpuConstRegs[_Rs_].SD[0] >= 0) ) - SetBranchImm( pc + 4); - else { - recompileNextInstruction(1); - SetBranchImm( branchTo ); - } - return; - } - - XOR64RtoR(RAX, RAX); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ]); - j32Ptr[ 0 ] = JG32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - LoadBranchState(); - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBLTZALL( void ) -{ - SysPrintf("BLTZALL\n"); - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - iFlushCall(FLUSH_EVERYTHING); - CALLFunc( (uptr)BLTZALL ); - branch = 2; -} - -//////////////////////////////////////////////////// -void recBGEZALL( void ) -{ - SysPrintf("BGEZALL\n"); - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - iFlushCall(FLUSH_EVERYTHING); - CALLFunc( (uptr)BGEZALL ); - branch = 2; -} - -//////////////////////////////////////////////////// -void recBEQL( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - j32Ptr[ 0 ] = JNE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - recompileNextInstruction(1); - SetBranchImm(branchTo); - - x86SetJ32( j32Ptr[ 0 ] ); - - LoadBranchState(); - SetBranchImm(pc); -} - -//////////////////////////////////////////////////// -void recBNEL( void ) -{ - u32 branchTo = ((s32)_Imm_ * 4) + pc; - - MOV64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - CMP64MtoR( RAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - j32Ptr[ 0 ] = JNE32( 0 ); - - _clearNeededX86regs(); - _clearNeededXMMregs(); - - SaveBranchState(); - SetBranchImm(pc+4); - - x86SetJ32( j32Ptr[ 0 ] ); - - // recopy the next inst - LoadBranchState(); - recompileNextInstruction(1); - SetBranchImm(branchTo); -} - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900Jump-64.c b/pcsx2/x86/ix86-64/iR5900Jump-64.c deleted file mode 100644 index d746fefceb..0000000000 --- a/pcsx2/x86/ix86-64/iR5900Jump-64.c +++ /dev/null @@ -1,114 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Jump to target * -* Format: OP target * -*********************************************************/ -#ifndef JUMP_RECOMPILE - -REC_SYS(J); -REC_SYS(JAL); -REC_SYS(JR); -REC_SYS(JALR); - -#else - -//////////////////////////////////////////////////// -void recJ( void ) -{ - u32 newpc = (_Target_ << 2) + ( pc & 0xf0000000 ); - recompileNextInstruction(1); - SetBranchImm(newpc); -} - -//////////////////////////////////////////////////// -void recJAL( void ) -{ - u32 newpc = (_Target_ << 2) + ( pc & 0xf0000000 ); - _deleteEEreg(31, 0); - GPR_SET_CONST(31); - g_cpuConstRegs[31].UL[0] = pc + 4; - g_cpuConstRegs[31].UL[1] = 0; - - recompileNextInstruction(1); - SetBranchImm(newpc); -} - -/********************************************************* -* Register jump * -* Format: OP rs, rd * -*********************************************************/ - -//////////////////////////////////////////////////// -void recJR( void ) -{ - SetBranchReg( _Rs_ ); -} - -//////////////////////////////////////////////////// -void recJALR( void ) -{ - _allocX86reg(ESI, X86TYPE_PCWRITEBACK, 0, MODE_WRITE); - _eeMoveGPRtoR(ESI, _Rs_); - - if ( _Rd_ ) { - _deleteEEreg(_Rd_, 0); - GPR_SET_CONST(_Rd_); - g_cpuConstRegs[_Rd_].UL[0] = pc + 4; - g_cpuConstRegs[_Rd_].UL[1] = 0; - } - - _clearNeededX86regs(); - _clearNeededXMMregs(); - recompileNextInstruction(1); - - if( x86regs[ESI].inuse ) { - assert( x86regs[ESI].type == X86TYPE_PCWRITEBACK ); - MOV32RtoM((uptr)&cpuRegs.pc, ESI); - x86regs[ESI].inuse = 0; - } - else { - MOV32MtoR(EAX, (uptr)&g_recWriteback); - MOV32RtoM((uptr)&cpuRegs.pc, EAX); - } - - SetBranchReg(0xffffffff); -} - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900LoadStore-64.c b/pcsx2/x86/ix86-64/iR5900LoadStore-64.c deleted file mode 100644 index bddeb4ba43..0000000000 --- a/pcsx2/x86/ix86-64/iR5900LoadStore-64.c +++ /dev/null @@ -1,418 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" -#include "VU0.h" - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Load and store for GPR * -* Format: OP rt, offset(base) * -*********************************************************/ -#ifndef LOADSTORE_RECOMPILE - -REC_FUNC(LB); -REC_FUNC(LBU); -REC_FUNC(LH); -REC_FUNC(LHU); -REC_FUNC(LW); -REC_FUNC(LWU); -REC_FUNC(LWL); -REC_FUNC(LWR); -REC_FUNC(LD); -REC_FUNC(LDR); -REC_FUNC(LDL); -REC_FUNC(LQ); -REC_FUNC(SB); -REC_FUNC(SH); -REC_FUNC(SW); -REC_FUNC(SWL); -REC_FUNC(SWR); -REC_FUNC(SD); -REC_FUNC(SDL); -REC_FUNC(SDR); -REC_FUNC(SQ); -REC_FUNC(LWC1); -REC_FUNC(SWC1); -REC_FUNC(LQC2); -REC_FUNC(SQC2); - -void SetFastMemory(int bSetFast) {} - -#else - -static int s_bFastMemory = 0; -void SetFastMemory(int bSetFast) -{ - s_bFastMemory = bSetFast; -} - -u64 retValue; -u64 dummyValue[ 4 ]; - -//////////////////////////////////////////////////// -void recLB( void ) { - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - CALLFunc( (uptr)memRead8RS ); -} - -//////////////////////////////////////////////////// -void recLBU( void ) { - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - iFlushCall(FLUSH_EVERYTHING); - CALLFunc((uptr)memRead8RU ); -} - -//////////////////////////////////////////////////// -void recLH( void ) { - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ){ - ADD32ItoR( X86ARG1, _Imm_ ); - } - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - iFlushCall(FLUSH_EVERYTHING); - CALLFunc((uptr)memRead16RS ); -} - -//////////////////////////////////////////////////// -void recLHU( void ) { - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - CALLFunc((uptr)memRead16RU ); -} - -void tests() { - SysPrintf("Err\n"); -} - -//////////////////////////////////////////////////// -void recLW( void ) { - - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - CALLFunc((uptr)memRead32RS ); -} - -//////////////////////////////////////////////////// -void recLWU( void ) { - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - CALLFunc((uptr)memRead32RU ); -} - -void recLWL( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)LWL ); -} - -void recLWR( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)LWR ); -} - -void recLD( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } - else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - CALLFunc((uptr)memRead64 ); -} - -void recLDL( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)LDL ); -} - -void recLDR( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)LDR ); -} - -void recLQ( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_); - } - AND32ItoR( X86ARG1, ~0xf ); - - if ( _Rt_ ) { - MOV64ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - } else { - MOV64ItoR( X86ARG2, (uptr)&dummyValue ); - } - CALLFunc((uptr)memRead128 ); -} - -//////////////////////////////////////////////////// -void recSB( void ) { - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_); - } - MOV32MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - CALLFunc((uptr)memWrite8 ); -} - -void recSH( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - MOV32MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - CALLFunc((uptr)memWrite16 ); -} - -void recSW( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - MOV32MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - CALLFunc((uptr)memWrite32 ); -} - -void recSWL( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)SWL ); -} - -void recSWR( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)SWR ); -} - -void recSD( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - MOV64MtoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - CALLFunc((uptr)memWrite64 ); -} - -void recSDL( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)SDL ); -} - -void recSDR( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32ItoM( (uptr)&cpuRegs.code, cpuRegs.code ); - MOV32ItoM( (uptr)&cpuRegs.pc, pc ); - CALLFunc((uptr)SDR ); -} - -void recSQ( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) { - ADD32ItoR( X86ARG1, _Imm_ ); - } - AND32ItoR( X86ARG1, ~0xf ); - - MOV32ItoR( X86ARG2, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UD[ 0 ] ); - CALLFunc((uptr)memWrite128 ); -} - -#define _Ft_ _Rt_ -#define _Fs_ _Rd_ -#define _Fd_ _Sa_ - -// Load and store for COP1 -// Format: OP rt, offset(base) -void recLWC1( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) - ADD32ItoR( X86ARG1, _Imm_ ); - MOV64ItoR( X86ARG2, (uptr)&fpuRegs.fpr[ _Ft_ ].UL ); - - CALLFunc((uptr)memRead32 ); -} - -void recSWC1( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) - ADD32ItoR( X86ARG1, _Imm_ ); - - MOV32MtoR( X86ARG2, (uptr)&fpuRegs.fpr[ _Ft_ ].UL ); - - CALLFunc((uptr)memWrite32 ); -} - -void recLQC2( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) - ADD32ItoR( X86ARG1, _Imm_); - - if ( _Rt_ ) - MOV64ItoR(X86ARG2, (uptr)&VU0.VF[_Ft_].UD[0] ); - else - MOV64ItoR(X86ARG2, (uptr)&dummyValue ); - - CALLFunc((uptr)memRead128 ); -} - -void recSQC2( void ) -{ - iFlushCall(FLUSH_EVERYTHING); - - MOV32MtoR( X86ARG1, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - if ( _Imm_ != 0 ) - ADD32ItoR( X86ARG1, _Imm_ ); - - MOV64ItoR(X86ARG2, (uptr)&VU0.VF[_Ft_].UD[0] ); - - CALLFunc((uptr)memWrite128 ); -} - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900Move-64.c b/pcsx2/x86/ix86-64/iR5900Move-64.c deleted file mode 100644 index 90b64aaeb6..0000000000 --- a/pcsx2/x86/ix86-64/iR5900Move-64.c +++ /dev/null @@ -1,84 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Shift arithmetic with constant shift * -* Format: OP rd, rt, sa * -*********************************************************/ -#ifndef MOVE_RECOMPILE - -REC_FUNC(LUI); -REC_FUNC(MFLO); -REC_FUNC(MFHI); -REC_FUNC(MTLO); -REC_FUNC(MTHI); -REC_FUNC(MOVZ); -REC_FUNC(MOVN); - -REC_FUNC( MFHI1 ); -REC_FUNC( MFLO1 ); -REC_FUNC( MTHI1 ); -REC_FUNC( MTLO1 ); - -#else -REC_FUNC(MFLO, _Rd_); -REC_FUNC(MFHI, _Rd_); -REC_FUNC(MTLO, 0); -REC_FUNC(MTHI, 0); -REC_FUNC(MOVZ, _Rd_); -REC_FUNC(MOVN, _Rd_); - -REC_FUNC( MFHI1, _Rd_ ); -REC_FUNC( MFLO1, _Rd_ ); -REC_FUNC( MTHI1, 0 ); -REC_FUNC( MTLO1, 0 ); - -/********************************************************* -* Load higher 16 bits of the first word in GPR with imm * -* Format: OP rt, immediate * -*********************************************************/ - -//////////////////////////////////////////////////// -void recLUI( void ) { - - if (!_Rt_) return; - - MOV64I32toM((uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ], (s32)(_Imm_ << 16)); -} - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900MultDiv-64.c b/pcsx2/x86/ix86-64/iR5900MultDiv-64.c deleted file mode 100644 index 0477ba990a..0000000000 --- a/pcsx2/x86/ix86-64/iR5900MultDiv-64.c +++ /dev/null @@ -1,164 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Register mult/div & Register trap logic * -* Format: OP rs, rt * -*********************************************************/ -#ifndef MULTDIV_RECOMPILE - -REC_FUNC(MULT); -REC_FUNC(MULTU); -REC_FUNC( MULT1 ); -REC_FUNC( MULTU1 ); - -REC_FUNC(DIV); -REC_FUNC(DIVU); -REC_FUNC( DIV1 ); -REC_FUNC( DIVU1 ); - -REC_FUNC( MADD ); -REC_FUNC( MADDU ); -REC_FUNC( MADD1 ); -REC_FUNC( MADDU1 );; - -#else - -//////////////////////////////////////////////////// -void recMULT( void ) -{ - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - IMUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - - MOV32RtoR( ECX, EDX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX ); - if ( _Rd_ ) - { - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - MOV32RtoR( EAX, ECX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recMULTU( void ) -{ - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - MUL32M( (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - - MOV32RtoR( ECX, EDX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX ); - if ( _Rd_ != 0 ) - { - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); - } - MOV32RtoR( EAX, ECX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], ECX ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX ); -} - -REC_FUNC( MULT1, _Rd_ ); -REC_FUNC( MULTU1, _Rd_ ); - -//////////////////////////////////////////////////// -void recDIV( void ) -{ - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - OR32RtoR( ECX, ECX ); - j8Ptr[ 0 ] = JE8( 0 ); - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); -// XOR32RtoR( EDX,EDX ); - CDQ(); - IDIV32R( ECX ); - - MOV32RtoR( ECX, EDX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX ); - - MOV32RtoR( EAX, ECX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], ECX ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX ); - - x86SetJ8( j8Ptr[ 0 ] ); -} - -//////////////////////////////////////////////////// -void recDIVU( void ) -{ - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - OR32RtoR( ECX, ECX ); - j8Ptr[ 0 ] = JE8( 0 ); - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - XOR32RtoR( EDX, EDX ); - // CDQ(); - DIV32R( ECX ); - - MOV32RtoR( ECX, EDX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.LO.UL[ 1 ], EDX ); - - MOV32RtoR( EAX,ECX ); - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 0 ], ECX ); - MOV32RtoM( (uptr)&cpuRegs.HI.UL[ 1 ], EDX ); - x86SetJ8( j8Ptr[ 0 ] ); -} - -REC_FUNC( DIV1, _Rd_ ); -REC_FUNC( DIVU1, _Rd_ ); - -REC_FUNC( MADD, _Rd_ ); -REC_FUNC( MADDU, _Rd_ ); -REC_FUNC( MADD1, _Rd_ ); -REC_FUNC( MADDU1, _Rd_ ); - -#endif - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86-64/iR5900Shift-64.c b/pcsx2/x86/ix86-64/iR5900Shift-64.c deleted file mode 100644 index 75ea9f37fd..0000000000 --- a/pcsx2/x86/ix86-64/iR5900Shift-64.c +++ /dev/null @@ -1,264 +0,0 @@ -/* Pcsx2 - Pc Ps2 Emulator - * Copyright (C) 2002-2008 Pcsx2 Team - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA - */ - -// stop compiling if NORECBUILD build (only for Visual Studio) -#if !(defined(_MSC_VER) && defined(PCSX2_NORECBUILD)) - -#include -#include -#include - -#include "Common.h" -#include "InterTables.h" -#include "ix86/ix86.h" -#include "iR5900.h" - - -#ifdef _WIN32 -#pragma warning(disable:4244) -#pragma warning(disable:4761) -#endif - -/********************************************************* -* Shift arithmetic with constant shift * -* Format: OP rd, rt, sa * -*********************************************************/ -#ifndef SHIFT_RECOMPILE - -REC_FUNC(SLL); -REC_FUNC(SRL); -REC_FUNC(SRA); -REC_FUNC(DSLL); -REC_FUNC(DSRL); -REC_FUNC(DSRA); -REC_FUNC(DSLL32); -REC_FUNC(DSRL32); -REC_FUNC(DSRA32); - -REC_FUNC(SLLV); -REC_FUNC(SRLV); -REC_FUNC(SRAV); -REC_FUNC(DSLLV); -REC_FUNC(DSRLV); -REC_FUNC(DSRAV); - -#else - - -//////////////////////////////////////////////////// -void recDSRA( void ) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Sa_ != 0 ) { - SAR64ItoR( RAX, _Sa_ ); - } - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSRA32(void) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - SAR64ItoR( RAX, _Sa_ + 32 ); - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recSLL(void) { - if (!_Rd_) return; - - MOV32MtoR(EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - if (_Sa_ != 0) { - SHL32ItoR(EAX, _Sa_); - } - CDQ(); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], EDX); -} - -//////////////////////////////////////////////////// -void recSRL(void) { - if (!_Rd_) return; - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[_Rt_].UL[0]); - if (_Sa_ != 0) { - SHR32ItoR(EAX, _Sa_); - } - CDQ(); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[0], EAX); - MOV32RtoM((uptr)&cpuRegs.GPR.r[_Rd_].UL[1], EDX); -} - -//////////////////////////////////////////////////// -void recSRA(void) { - if (!_Rd_) return; - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Sa_ != 0 ) { - SAR32ItoR( EAX, _Sa_); - } - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recDSLL(void) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Sa_ != 0 ) { - SHL64ItoR( RAX, _Sa_ ); - } - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSRL( void ) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Sa_ != 0 ) { - SHR64ItoR( RAX, _Sa_ ); - } - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSLL32(void) { - - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - SHL64ItoR( RAX, _Sa_ + 32 ); - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSRL32( void ) { - - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - SHR64ItoR( RAX, _Sa_ + 32 ); - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -/********************************************************* -* Shift arithmetic with variant register shift * -* Format: OP rd, rt, rs * -*********************************************************/ - - -//////////////////////////////////////////////////// -void recSLLV( void ) { - if (!_Rd_) return; - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Rs_ != 0 ) { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x1f ); - SHL32CLtoR( EAX ); - } - CDQ(); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recSRLV( void ) { - if (!_Rd_) return; - - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Rs_ != 0 ) - { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x1f ); - SHR32CLtoR( EAX ); - } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recSRAV( void ) { - if (!_Rd_) return; - - MOV32MtoR( EAX, (uptr)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Rs_ != 0 ) - { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x1f ); - SAR32CLtoR( EAX ); - } - CDQ( ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], EAX ); - MOV32RtoM( (uptr)&cpuRegs.GPR.r[ _Rd_ ].UL[ 1 ], EDX ); -} - -//////////////////////////////////////////////////// -void recDSLLV( void ) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Rs_ != 0 ) - { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x3f ); - SHL64CLtoR( RAX ); - } - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSRLV( void ) { - - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Rs_ != 0 ) - { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x3f ); - SHR64CLtoR( RAX ); - } - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -//////////////////////////////////////////////////// -void recDSRAV( void ) { - if (!_Rd_) return; - - MOV64MtoR( RAX, (u64)&cpuRegs.GPR.r[ _Rt_ ].UL[ 0 ] ); - if ( _Rs_ != 0 ) - { - MOV32MtoR( ECX, (uptr)&cpuRegs.GPR.r[ _Rs_ ].UL[ 0 ] ); - AND32ItoR( ECX, 0x3f ); - SAR64CLtoR( RAX ); - } - MOV64RtoM( (u64)&cpuRegs.GPR.r[ _Rd_ ].UL[ 0 ], RAX ); -} - -#endif - - -#endif // PCSX2_NORECBUILD diff --git a/pcsx2/x86/ix86/Makefile.am b/pcsx2/x86/ix86/Makefile.am index 57320a83d3..1da8e0c231 100644 --- a/pcsx2/x86/ix86/Makefile.am +++ b/pcsx2/x86/ix86/Makefile.am @@ -1,9 +1,5 @@ -INCLUDES = -I@srcdir@/.. -I@srcdir@/../../ +INCLUDES = -I@srcdir@/.. -I@srcdir@/../../ -I@srcdir@/../../../common/ noinst_LIBRARIES = libix86.a -libix86_a_SOURCES = ix86_3dnow.cpp ix86.cpp ix86_cpudetect.cpp ix86_fpu.cpp ix86.h ix86_sse.cpp +libix86_a_SOURCES = ix86_3dnow.cpp ix86.cpp ix86_cpudetect.cpp ix86_fpu.cpp ix86.h ix86_sse.cpp ix86_mmx.cpp -if X86_64 -else -libix86_a_SOURCES += ix86_mmx.cpp -endif diff --git a/pcsx2/x86/ix86/ix86.cpp b/pcsx2/x86/ix86/ix86.cpp index 60165e6f48..70b7e97219 100644 --- a/pcsx2/x86/ix86/ix86.cpp +++ b/pcsx2/x86/ix86/ix86.cpp @@ -30,34 +30,6 @@ #define SWAP(x, y) { *(u32*)&y ^= *(u32*)&x; *(u32*)&x ^= *(u32*)&y; *(u32*)&y ^= *(u32*)&x; } -#ifdef __x86_64__ - -#ifdef _MSC_VER -// visual studio calling convention -x86IntRegType g_x86savedregs[] = { RBX, RBP, RSI, RDI, R12, R13, R14, R15 }; -x86IntRegType g_x86tempregs[] = { R8, R9, R10, R11, RDX, RCX }; - -// arranged in savedreg -> tempreg order -x86IntRegType g_x86allregs[14] = { RBX, RBP, RSI, RDI, R12, R13, R14, R15, R8, R9, R10, R11, RDX, RCX }; - -#else -// standard calling convention - -// registers saved by calling functions (no need to flush them across calls) -x86IntRegType g_x86savedregs[] = { RBX, RBP, R12, R13, R14, R15 }; -// temp registers that need to be saved across calls -x86IntRegType g_x86tempregs[] = { RCX, RDX, R8, R9, R10, R11, RSI, RDI }; - -// arranged in savedreg -> tempreg order -x86IntRegType g_x86allregs[14] = { RBX, RBP, R12, R13, R14, R15, RCX, RDX, R8, R9, R10, R11, RSI, RDI }; - -#endif - -x86IntRegType g_x868bitregs[11] = { RBX, R12, R13, R14, R15, RCX, RDX, R8, R9, R10, R11 }; -x86IntRegType g_x86non8bitregs[3] = { RBP, RSI, RDI }; - -#endif // __x86_64__ - u8 *x86Ptr; u8 *j8Ptr[32]; u32 *j32Ptr[32]; @@ -819,71 +791,6 @@ __forceinline void MOVZX32M16toR( x86IntRegType to, u32 from ) write32( MEMADDR(from, 4) ); } -#ifdef __x86_64__ - -/* movzx r8 to r64 */ -__forceinline void MOVZX64R8toR( x86IntRegType to, x86IntRegType from ) -{ - RexRB(1,to,from); - write16( 0xB60F ); - ModRM( 3, to, from ); -} - -__forceinline void MOVZX64Rm8toR( x86IntRegType to, x86IntRegType from ) -{ - RexRB(1,to,from); - write16( 0xB60F ); - ModRM( 0, to, from ); -} - -__forceinline void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset ) -{ - RexRB(1,to,from); - write16( 0xB60F ); - WriteRmOffsetFrom(to,from,offset); -} - -/* movzx m8 to r64 */ -__forceinline void MOVZX64M8toR( x86IntRegType to, u32 from ) -{ - RexR(1,to); - write16( 0xB60F ); - ModRM( 0, to, DISP32 ); - write32( MEMADDR(from, 4) ); -} - -/* movzx r16 to r64 */ -__forceinline void MOVZX64R16toR( x86IntRegType to, x86IntRegType from ) -{ - RexRB(1,to,from); - write16( 0xB70F ); - ModRM( 3, to, from ); -} - -__forceinline void MOVZX64Rm16toR( x86IntRegType to, x86IntRegType from ) -{ - RexRB(1,to,from); - write16( 0xB70F ); - ModRM( 0, to, from ); -} - -__forceinline void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset ) -{ - RexRB(1,to,from); - write16( 0xB70F ); - WriteRmOffsetFrom(to,from,offset); -} - -/* movzx m16 to r64 */ -__forceinline void MOVZX64M16toR( x86IntRegType to, u32 from ) -{ - RexR(1,to); - write16( 0xB70F ); - ModRM( 0, to, DISP32 ); - write32( MEMADDR(from, 4) ); -} -#endif - /* cmovbe r32 to r32 */ __forceinline void CMOVBE32RtoR( x86IntRegType to, x86IntRegType from ) { @@ -1331,7 +1238,6 @@ __forceinline void ADC32RtoM( uptr to, x86IntRegType from ) /* inc r32 */ __forceinline void INC32R( x86IntRegType to ) { - X86_64ASSERT(); write8( 0x40 + to ); } @@ -1346,7 +1252,6 @@ __forceinline void INC32M( u32 to ) /* inc r16 */ __forceinline void INC16R( x86IntRegType to ) { - X86_64ASSERT(); write8( 0x66 ); write8( 0x40 + to ); } @@ -1538,7 +1443,6 @@ __forceinline void SBB32RtoM( uptr to, x86IntRegType from ) /* dec r32 */ __forceinline void DEC32R( x86IntRegType to ) { - X86_64ASSERT(); write8( 0x48 + to ); } @@ -1553,7 +1457,6 @@ __forceinline void DEC32M( u32 to ) /* dec r16 */ __forceinline void DEC16R( x86IntRegType to ) { - X86_64ASSERT(); write8( 0x66 ); write8( 0x48 + to ); } @@ -3211,40 +3114,11 @@ __forceinline void SETE8R( x86IntRegType to ) { SET8R(0x94, to); } /* push imm32 */ __forceinline void PUSH32I( u32 from ) -{ - X86_64ASSERT(); +{; write8( 0x68 ); write32( from ); } -#ifdef __x86_64__ - -/* push r32 */ -void PUSH32R( x86IntRegType from ) -{ - RexB(0,from); - write8( 0x51 | from ); -} - -/* push m32 */ -void PUSH32M( uptr from ) -{ - write8( 0xFF ); - ModRM( 0, 6, DISP32 ); - write32( MEMADDR(from, 4) ); -} - -/* pop r64 */ -void POP64R( x86IntRegType from ) { - RexB(0,from); - write8( 0x59 | from ); -} - -void PUSHR(x86IntRegType from) { PUSH32R(from); } -void POPR(x86IntRegType from) { POP64R(from); } - -#else - /* push r32 */ __forceinline void PUSH32R( x86IntRegType from ) { write8( 0x50 | from ); } @@ -3268,8 +3142,6 @@ __forceinline void POPA32( void ) { write8( 0x61 ); } __forceinline void PUSHR(x86IntRegType from) { PUSH32R(from); } __forceinline void POPR(x86IntRegType from) { POP32R(from); } -#endif - /* pushfd */ __forceinline void PUSHFD( void ) { write8( 0x9C ); } @@ -3284,10 +3156,6 @@ __forceinline void CWD( void ) { write8( 0x98 ); } __forceinline void CDQ( void ) { write8( 0x99 ); } __forceinline void CWDE() { write8(0x98); } -#ifdef __x86_64__ -void CDQE( void ) { RexR(1,0); write8( 0x98 ); } -#endif - __forceinline void LAHF() { write8(0x9f); } __forceinline void SAHF() { write8(0x9e); } diff --git a/pcsx2/x86/ix86/ix86.h b/pcsx2/x86/ix86/ix86.h index b32eed43c7..dd39f53254 100644 --- a/pcsx2/x86/ix86/ix86.h +++ b/pcsx2/x86/ix86/ix86.h @@ -28,13 +28,8 @@ #include "PS2Etypes.h" // Basic types header -#ifdef __x86_64__ -#define XMMREGS 16 -#define X86REGS 16 -#else #define XMMREGS 8 #define X86REGS 8 -#endif #define MMXREGS 8 @@ -53,59 +48,11 @@ typedef int x86IntRegType; #define EBP 5 #define ESP 4 -#ifdef __x86_64__ -#define RAX 0 -#define RBX 3 -#define RCX 1 -#define RDX 2 -#define RSI 6 -#define RDI 7 -#define RBP 5 -#define RSP 4 -#define R8 8 -#define R9 9 -#define R10 10 -#define R11 11 -#define R12 12 -#define R13 13 -#define R14 14 -#define R15 15 - -#define X86_TEMP RAX // don't allocate anything - -#ifdef _MSC_VER -extern x86IntRegType g_x86savedregs[8]; -extern x86IntRegType g_x86tempregs[6]; -#else -extern x86IntRegType g_x86savedregs[6]; -extern x86IntRegType g_x86tempregs[8]; -#endif - -extern x86IntRegType g_x86allregs[14]; // all registers that can be used by the recs -extern x86IntRegType g_x868bitregs[11]; -extern x86IntRegType g_x86non8bitregs[3]; - -#ifdef _MSC_VER -#define X86ARG1 RCX -#define X86ARG2 RDX -#define X86ARG3 R8 -#define X86ARG4 R9 -#else -#define X86ARG1 RDI -#define X86ARG2 RSI -#define X86ARG3 RDX -#define X86ARG4 RCX -#endif - -#else - #define X86ARG1 EAX #define X86ARG2 ECX #define X86ARG3 EDX #define X86ARG4 EBX -#endif // __x86_64__ - #define MM0 0 #define MM1 1 #define MM2 2 @@ -215,30 +162,13 @@ extern u8 *x86Ptr; extern u8 *j8Ptr[32]; extern u32 *j32Ptr[32]; - -#ifdef __x86_64__ -#define X86_64ASSERT() assert(0) -#define MEMADDR(addr, oplen) ((addr) - ((u64)x86Ptr + ((u64)oplen))) -#else -#define X86_64ASSERT() #define MEMADDR(addr, oplen) (addr) -#endif -#ifdef __x86_64__ -#define Rex( w, r, x, b ) write8( 0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b) ); -#define RexR(w, reg) if( w||(reg)>=8 ) { Rex(w, (reg)>=8, 0, 0); } -#define RexB(w, base) if( w||(base)>=8 ) { Rex(w, 0, 0, (base)>=8); } -#define RexRB(w, reg, base) if( w || (reg) >= 8 || (base)>=8 ) { Rex(w, (reg)>=8, 0, (base)>=8); } -#define RexRXB(w, reg, index, base) if( w||(reg) >= 8 || (index) >= 8 || (base) >= 8 ) { \ - Rex(w, (reg)>=8, (index)>=8, (base)>=8); \ - } -#else #define Rex(w,r,x,b) assert(0); #define RexR(w, reg) if( w||(reg)>=8 ) assert(0); #define RexB(w, base) if( w||(base)>=8 ) assert(0); #define RexRB(w, reg, base) if( w||(reg) >= 8 || (base)>=8 ) assert(0); #define RexRXB(w, reg, index, base) if( w||(reg) >= 8 || (index) >= 8 || (base) >= 8 ) assert(0); -#endif extern __forceinline void write8( u8 val ); extern __forceinline void write16( u16 val ); @@ -403,20 +333,6 @@ extern void MOVZX32Rm16toROffset( x86IntRegType to, x86IntRegType from, int offs // movzx m16 to r32 extern void MOVZX32M16toR( x86IntRegType to, u32 from ); -#ifdef __x86_64__ -extern void MOVZX64R8toR( x86IntRegType to, x86IntRegType from ); -extern void MOVZX64Rm8toR( x86IntRegType to, x86IntRegType from ); -extern void MOVZX64Rm8toROffset( x86IntRegType to, x86IntRegType from, int offset ); -// movzx m8 to r64 -extern void MOVZX64M8toR( x86IntRegType to, u32 from ); -// movzx r16 to r64 -extern void MOVZX64R16toR( x86IntRegType to, x86IntRegType from ); -extern void MOVZX64Rm16toR( x86IntRegType to, x86IntRegType from ); -extern void MOVZX64Rm16toROffset( x86IntRegType to, x86IntRegType from, int offset ); -// movzx m16 to r64 -extern void MOVZX64M16toR( x86IntRegType to, u32 from ); -#endif - // cmovbe r32 to r32 extern void CMOVBE32RtoR( x86IntRegType to, x86IntRegType from ); // cmovbe m32 to r32 @@ -992,14 +908,6 @@ extern void SETE8R( x86IntRegType to ); // push imm32 extern void PUSH32I( u32 from ); -#ifdef __x86_64__ -// push r64 -void PUSH64R( x86IntRegType from ); -// push m64 -void PUSH64M( uptr from ); -// pop r32 -void POP64R( x86IntRegType from ); -#else // push r32 extern void PUSH32R( x86IntRegType from ); // push m32 @@ -1012,7 +920,6 @@ extern void POP32R( x86IntRegType from ); extern void PUSHA32( void ); // popad extern void POPA32( void ); -#endif extern void PUSHR(x86IntRegType from); extern void POPR(x86IntRegType from); @@ -1159,13 +1066,6 @@ extern void FCMOVNU32( x86IntRegType from ); extern void FCOMP32( u32 from ); extern void FNSTSWtoAX( void ); -// probably a little extreme here, but x86-64 should NOT use MMX -#ifdef __x86_64__ - -#define MMXONLY(code) - -#else - #define MMXONLY(code) code //****************** @@ -1309,8 +1209,6 @@ extern void PMOVMSKBMMXtoR(x86IntRegType to, x86MMXRegType from); extern void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from); extern void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from); -#endif // !__x86_64__ - //********************* // SSE instructions * //********************* @@ -1413,13 +1311,12 @@ extern void SSE_CMPORDSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ); extern void SSE_UCOMISS_M32_to_XMM( x86SSERegType to, uptr from ); extern void SSE_UCOMISS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ); -#ifndef __x86_64__ extern void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ); extern void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ); extern void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from ); extern void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from ); extern void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from ); -#endif + extern void SSE_CVTPI2PS_M64_to_XMM( x86SSERegType to, uptr from ); extern void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from); extern void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from); @@ -1663,10 +1560,8 @@ extern void SSE2_MOVD_XMM_to_R( x86IntRegType to, x86SSERegType from ); extern void SSE2_MOVD_XMM_to_Rm( x86IntRegType to, x86SSERegType from ); extern void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType from, int offset ); -#ifdef __x86_64__ extern void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from ); extern void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from ); -#endif //**********************************************************************************/ //POR : SSE Bitwise OR * @@ -1766,10 +1661,8 @@ extern void SSE2EMU_MOVQ_XMM_to_XMM( x86SSERegType to, x86SSERegType from); extern void SSE2EMU_MOVD_RmOffset_to_XMM( x86SSERegType to, x86IntRegType from, int offset ); extern void SSE2EMU_MOVD_XMM_to_RmOffset(x86IntRegType to, x86SSERegType from, int offset ); -#ifndef __x86_64__ extern void SSE2EMU_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from); extern void SSE2EMU_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from); -#endif /* SSE2 emulated functions for SSE CPU's by kekko*/ diff --git a/pcsx2/x86/ix86/ix86_cpudetect.cpp b/pcsx2/x86/ix86/ix86_cpudetect.cpp index 0819b53215..59f9982acc 100644 --- a/pcsx2/x86/ix86/ix86_cpudetect.cpp +++ b/pcsx2/x86/ix86/ix86_cpudetect.cpp @@ -56,10 +56,6 @@ extern s32 iCpuId( u32 cmd, u32 *regs ) return 0; #elif defined (_MSC_VER) - -#ifdef __x86_64__ - assert(0); -#else // __x86_64__ __asm { push ebx; @@ -95,14 +91,12 @@ extern s32 iCpuId( u32 cmd, u32 *regs ) pop edi; pop ebx; } -#endif // __x86_64__ return 0; #else // GCC Assembly Code --> -#ifndef __x86_64__ // see if we can use cpuid __asm__ __volatile__ ( "sub $0x18, %%esp\n" @@ -125,7 +119,6 @@ extern s32 iCpuId( u32 cmd, u32 *regs ) "1:\n" : "=r"(flag) : ); -#endif cpuid(cmd, regs[0], regs[1], regs[2], regs[3]); return 0; @@ -139,7 +132,7 @@ u64 GetCPUTick( void ) return __rdtsc(); -#elif defined(_WIN32) && !defined(__x86_64__) +#elif defined(_WIN32) __asm rdtsc; diff --git a/pcsx2/x86/ix86/ix86_sse.cpp b/pcsx2/x86/ix86/ix86_sse.cpp index 9dd73d2a11..29171b80da 100644 --- a/pcsx2/x86/ix86/ix86_sse.cpp +++ b/pcsx2/x86/ix86/ix86_sse.cpp @@ -278,7 +278,6 @@ __forceinline void SSE2_MOVQ_XMM_to_M64( u32 to, x86SSERegType from ) SSERtoM66(0xd60f); } -#ifndef __x86_64__ __forceinline void SSE2_MOVDQ2Q_XMM_to_MM( x86MMXRegType to, x86SSERegType from) { write8(0xf2); @@ -289,7 +288,6 @@ __forceinline void SSE2_MOVQ2DQ_MM_to_XMM( x86SSERegType to, x86MMXRegType from) write8(0xf3); SSERtoR( 0xd60f); } -#endif //**********************************************************************************/ //MOVSS: Move Scalar Single-Precision FP value * @@ -562,7 +560,6 @@ __forceinline void SSE_MAXPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) __forceinline void SSE_MAXSS_M32_to_XMM( x86SSERegType to, uptr from ) { SSE_SS_MtoR( 0x5f0f, 0 ); } __forceinline void SSE_MAXSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5f0f ); } -#ifndef __x86_64__ ///////////////////////////////////////////////////////////////////////////////////////// //**********************************************************************************/ //CVTPI2PS: Packed Signed INT32 to Packed Single FP Conversion * @@ -576,7 +573,6 @@ __forceinline void SSE_CVTPI2PS_MM_to_XMM( x86SSERegType to, x86MMXRegType from //********************************************************************************** __forceinline void SSE_CVTPS2PI_M64_to_MM( x86MMXRegType to, uptr from ) { SSEMtoR( 0x2d0f, 0 ); } __forceinline void SSE_CVTPS2PI_XMM_to_MM( x86MMXRegType to, x86SSERegType from ) { SSERtoR( 0x2d0f ); } -#endif __forceinline void SSE_CVTTSS2SI_M32_to_R32(x86IntRegType to, uptr from) { write8(0xf3); SSEMtoR(0x2c0f, 0); } __forceinline void SSE_CVTTSS2SI_XMM_to_R32(x86IntRegType to, x86SSERegType from) @@ -624,7 +620,6 @@ __forceinline void SSE_MINPS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) __forceinline void SSE_MINSS_M32_to_XMM( x86SSERegType to, uptr from ) { SSE_SS_MtoR( 0x5d0f, 0 ); } __forceinline void SSE_MINSS_XMM_to_XMM( x86SSERegType to, x86SSERegType from ) { SSE_SS_RtoR( 0x5d0f ); } -#ifndef __x86_64__ /////////////////////////////////////////////////////////////////////////////////////////// //**********************************************************************************/ //PMAXSW: Packed Signed Integer Word Maximum * @@ -644,7 +639,6 @@ __forceinline void SSE_PMAXSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ // SSE2_PMINSW_M128_to_XMM // SSE2_PMINSW_XMM_to_XMM __forceinline void SSE_PMINSW_MM_to_MM( x86MMXRegType to, x86MMXRegType from ){ SSERtoR( 0xEA0F ); } -#endif ////////////////////////////////////////////////////////////////////////////////////// //**********************************************************************************/ @@ -831,27 +825,6 @@ __forceinline void SSE2_MOVD_XMM_to_RmOffset( x86IntRegType to, x86SSERegType fr WriteRmOffsetFrom(from, to, offset); } -#ifdef __x86_64__ -__forceinline void SSE2_MOVQ_XMM_to_R( x86IntRegType to, x86SSERegType from ) -{ - assert( from < XMMREGS); - write8( 0x66 ); - RexRB(1, from, to); - write16( 0x7e0f ); - ModRM( 3, from, to ); -} - -__forceinline void SSE2_MOVQ_R_to_XMM( x86SSERegType to, x86IntRegType from ) -{ - assert( to < XMMREGS); - write8(0x66); - RexRB(1, to, from); - write16( 0x6e0f ); - ModRM( 3, to, from ); -} - -#endif - //////////////////////////////////////////////////////////////////////////////////// //**********************************************************************************/ //POR : SSE Bitwise OR *