mirror of https://github.com/PCSX2/pcsx2.git
Implemented 64-bit writes for Counter registers -- Fixes uLaunchELF!
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1928 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
parent
abf0cbde47
commit
893fcebf52
|
@ -699,7 +699,10 @@ __forceinline void rcntWmode(int index, u32 value)
|
|||
}
|
||||
else counters[index].sCycleT = cpuRegs.cycle;
|
||||
|
||||
counters[index].modeval &= ~(value & 0xc00); //Clear status flags, the ps2 only clears what is given in the value
|
||||
// Clear OverflowReached and TargetReached flags (0xc00 mask), but *only* if they are set to 1 in the
|
||||
// given value. (yes, the bits are cleared when written with '1's).
|
||||
|
||||
counters[index].modeval &= ~(value & 0xc00);
|
||||
counters[index].modeval = (counters[index].modeval & 0xc00) | (value & 0x3ff);
|
||||
EECNT_LOG("EE Counter[%d] writeMode = %x passed value=%x", index, counters[index].modeval, value );
|
||||
|
||||
|
|
|
@ -564,6 +564,8 @@ extern void __fastcall hwWrite32_page_0E( u32 mem, mem32_t value );
|
|||
extern void __fastcall hwWrite32_page_0F( u32 mem, mem32_t value );
|
||||
extern void __fastcall hwWrite32_generic( u32 mem, mem32_t value );
|
||||
|
||||
extern void __fastcall hwWrite64_page_00( u32 mem, const mem64_t* srcval );
|
||||
extern void __fastcall hwWrite64_page_01( u32 mem, const mem64_t* srcval );
|
||||
extern void __fastcall hwWrite64_page_02( u32 mem, const mem64_t* srcval );
|
||||
extern void __fastcall hwWrite64_page_03( u32 mem, const mem64_t* srcval );
|
||||
extern void __fastcall hwWrite64_page_0E( u32 mem, const mem64_t* srcval );
|
||||
|
|
|
@ -1045,6 +1045,20 @@ void __fastcall hwWrite32_generic( u32 mem, u32 value )
|
|||
/////////////////////////////////////////////////////////////////////////
|
||||
// HW Write 64 bit
|
||||
|
||||
// Page 0 of HW memory houses registers for Counters 0 and 1
|
||||
void __fastcall hwWrite64_page_00( u32 mem, const mem64_t* srcval )
|
||||
{
|
||||
hwWrite32_page_00( mem, (u32)*srcval ); // just ignore upper 32 bits.
|
||||
*((u64*)&PS2MEM_HW[mem]) = *srcval;
|
||||
}
|
||||
|
||||
// Page 1 of HW memory houses registers for Counters 2 and 3
|
||||
void __fastcall hwWrite64_page_01( u32 mem, const mem64_t* srcval )
|
||||
{
|
||||
hwWrite32_page_01( mem, (u32)*srcval ); // just ignore upper 32 bits.
|
||||
*((u64*)&PS2MEM_HW[mem]) = *srcval;
|
||||
}
|
||||
|
||||
void __fastcall hwWrite64_page_02( u32 mem, const mem64_t* srcval )
|
||||
{
|
||||
//hwWrite64( mem, *srcval ); return;
|
||||
|
|
|
@ -676,12 +676,12 @@ void memReset()
|
|||
|
||||
hw_by_page[0x0] = vtlb_RegisterHandler(
|
||||
_ext_memRead8<1>, _ext_memRead16<1>, hwRead32_page_00, hwRead64_page_00, hwRead128_page_00,
|
||||
_ext_memWrite8<1>, _ext_memWrite16<1>, hwWrite32_page_00, hwWrite64_generic, hwWrite128_generic
|
||||
_ext_memWrite8<1>, _ext_memWrite16<1>, hwWrite32_page_00, hwWrite64_page_00, hwWrite128_generic
|
||||
);
|
||||
|
||||
hw_by_page[0x1] = vtlb_RegisterHandler(
|
||||
_ext_memRead8<1>, _ext_memRead16<1>, hwRead32_page_01, hwRead64_page_01, hwRead128_page_01,
|
||||
_ext_memWrite8<1>, _ext_memWrite16<1>, hwWrite32_page_01, hwWrite64_generic, hwWrite128_generic
|
||||
_ext_memWrite8<1>, _ext_memWrite16<1>, hwWrite32_page_01, hwWrite64_page_01, hwWrite128_generic
|
||||
);
|
||||
|
||||
hw_by_page[0x2] = vtlb_RegisterHandler(
|
||||
|
|
Loading…
Reference in New Issue