diff --git a/common/emitter/simd.cpp b/common/emitter/simd.cpp index 9646ead0dc..420052e1c1 100644 --- a/common/emitter/simd.cpp +++ b/common/emitter/simd.cpp @@ -64,11 +64,6 @@ SSE_MXCSR& SSE_MXCSR::DisableExceptions() return *this; } -SSE_MXCSR::operator x86Emitter::xIndirect32() const -{ - return x86Emitter::ptr32[&bitmask]; -} - namespace x86Emitter { diff --git a/common/emitter/tools.h b/common/emitter/tools.h index 269b5fb4a3..89b1854543 100644 --- a/common/emitter/tools.h +++ b/common/emitter/tools.h @@ -17,13 +17,6 @@ enum SSE_RoundMode ImplementEnumOperators(SSE_RoundMode); -// Predeclaration for xIndirect32 -namespace x86Emitter -{ - template - class xIndirect; - typedef xIndirect xIndirect32; -} // namespace x86Emitter // -------------------------------------------------------------------------------------- // SSE_MXCSR - Control/Status Register (bitfield) @@ -79,6 +72,4 @@ union SSE_MXCSR { return bitmask != right.bitmask; } - - operator x86Emitter::xIndirect32() const; }; diff --git a/pcsx2/x86/iFPU.cpp b/pcsx2/x86/iFPU.cpp index c9af3d97db..5acad9ee8d 100644 --- a/pcsx2/x86/iFPU.cpp +++ b/pcsx2/x86/iFPU.cpp @@ -1111,7 +1111,7 @@ void recDIV_S_xmm(int info) roundmode_neg = g_sseMXCSR; roundmode_neg.SetRoundMode(SSEround_NegInf); - xLDMXCSR(roundmode_neg); + xLDMXCSR(ptr32[&roundmode_neg.bitmask]); roundmodeFlag = true; } } @@ -1124,7 +1124,7 @@ void recDIV_S_xmm(int info) roundmode_nearest = g_sseMXCSR; roundmode_nearest.SetRoundMode(SSEround_Nearest); - xLDMXCSR(roundmode_nearest); + xLDMXCSR(ptr32[&roundmode_nearest.bitmask]); roundmodeFlag = true; } } @@ -1191,7 +1191,7 @@ void recDIV_S_xmm(int info) break; } if (roundmodeFlag) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR.bitmask]); _freeXMMreg(t0reg); } @@ -1774,7 +1774,7 @@ void recSQRT_S_xmm(int info) //Console.WriteLn("sqrt to nearest"); roundmode_nearest = g_sseMXCSR; roundmode_nearest.SetRoundMode(SSEround_Nearest); - xLDMXCSR(roundmode_nearest); + xLDMXCSR(ptr32[&roundmode_nearest.bitmask]); roundmodeFlag = true; } @@ -1805,7 +1805,7 @@ void recSQRT_S_xmm(int info) ClampValues(EEREC_D); if (roundmodeFlag) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR.bitmask]); } FPURECOMPILE_CONSTCODE(SQRT_S, XMMINFO_WRITED | XMMINFO_READT); diff --git a/pcsx2/x86/iFPUd.cpp b/pcsx2/x86/iFPUd.cpp index 873571f1e8..b0897996d1 100644 --- a/pcsx2/x86/iFPUd.cpp +++ b/pcsx2/x86/iFPUd.cpp @@ -669,7 +669,7 @@ void recDIV_S_xmm(int info) roundmode_neg = g_sseMXCSR; roundmode_neg.SetRoundMode(SSEround_NegInf); - xLDMXCSR(roundmode_neg); + xLDMXCSR(ptr32[&roundmode_neg.bitmask]); roundmodeFlag = true; } } @@ -682,7 +682,7 @@ void recDIV_S_xmm(int info) roundmode_nearest = g_sseMXCSR; roundmode_nearest.SetRoundMode(SSEround_Nearest); - xLDMXCSR(roundmode_nearest); + xLDMXCSR(ptr32[&roundmode_nearest.bitmask]); roundmodeFlag = true; } } @@ -699,7 +699,7 @@ void recDIV_S_xmm(int info) xMOVSS(xRegisterSSE(EEREC_D), xRegisterSSE(sreg)); if (roundmodeFlag) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR]); _freeXMMreg(sreg); _freeXMMreg(treg); } @@ -958,7 +958,7 @@ void recSQRT_S_xmm(int info) //Console.WriteLn("sqrt to nearest"); roundmode_nearest = g_sseMXCSR; roundmode_nearest.SetRoundMode(SSEround_Nearest); - xLDMXCSR(roundmode_nearest); + xLDMXCSR(ptr32[&roundmode_nearest.bitmask]); roundmodeFlag = 1; } @@ -989,7 +989,7 @@ void recSQRT_S_xmm(int info) ToPS2FPU(EEREC_D, false, t1reg, false); if (roundmodeFlag == 1) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR.bitmask]); _freeXMMreg(t1reg); } @@ -1080,7 +1080,7 @@ void recRSQRT_S_xmm(int info) //Console.WriteLn("sqrt to nearest"); roundmode_nearest = g_sseMXCSR; roundmode_nearest.SetRoundMode(SSEround_Nearest); - xLDMXCSR(roundmode_nearest); + xLDMXCSR(ptr32[&roundmode_nearest.bitmask]); roundmodeFlag = true; } @@ -1096,7 +1096,7 @@ void recRSQRT_S_xmm(int info) _freeXMMreg(treg); _freeXMMreg(sreg); if (roundmodeFlag) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR.bitmask]); } FPURECOMPILE_CONSTCODE(RSQRT_S, XMMINFO_WRITED | XMMINFO_READS | XMMINFO_READT); diff --git a/pcsx2/x86/microVU_Execute.inl b/pcsx2/x86/microVU_Execute.inl index 833ae18af3..8d02e747c3 100644 --- a/pcsx2/x86/microVU_Execute.inl +++ b/pcsx2/x86/microVU_Execute.inl @@ -32,7 +32,7 @@ void mVUdispatcherAB(mV) // Load VU's MXCSR state if (mvuNeedsFPCRUpdate(mVU)) - xLDMXCSR(isVU0 ? g_sseVU0MXCSR : g_sseVU1MXCSR); + xLDMXCSR(ptr32[isVU0 ? &g_sseVU0MXCSR.bitmask : &g_sseVU1MXCSR.bitmask]); // Load Regs xMOVAPS (xmmT1, ptr128[&mVU.regs().VI[REG_P].UL]); @@ -72,7 +72,7 @@ void mVUdispatcherAB(mV) // Load EE's MXCSR state if (mvuNeedsFPCRUpdate(mVU)) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR.bitmask]); // = The first two DWORD or smaller arguments are passed in ECX and EDX registers; // all other arguments are passed right to left. @@ -96,7 +96,7 @@ void mVUdispatcherCD(mV) // Load VU's MXCSR state if (mvuNeedsFPCRUpdate(mVU)) - xLDMXCSR(isVU0 ? g_sseVU0MXCSR : g_sseVU1MXCSR); + xLDMXCSR(ptr32[isVU0 ? &g_sseVU0MXCSR.bitmask : &g_sseVU1MXCSR.bitmask]); mVUrestoreRegs(mVU); xMOV(gprF0, ptr32[&mVU.regs().micro_statusflags[0]]); @@ -117,7 +117,7 @@ void mVUdispatcherCD(mV) // Load EE's MXCSR state if (mvuNeedsFPCRUpdate(mVU)) - xLDMXCSR(g_sseMXCSR); + xLDMXCSR(ptr32[&g_sseMXCSR.bitmask]); } xRET();