mirror of https://github.com/PCSX2/pcsx2.git
UI: Added PGIF log source (#4564)
This commit is contained in:
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88a53f013e
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@ -315,6 +315,7 @@ struct SysConsoleLogPack
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ConsoleLogSource ELF;
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ConsoleLogSource eeRecPerf;
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ConsoleLogSource sysoutConsole;
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ConsoleLogSource pgifLog;
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ConsoleLogFromVM<Color_Cyan> eeConsole;
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ConsoleLogFromVM<Color_Yellow> iopConsole;
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@ -394,6 +395,7 @@ extern void __Log( const char* fmt, ... );
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#define eeDeci2Log SysConsole.deci2.IsActive() && SysConsole.deci2.Write
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#define iopConLog SysConsole.iopConsole.IsActive() && SysConsole.iopConsole.Write
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#define sysConLog SysConsole.sysoutConsole.IsActive() && SysConsole.sysoutConsole.Write
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#define pgifConLog SysConsole.pgifLog.IsActive() && SysConsole.pgifLog.Write
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#ifndef DISABLE_RECORDING
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# define recordingConLog SysConsole.recordingConsole.IsActive() && SysConsole.recordingConsole.Write
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@ -26,6 +26,8 @@
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#include "SPU2/spu2.h"
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#include "R3000A.h"
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#include "ConsoleLogger.h"
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using namespace R5900;
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// Shift the middle 8 bits (bits 4-12) into the lower 8 bits.
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@ -252,6 +254,8 @@ void __fastcall _hwWrite32( u32 mem, u32 value )
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default:
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// TODO: psx add the real address in a sbus mcase
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if (((mem & 0x1FFFFFFF) >= EEMemoryMap::SBUS_PS1_Start) && ((mem & 0x1FFFFFFF) < EEMemoryMap::SBUS_PS1_End)) {
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// Tharr be console spam here! Need to figure out how to print what mode
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//pgifConLog(L"Pgif DMA: set mode");.
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PGIFw((mem & 0x1FFFFFFF), value);
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return;
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}
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@ -104,10 +104,11 @@ static const TraceLogDescriptor
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TLD_deci2 = {L"DECI2", L"DECI&2 Console", pxDt("Shows DECI2 debugging logs (EE processor).")},
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TLD_sysoutConsole = {L"SYSout", L"System Out", pxDt("Shows strings printed to the system output stream.")}
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TLD_sysoutConsole = {L"SYSout", L"System Out", pxDt("Shows strings printed to the system output stream.")},
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TLD_Pgif = {L"PGIFout", L"&PGIF Console", pxDt("Shows output from pgif the emulated ps1 gpu")},
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#ifndef DISABLE_RECORDING
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,
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TLD_recordingConsole = {L"Input Recording", L"Input Recording Console", pxDt("Shows recording related logs and information.")},
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TLD_controlInfo = {L"Controller Info", L"Controller Info", pxDt("Shows detailed controller input values for port 1, every frame.")}
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@ -121,6 +122,7 @@ SysConsoleLogPack::SysConsoleLogPack()
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, eeConsole(&TLD_eeConsole)
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, iopConsole(&TLD_iopConsole)
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, deci2(&TLD_deci2)
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, pgifLog(&TLD_Pgif)
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#ifndef DISABLE_RECORDING
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, recordingConsole(&TLD_recordingConsole)
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, controlInfo(&TLD_controlInfo)
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@ -290,6 +290,7 @@ enum MenuId_LogSources_Offset
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MenuId_LogSources_Offset_eeRecPerf,
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MenuId_LogSources_Offset_ELF = 4,
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MenuId_LogSouces_Offset_pgif = 5,
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MenuId_LogSources_Offset_Event = 6,
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MenuId_LogSources_Offset_Thread,
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@ -311,7 +312,7 @@ static ConsoleLogSource* const ConLogSources[] =
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(ConsoleLogSource*)&pxConLog_Event,
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(ConsoleLogSource*)&pxConLog_Thread,
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(ConsoleLogSource*)&SysConsole.sysoutConsole,
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NULL,
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(ConsoleLogSource*)&SysConsole.pgifLog,
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#ifndef DISABLE_RECORDING
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(ConsoleLogSource*)&SysConsole.recordingConsole,
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(ConsoleLogSource*)&SysConsole.controlInfo,
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@ -19,6 +19,10 @@
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#include "ps2/HwInternal.h"
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#include "ps2/pgif.h"
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#include "ConsoleLogger.h"
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#include <fmt/core.h>
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#define psxHu(mem) (*(u32 *)&iopHw[(mem)&0xffff])
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@ -30,7 +34,6 @@ int doAnyIopLs = 0;
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//Debug printf:
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#define REG_LOG 0
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#define LOG_PGPU_DMA 0
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@ -204,8 +207,8 @@ void ringBufPut(struct ringBuf_t *rb, u32 *data)
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rb->head = 0; //wrap back when the end is reached
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rb->count++;
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} else {
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// This should never happen. If it does, the code is bad somewhere.
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Console.WriteLn("############################# PGIF FIFO overflow! sz= %X", rb->size);
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// This should never happen. If it does, the code is bad somewhere.
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pgifConLog("############################# PGIF FIFO overflow! sz= %X", rb->size);
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}
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}
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@ -217,8 +220,8 @@ void ringBufGet(struct ringBuf_t *rb, u32 *data)
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rb->tail = 0; //wrap back when the end is reached
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rb->count--;
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} else {
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// This should never happen. If it does, the code is bad somewhere.
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Console.WriteLn("############################# PGIF FIFO underflow! sz= %X", rb->size);
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// This should never happen. If it does, the code is bad somewhere.
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pgifConLog("############################# PGIF FIFO overflow! sz= %X", rb->size);
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}
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}
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@ -340,7 +343,7 @@ void pgifReset()
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void triggerPgifInt(int subCause)
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{ //For the PGIF on EE side.
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// Console.WriteLn("TRIGGERRING PGIF IRQ! %08X %08X ", psHu32(INTC_STAT), psHu32(INTC_MASK));
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pgifConLog("TRIGGERRING PGIF IRQ! %08X %08X ", psHu32(INTC_STAT), psHu32(INTC_MASK));
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//Left-overs from tests:
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//iopCycleEE = -1; //0000;
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//iopBreak = 0;
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@ -533,8 +536,11 @@ void cmdRingBufGet(u32 *data)
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}
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void datRingBufGet(u32 *data)
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{ //
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//if (pgifDatRbC.count >= (PGIF_DAT_RB_SZ -1)) { Console.WriteLn( "PGIF DAT BUF FULL %08X ", pgifDatRbC.count);
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{
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if (pgifDatRbC.count >= (PGIF_DAT_RB_SZ -1))
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{
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pgifConLog( "PGIF DAT BUF FULL %08X ", pgifDatRbC.count);
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}
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if (pgifDatRbC.count > 0) {
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ringBufGet(&pgifDatRbC, data);
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getIrqCmd(*data); //Checks if an IRQ CMD passes through here a triggers IRQ when it does.
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@ -556,7 +562,7 @@ void datRingBufGet(u32 *data)
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void psxGPUw(int addr, u32 data)
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{
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#if REG_LOG == 1
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Console.WriteLn("PGPU write 0x%08X = 0x%08X", addr, data);
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pgifConLog("PGPU write 0x%08X = 0x%08X", addr, data);
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#endif
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if (addr == HW_PS1_GPU_DATA) {
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@ -595,7 +601,7 @@ u32 psxGPUr(int addr)
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}
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#if REG_LOG == 1
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if (addr != HW_PS1_GPU_STATUS) //prints way too many times (pools)
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Console.WriteLn("PGPU read 0x%08X = 0x%08X EEpc= %08X ", addr, data, cpuRegs.pc);
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pgifConLog("PGPU read 0x%08X = 0x%08X EEpc= %08X ", addr, data, cpuRegs.pc);
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#endif
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return data;
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}
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@ -608,15 +614,15 @@ void PGIFw(int addr, u32 data)
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if (addr != PGIF_CTRL)
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if ((addr != PGIF_CTRL) || ((addr == PGIF_CTRL) && (getUpdPgifCtrlReg() != data)))
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if (addr != PGPU_STAT)
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Console.WriteLn("PGIF write 0x%08X = 0x%08X 0x%08X EEpc= %08X IOPpc= %08X ", addr, data, getUpdPgifCtrlReg(), cpuRegs.pc, psxRegs.pc);
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pgifConLog("PGIF write 0x%08X = 0x%08X 0x%08X EEpc= %08X IOPpc= %08X ", addr, data, getUpdPgifCtrlReg(), cpuRegs.pc, psxRegs.pc);
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#endif
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if (addr == PGPU_CMD_FIFO) {
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Console.WriteLn("PGIF CMD FIFO write by EE (SHOULDN'T HAPPEN) 0x%08X = 0x%08X", addr, data);
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pgifConLog("PGIF CMD FIFO write by EE (SHOULDN'T HAPPEN) 0x%08X = 0x%08X", addr, data);
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} else if (addr == PGPU_DAT_FIFO) { //reverse write - mind the direction set by reg f380
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//PGpuDataReg = data;
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ringBufPut(&pgifDatRbC, &data);
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// Console.WriteLn( "\n\r PGIF REVERSE !!! DATA write 0x%08X = 0x%08X IF_CTRL= %08X PGPU_STAT= %08X CmdCnt 0x%X \n\r", addr, data, getUpdPgifCtrlReg(), getUpdPgpuStatReg(), pgifCmdRbC.count);
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// pgifConLog( "\n\r PGIF REVERSE !!! DATA write 0x%08X = 0x%08X IF_CTRL= %08X PGPU_STAT= %08X CmdCnt 0x%X \n\r", addr, data, getUpdPgifCtrlReg(), getUpdPgpuStatReg(), pgifCmdRbC.count);
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drainPgpuDmaNrToIop();
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} else if (addr == PGPU_STAT) {
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PGpuStatReg = data; //Should all bits be writable?
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@ -662,7 +668,7 @@ u32 PGIFr(int addr)
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if (addr != PGPU_DAT_FIFO)
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if ((addr != PGIF_CTRL) || ((addr == PGIF_CTRL) && (getUpdPgifCtrlReg() != data)))
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if (addr != PGPU_STAT)
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Console.WriteLn("PGIF read %08X = %08X GPU_ST %08X IF_STAT %08X IOPpc %08X EEpc= %08X ", addr, data, getUpdPgpuStatReg(), getUpdPgifCtrlReg(), psxRegs.pc, cpuRegs.pc);
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pgifConLog("PGIF read %08X = %08X GPU_ST %08X IF_STAT %08X IOPpc %08X EEpc= %08X ", addr, data, getUpdPgpuStatReg(), getUpdPgifCtrlReg(), psxRegs.pc, cpuRegs.pc);
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#endif
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return data;
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}
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@ -672,7 +678,7 @@ void PGIFrQword(u32 addr, void *dat)
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u32 *data = (u32 *)dat;
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if (addr == PGPU_CMD_FIFO) { //shouldn't happen
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Console.WriteLn("PGIF QW CMD read =ERR!");
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pgifConLog("PGIF QW CMD read =ERR!");
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} else if (addr == PGPU_DAT_FIFO) {
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fillFifoOnDrain();
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datRingBufGet(data + 0);
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@ -682,11 +688,11 @@ void PGIFrQword(u32 addr, void *dat)
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fillFifoOnDrain();
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} else {
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Console.WriteLn("PGIF QWord Read from add %08X ERR - shouldnt happen!", addr);
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pgifConLog("PGIF QWord Read from add %08X ERR - shouldnt happen!", addr);
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}
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#if REG_LOG == 1
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if (addr != PGPU_DAT_FIFO)
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Console.WriteLn("PGIF QW read 0x%08X = %08X %08X %08X %08X ", addr, *(u32 *)(data + 0), *(u32 *)(data + 1), *(u32 *)(data + 2), *(u32 *)(data + 3));
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pgifConLog("PGIF QW read 0x%08X = %08X %08X %08X %08X ", addr, *(u32 *)(data + 0), *(u32 *)(data + 1), *(u32 *)(data + 2), *(u32 *)(data + 3));
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#endif
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}
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@ -694,9 +700,9 @@ void PGIFwQword(u32 addr, void *dat)
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{
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u32 *data = (u32 *)dat;
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DevCon.Warning("WARNING PGIF WRITE BY PS1DRV ! - NOT KNOWN TO EVER BE DONE!");
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Console.WriteLn("PGIF QW write 0x%08X = 0x%08X %08X %08X %08X ", addr, *(u32 *)(data + 0), *(u32 *)(data + 1), *(u32 *)(data + 2), *(u32 *)(data + 3));
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pgifConLog("PGIF QW write 0x%08X = 0x%08X %08X %08X %08X ", addr, *(u32 *)(data + 0), *(u32 *)(data + 1), *(u32 *)(data + 2), *(u32 *)(data + 3));
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if (addr == PGPU_CMD_FIFO) { //shouldn't happen
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Console.WriteLn("PGIF QW CMD write =ERR!");
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pgifConLog("PGIF QW CMD write =ERR!");
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} else if (addr == PGPU_DAT_FIFO) {
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ringBufPut(&pgifDatRbC, (u32 *)(data + 0));
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ringBufPut(&pgifDatRbC, (u32 *)(data + 1));
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@ -753,7 +759,7 @@ void drainPgpuDmaLl()
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if ((nextAddr == 0x000C8000) || (nextAddr == 0x0) || (nextAddr == 0x3))
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dntPrt++;
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// if (dntPrt <5)
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//Console.WriteLn( "LLDMAFILL nxtAdr %08X trAddr %08X wordNr %08X wCnt %08X IF_CTRL= %08X ", nextAddr, pgpuDmaTrAddr, wordNr, wCnt, getUpdPgifCtrlReg(), cpuRegs.pc, psxRegs.pc);
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//pgifConLog( "LLDMAFILL nxtAdr %08X trAddr %08X wordNr %08X wCnt %08X IF_CTRL= %08X ", nextAddr, pgpuDmaTrAddr, wordNr, wCnt, getUpdPgifCtrlReg(), cpuRegs.pc, psxRegs.pc);
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if (wCnt >= wordNr) { //Reached end of sequence, or the beginning of a new one
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//if ((nextAddr == DMA_LL_END_CODE) || (nextAddr == 0x00000000)) { //complete
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@ -767,14 +773,12 @@ void drainPgpuDmaLl()
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pgpuDmaChcr &= ~DMA_TRIGGER; //DMA is no longer active (in transfer)
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pgpuDmaChcr &= ~DMA_START_BUSY; //Transfer completed => clear busy flag
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pgpuDmaIntr(3);
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("PGPU DMA LINKED LIST FINISHED ");
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#endif
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pgifConLog("PGPU DMA LINKED LIST FINISHED ");
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} else {
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data = iopMemRead32(nextAddr);
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// Console.WriteLn( "PGPU LL DMA HDR= %08X ", data);
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// pgifConLog( "PGPU LL DMA HDR= %08X ", data);
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//data = psxHu32(nextAddr); //The (next) current header word.
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//Console.WriteLn( "PGPU LL DMA data= %08X ", data);
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//pgifConLog( "PGPU LL DMA data= %08X ", data);
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pgpuDmaMadr = data; //Copy the header word in MADR.
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//It is unknown whether the whole word should go here, but because this is a "Memory ADdress Register", leave only the address.
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pgpuDmaMadr &= 0x00FFFFFF; // correct or not?
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@ -787,7 +791,7 @@ void drainPgpuDmaLl()
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//if (wCnt < wordNr) {
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data = iopMemRead32(pgpuDmaTrAddr); //0; //psxHu32(pgpuDmaTrAddr); //Get the word of the packet from IOP RAM.
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#if LOG_PGPU_DMA == 1
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// Console.WriteLn( "PGPU LL DMA data= %08X addr %08X ", data, pgpuDmaTrAddr);
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// pgifConLog( "PGPU LL DMA data= %08X addr %08X ", data, pgpuDmaTrAddr);
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#endif
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ringBufPut(&pgifDatRbC, &data);
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pgpuDmaTrAddr += 4;
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@ -806,9 +810,7 @@ void drainPgpuDmaNrToGpu()
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if (crWordN < nrWordsN) {
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data = iopMemRead32(addrNdma); //Get the word of the packet from IOP RAM.
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#if LOG_PGPU_DMA == 1
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// Console.WriteLn( "PGPU NRM DMA data= %08X addr %08X ", data, pgpuDmaTrAddr);
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#endif
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// pgifConLog( "PGPU NRM DMA data= %08X addr %08X ", data, pgpuDmaTrAddr);
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ringBufPut(&pgifDatRbC, &data);
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addrNdma += 4;
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crWordN++;
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@ -825,9 +827,7 @@ void drainPgpuDmaNrToGpu()
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pgpuDmaChcr &= ~DMA_TRIGGER; //DMA is no longer active (in transfer)
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pgpuDmaChcr &= ~DMA_START_BUSY; //Transfer completed => clear busy flag
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pgpuDmaIntr(1);
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("PGPU DMA Norm IOP->GPU FINISHED ");
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#endif
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pgifConLog("PGPU DMA Norm IOP->GPU FINISHED ");
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}
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}
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@ -861,9 +861,7 @@ void drainPgpuDmaNrToIop()
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pgpuDmaChcr &= ~DMA_TRIGGER; //DMA is no longer active (in transfer)
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pgpuDmaChcr &= ~DMA_START_BUSY; //Transfer completed => clear busy flag
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pgpuDmaIntr(2);
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("PGPU DMA GPU->IOP FINISHED ");
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#endif
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pgifConLog("PGPU DMA GPU->IOP FINISHED ");
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}
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if (pgifDatRbC.count > 0)
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@ -876,35 +874,27 @@ void processPgpuDma()
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if ((pgpuDmaChcr & DMA_START_BUSY) == 0)
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return; //not really neessary in this case.
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pgpuDmaChcr |= DMA_TRIGGER; //DMA is active (in transfer)
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("PGPU DMA EXEC CHCR %08X BCR %08X MADR %08X ", pgpuDmaChcr, pgpuDmaBcr, pgpuDmaMadr);
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#endif
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pgifConLog("PGPU DMA EXEC CHCR %08X BCR %08X MADR %08X ", pgpuDmaChcr, pgpuDmaBcr, pgpuDmaMadr);
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if (pgpuDmaChcr & DMA_LINKED_LIST) {
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("PGPU DMA LINKED LIST WARNING!!! dir= %d ", (pgpuDmaChcr & 1)); //for (i=0;i<0x0FFFFFFF;i++) {}
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#endif
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pgifConLog("PGPU DMA LINKED LIST WARNING!!! dir= %d ", (pgpuDmaChcr & 1)); //for (i=0;i<0x0FFFFFFF;i++) {}
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if (pgpuDmaChcr & DMA_DIR_FROM_RAM) { //Linked-list only supported on direction to GPU.
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PgpuDmaLlAct = 1;
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//for the very start, the address of the first word should come for the address, stored at MADR
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nextAddr = (pgpuDmaMadr & 0x1FFFFFFF); //The address in IOP RAM where to load the first header word from
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//u32 data = iopMemRead32(nextAddr);
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//Console.WriteLn( "PGPU LL DMA data= %08X ", data);
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//pgifConLog( "PGPU LL DMA data= %08X ", data);
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wCnt = 0; //current word
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wordNr = 0; //total number of words
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("LL DMA FILL ");
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#endif
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pgifConLog("LL DMA FILL ");
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fillFifoOnDrain(); //drainPgpuDmaLl(); //fill a single word in fifo now, because otherwise PS1DRV won't know that there is aything in it and it wouldn't know that a transfer is pending.
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return;
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} else {
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Console.WriteLn("ERR: Linked list GPU DMA TO IOP!");
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pgifConLog("ERR: Linked list GPU DMA TO IOP!");
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return;
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}
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}
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#if LOG_PGPU_DMA == 1
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Console.WriteLn("WARNING! NORMAL DMA TO EE "); //for (i=0;i<0x1FFFFFFF;i++) {}
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#endif
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pgifConLog("WARNING! NORMAL DMA TO EE "); //for (i=0;i<0x1FFFFFFF;i++) {}
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crWordN = 0;
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||||
addrNdma = pgpuDmaMadr & 0x1FFFFFFF;
|
||||
nrWordsN = ((pgpuDmaBcr & 0xFFFF) * ((pgpuDmaBcr >> 16) & 0xFFFF));
|
||||
|
@ -913,9 +903,7 @@ void processPgpuDma()
|
|||
PgpuDmaNrActToGpu = 1;
|
||||
fillFifoOnDrain(); //drainPgpuDmaNrToGpu();
|
||||
} else {
|
||||
#if LOG_PGPU_DMA == 1
|
||||
Console.WriteLn(" NORMAL DMA TO IOP ");
|
||||
#endif
|
||||
pgifConLog(" NORMAL DMA TO IOP ");
|
||||
PgpuDmaNrActToIop = 1;
|
||||
drainPgpuDmaNrToIop();
|
||||
}
|
||||
|
@ -942,18 +930,16 @@ u32 psxDma2GpuR(u32 addr)
|
|||
//maybe it just writes to it twice...? or maybe it comes as a high 16-bit write... - todo: find the writer.
|
||||
} else if (addr == PGPU_DMA_TADR) {
|
||||
data = pgpuDmaTadr;
|
||||
Console.WriteLn("PGPU DMA read TADR !!! ");
|
||||
pgifConLog("PGPU DMA read TADR !!! ");
|
||||
}
|
||||
if (addr != PGPU_DMA_CHCR)
|
||||
Console.WriteLn("PGPU DMA read 0x%08X = 0x%08X", addr, data);
|
||||
pgifConLog("PGPU DMA read 0x%08X = 0x%08X", addr, data);
|
||||
return data;
|
||||
}
|
||||
|
||||
void psxDma2GpuW(u32 addr, u32 data)
|
||||
{
|
||||
#if LOG_PGPU_DMA == 1
|
||||
Console.WriteLn("PGPU DMA write 0x%08X = 0x%08X", addr, data);
|
||||
#endif
|
||||
pgifConLog("PGPU DMA write 0x%08X = 0x%08X", addr, data);
|
||||
addr &= 0x1FFFFFFF;
|
||||
if (addr == PGPU_DMA_MADR) {
|
||||
pgpuDmaMadr = (data & 0x00FFFFFF);
|
||||
|
@ -966,7 +952,7 @@ void psxDma2GpuW(u32 addr, u32 data)
|
|||
}
|
||||
} else if (addr == PGPU_DMA_TADR) {
|
||||
pgpuDmaTadr = data;
|
||||
Console.WriteLn("PGPU DMA read TADR !!! ");
|
||||
pgifConLog("PGPU DMA read TADR !!! ");
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -981,18 +967,18 @@ void psxDma2GpuW(u32 addr, u32 data)
|
|||
//BIOS POST
|
||||
void ps12PostOut(u32 mem, u8 value)
|
||||
{
|
||||
Console.WriteLn("XXXXXXXXXXXXXXXXXXXXXXX PS12 POST = %02X ", value);
|
||||
pgifConLog("XXXXXXXXXXXXXXXXXXXXXXX PS12 POST = %02X ", value);
|
||||
//iopMemWrite32(0x0000B9B0, 1); //a bit of high-level emulation to enable DUART TTY in PS1 kernel...which doesn't work
|
||||
}
|
||||
|
||||
|
||||
void psDuartW(u32 mem, u8 value)
|
||||
{
|
||||
Console.WriteLn("XXXXXXXXXXXXXXXXXXXXXXX DUART reg %08X = %02X >%c<", mem, value, value);
|
||||
pgifConLog("XXXXXXXXXXXXXXXXXXXXXXX DUART reg %08X = %02X >%c<", mem, value, value);
|
||||
if ((mem & 0x1FFFFFFF) == 0x1F802023) {
|
||||
Console.WriteLn("XXXXXXXXXXXXXXXXXXXXXXX DUART A = %02X >%c<", value, value);
|
||||
pgifConLog("XXXXXXXXXXXXXXXXXXXXXXX DUART A = %02X >%c<", value, value);
|
||||
} else if ((mem & 0x1FFFFFFF) == 0x1F80202B) {
|
||||
Console.WriteLn("XXXXXXXXXXXXXXXXXXXXXXX DUART B = %02X >%c<", value, value);
|
||||
pgifConLog("XXXXXXXXXXXXXXXXXXXXXXX DUART B = %02X >%c<", value, value);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1011,7 +997,7 @@ u32 getIntTmrKReg(u32 mem, u32 data)
|
|||
{
|
||||
u32 outd = data;
|
||||
if (PGifCtrlReg != 0) {
|
||||
Console.WriteLn("XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX");
|
||||
pgifConLog("XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX");
|
||||
//outd = 0;
|
||||
outd = 0x7FFFFFFF;
|
||||
}
|
||||
|
@ -1022,7 +1008,7 @@ void HPCoS_print(u32 mem, u32 data)
|
|||
{
|
||||
int i;
|
||||
if ((mem & 0x1FFFFFFF) == 0x1103A0) {
|
||||
//Console.WriteLn("HPCoS BufPnt = %08X ", data);
|
||||
//pgifConLog("HPCoS BufPnt = %08X ", data);
|
||||
char str[201];
|
||||
//if (data == 0) {
|
||||
for (i = 0; i < 200; i++) {
|
||||
|
@ -1031,10 +1017,10 @@ void HPCoS_print(u32 mem, u32 data)
|
|||
break;
|
||||
}
|
||||
str[i] = 0;
|
||||
// Console.WriteLn(" FFFFFFFFFFFFFFFFFFFFFFFFFFFF >%s< ", str);
|
||||
// pgifConLog(" FFFFFFFFFFFFFFFFFFFFFFFFFFFF >%s< ", str);
|
||||
//}
|
||||
} //else if ((mem & 0x1FFFFFFF) == 0x117328) {
|
||||
// Console.WriteLn("HPCoS BufAdr = %08X >%c<", data, data);
|
||||
// pgifConLog("HPCoS BufAdr = %08X >%c<", data, data);
|
||||
|
||||
//}
|
||||
}
|
||||
|
@ -1047,7 +1033,7 @@ void anyIopLS(u32 addr, u32 data, int Wr)
|
|||
//#define nrRuns 0xFFFFFF
|
||||
#define nrRuns 0xFFFFFFF
|
||||
//if ((startPrntPc > nrRuns) && (startPrntPc < (nrRuns + 2000)))
|
||||
// Console.WriteLn( "MEM %d 0x%08X = 0x%08X IOPpc= %08X ", Wr, addr, data, psxRegs.pc);
|
||||
// pgifConLog( "MEM %d 0x%08X = 0x%08X IOPpc= %08X ", Wr, addr, data, psxRegs.pc);
|
||||
//else
|
||||
if (startPrntPc <= (nrRuns + 2000))
|
||||
startPrntPc++;
|
||||
|
|
Loading…
Reference in New Issue