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recVtlb: Align dispatcher to 32B boundary 

Better for cache coherency
This commit is contained in:
Gregory Hainaut 2015-12-20 16:47:29 +01:00
parent a6eb871b42
commit 812a2e4850
1 changed files with 6 additions and 2 deletions
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8
pcsx2/x86/ix86-32/recVTLB.cpp
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@ -252,14 +252,18 @@ static __pagealigned u8 m_IndirectDispatchers[__pagesize];
// //
static u8* GetIndirectDispatcherPtr( int mode, int operandsize, int sign = 0 ) static u8* GetIndirectDispatcherPtr( int mode, int operandsize, int sign = 0 )
{ {
assert(mode || operandsize >= 2 ? !sign : true);
// Each dispatcher is aligned to 64 bytes. The actual dispatchers are only like // Each dispatcher is aligned to 64 bytes. The actual dispatchers are only like
// 20-some bytes each, but 64 byte alignment on functions that are called // 20-some bytes each, but 64 byte alignment on functions that are called
// more frequently than a hot sex hotline at 1:15am is probably a good thing. // more frequently than a hot sex hotline at 1:15am is probably a good thing.
// 7*64? 5 widths with two sign extension modes for 8 and 16 bit reads // 7*64? 5 widths with two sign extension modes for 8 and 16 bit reads
assert(mode || operandsize >= 2 ? !sign : true); // Gregory: a 32 bytes alignment is likely enough and more cache friendly
return &m_IndirectDispatchers[(mode*(7*64)) + (sign*5*64) + (operandsize*64)]; const int A = 32;
return &m_IndirectDispatchers[(mode*(7*A)) + (sign*5*A) + (operandsize*A)];
} }
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------