mirror of https://github.com/PCSX2/pcsx2.git
DEV9: Implement a slightly less hacky (incomplete) DVE reg set
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parent
14fd42ad91
commit
7bf18a4464
109
pcsx2/Memory.cpp
109
pcsx2/Memory.cpp
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@ -56,6 +56,12 @@ BIOS
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int MemMode = 0; // 0 is Kernel Mode, 1 is Supervisor Mode, 2 is User Mode
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static int s_ba6 = 0;
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static u16 s_ba[0xff];
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static u16 s_dve_regs[0xff];
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static bool s_ba_command_executing = false;
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static bool s_ba_error_detected = false;
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static u16 s_ba_current_reg = 0;
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void memSetKernelMode() {
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//Do something here
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MemMode = 0;
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@ -68,18 +74,87 @@ void memSetUserMode() {
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}
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// These regs are related to DEV9 and DVE stuff, we don't have to go crazy with this, but this sucks less than the original code
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void ba0W16(u32 mem, u16 value)
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{
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//MEM_LOG("ba000000 Memory write16 address %x value %x", mem, value);
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u32 masked_mem = (mem & 0xFF);
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if (masked_mem == 0x6) // Status Reg
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{
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s_ba[0x6] &= ~3;
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}
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else
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s_ba[masked_mem] = value;
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if (masked_mem == 0x00) // Command Execute Reg
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{
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if (s_ba[0x2] == 0x4F || s_ba[0x2] == 0x41)
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{
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DevCon.Warning("Error running DVE command, Control Reg value set to %x", value);
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s_ba_error_detected = true;
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}
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else if (s_ba[masked_mem] & 0x80) // Start executing
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{
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if (s_ba[0x2] == 0x43) // Write Mode
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{
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int size = (s_ba[masked_mem] & 0xF);
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s_ba_current_reg = s_ba[0x10];
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size--;
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// 0x10->0x22 seems to be some sort of FIFO, with 0x10 generally being the register to read/write
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for (int i = 0; i < size; i++)
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{
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s_dve_regs[s_ba_current_reg] = s_ba[0x12 + i];
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}
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s_ba_command_executing = true;
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s_ba_error_detected = false;
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}
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else if(s_ba[0x2] == 0x42) // Read Mode
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{
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int size = (s_ba[masked_mem] & 0xF);
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for (int i = 0; i < size; i++)
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s_ba[0x10 + i] = s_dve_regs[s_ba_current_reg]; // Probably not right but we don't access the real regs, will be enough for now.
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s_ba_command_executing = true;
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s_ba_error_detected = false;
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}
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}
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}
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else if (masked_mem == 0xA) // Power/Standby (?) Reg
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{
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if (value == 0)
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s_ba_error_detected = true;
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else
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s_ba_error_detected = false;
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DevCon.Warning("DVE powered %s", value == 0 ? "off" : "on");
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}
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}
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u16 ba0R16(u32 mem)
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{
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//MEM_LOG("ba00000 Memory read16 address %x", mem);
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//MEM_LOG("ba000000 Memory read16 address %x", mem);
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if (mem == 0x1a000006)
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{
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s_ba6++;
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if (s_ba6 == 3)
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s_ba6 = 0;
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return s_ba6;
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// 0xba00000A bit 0 is kind of an "on" switch. bit 0 of ba000006 seems to be the powered off/error bit.
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// bit 1 in ba000006 seems to be "ready".
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u16 return_val = (s_ba[0x6] & 2);
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if (s_ba_error_detected)
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return_val |= 1;
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if (s_ba[0x6] < 3 && s_ba_command_executing)
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s_ba[0x6]++;
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else
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s_ba_command_executing = false;
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return return_val;
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}
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return 0;
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return s_ba[mem & 0x1F];
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}
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#define CHECK_MEM(mem) //MyMemCheck(mem)
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@ -282,6 +357,7 @@ static mem16_t _ext_memRead16(u32 mem)
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MEM_LOG("b800000 Memory read16 address %x", mem);
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return 0;
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case 5: // ba0
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MEM_LOG("ba000000 Memory read16 address %x", mem);
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return ba0R16(mem);
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case 6: // gsm
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return gsRead16(mem);
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@ -380,7 +456,8 @@ static void _ext_memWrite16(u32 mem, mem16_t value)
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{
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switch (p) {
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case 5: // ba0
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MEM_LOG("ba00000 Memory write16 to address %x with data %x", mem, value);
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MEM_LOG("ba000000 Memory write16 address %x value %x", mem, value);
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ba0W16(mem, value);
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return;
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case 6: // gsm
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gsWrite16(mem, value); return;
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@ -827,7 +904,16 @@ void memReset()
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vtlb_VMap(0x00000000,0x00000000,0x20000000);
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vtlb_VMapUnmap(0x20000000,0x60000000);
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s_ba6 = 0;
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std::memset(s_ba, 0, sizeof(s_ba));
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s_ba[0xA] = 1; // Power on
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s_ba_command_executing = false;
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s_ba_error_detected = false;
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s_ba_current_reg = 0;
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std::memset(s_dve_regs, 0, sizeof(s_dve_regs));
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s_dve_regs[0x7e] = 0x1C; // Status register. 0x1C seems to be the value it's expecting for everything being OK.
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// BIOS is included in eeMem, so it needs to be copied after zeroing.
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std::memset(eeMem, 0, sizeof(*eeMem));
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@ -841,6 +927,11 @@ void memRelease()
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bool SaveStateBase::memFreeze()
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{
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Freeze(s_ba6);
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Freeze(s_ba);
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Freeze(s_dve_regs);
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Freeze(s_ba_command_executing);
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Freeze(s_ba_error_detected);
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Freeze(s_ba_current_reg);
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return IsOkay();
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}
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@ -126,5 +126,5 @@ static __fi void memRead128(u32 mem, mem128_t& out) { memRead128(mem, &out); }
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static __fi void memWrite128(u32 mem, const mem128_t* val) { vtlb_memWrite128(mem, r128_load(val)); }
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static __fi void memWrite128(u32 mem, const mem128_t& val) { vtlb_memWrite128(mem, r128_load(&val)); }
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extern void ba0W16(u32 mem, u16 value);
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extern u16 ba0R16(u32 mem);
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@ -37,7 +37,7 @@ enum class FreezeAction
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// [SAVEVERSION+]
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// This informs the auto updater that the users savestates will be invalidated.
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static const u32 g_SaveVersion = (0x9A4A << 16) | 0x0000;
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static const u32 g_SaveVersion = (0x9A4B << 16) | 0x0000;
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// the freezing data between submodules and core
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