mirror of https://github.com/PCSX2/pcsx2.git
Move various things that should be in Mdec.h there, rework the defines in VUflags.c to functions, put in 64 bit versions of the Interlocked functions I previously #if 0ed, some cleaning, and, not least, make it so Linux compiles after r399.
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@400 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
arcum42
Gregory Hainaut
parent
f7fc484e58
commit
7b2868c47b
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@ -17,6 +17,7 @@
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*/
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#include "GtkGui.h"
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void On_Dialog_Cancelled(GtkButton* button, gpointer user_data) {
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gtk_widget_destroy((GtkWidget*)gtk_widget_get_toplevel ((GtkWidget*)button));
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gtk_widget_set_sensitive(MainWindow, TRUE);
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@ -95,6 +96,7 @@ void OnDestroy(GtkObject *object, gpointer user_data) {}
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gboolean OnDelete(GtkWidget *widget, GdkEvent *event, gpointer user_data)
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{
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pcsx2_exit();
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return (FALSE);
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}
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int Pcsx2Configure() {
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if (!UseGui) return 0;
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112
pcsx2/Mdec.c
112
pcsx2/Mdec.c
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@ -24,31 +24,16 @@
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#include "PsxCommon.h"
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#include "Mdec.h"
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#define FIXED
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#define CONST_BITS 8
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#define PASS1_BITS 2
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#define FIX_1_082392200 (277)
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#define FIX_1_414213562 (362)
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#define FIX_1_847759065 (473)
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#define FIX_2_613125930 (669)
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#define MULTIPLY(var,const) (DESCALE((var) * (const), CONST_BITS))
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#define DEQUANTIZE(coef,quantval) (coef)
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#define DESCALE(x,n) ((x)>>(n))
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#define RANGE(n) (n)
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#define DCTSIZE 8
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#define DCTSIZE2 64
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int iq_y[DCTSIZE2],iq_uv[DCTSIZE2];
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static void idct1(int *block)
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{
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int val = RANGE(DESCALE(block[0], PASS1_BITS+3));
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int i;
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for(i=0;i<DCTSIZE2;i++) block[i]=val;
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int i, val;
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val = RANGE(DESCALE(block[0], PASS1_BITS+3));
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for(i=0;i<DCTSIZE2;i++)
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block[i]=val;
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}
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void idct(int *block,int k)
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@ -162,21 +147,6 @@ void idct(int *block,int k)
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}
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}
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unsigned short* rl2blk(int *blk,unsigned short *mdec_rl);
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void iqtab_init(int *iqtab,unsigned char *iq_y);
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void round_init(void);
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void yuv2rgb24(int *blk,unsigned char *image);
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void yuv2rgb15(int *blk,unsigned short *image);
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struct {
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unsigned long command;
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unsigned long status;
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unsigned short *rl;
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int rlsize;
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} mdec;
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int iq_y[DCTSIZE2],iq_uv[DCTSIZE2];
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void mdecInit(void) {
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mdec.rl = (u16*)&psxM[0x100000];
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mdec.command = 0;
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@ -209,13 +179,6 @@ u32 mdecRead0(void) {
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return mdec.command;
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}
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// mdec status:
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#define MDEC_BUSY 0x20000000
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#define MDEC_DREQ 0x18000000
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#define MDEC_FIFO 0xc0000000
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#define MDEC_RGB24 0x02000000
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#define MDEC_STP 0x00800000
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u32 mdecRead1(void) {
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#ifdef CDR_LOG
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CDR_LOG("mdec1 read %lx\n", mdec.status);
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@ -233,18 +196,14 @@ void psxDma0(u32 adr, u32 bcr, u32 chcr) {
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size = (bcr>>16)*(bcr&0xffff);
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if (cmd==0x60000000) {
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} else
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if (cmd==0x40000001) {
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u8 *p = (u8*)PSXM(adr);
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iqtab_init(iq_y,p);
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iqtab_init(iq_uv,p+64);
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} else
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if ((cmd&0xf5ff0000)==0x30000000) {
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}
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else if ((cmd&0xf5ff0000)==0x30000000) {
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mdec.rl = (u16*)PSXM(adr);
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}
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else {
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}
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HW_DMA0_CHCR &= ~0x01000000;
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psxDmaInterrupt(0);
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@ -260,7 +219,7 @@ void psxDma1(u32 adr, u32 bcr, u32 chcr) {
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if (chcr!=0x01000200) return;
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size = (bcr>>16)*(bcr&0xffff);
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image = (u16*)PSXM(adr);
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image = (u16*)PSXM(adr);
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if (mdec.command&0x08000000) {
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for (;size>0;size-=(16*16)/2,image+=(16*16)) {
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mdec.rl = rl2blk(blk,mdec.rl);
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@ -277,10 +236,6 @@ void psxDma1(u32 adr, u32 bcr, u32 chcr) {
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psxDmaInterrupt(1);
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}
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#define RUNOF(a) ((a)>>10)
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#define VALOF(a) (((int)(a)<<(32-10))>>(32-10))
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static int zscan[DCTSIZE2] = {
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0 ,1 ,8 ,16,9 ,2 ,3 ,10,
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17,24,32,25,18,11,4 ,5 ,
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@ -305,8 +260,6 @@ static int aanscales[DCTSIZE2] = {
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void iqtab_init(int *iqtab,unsigned char *iq_y)
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{
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#define CONST_BITS14 14
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#define IFAST_SCALE_BITS 2
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int i;
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for(i=0;i<DCTSIZE2;i++) {
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@ -314,7 +267,6 @@ void iqtab_init(int *iqtab,unsigned char *iq_y)
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}
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}
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#define NOP 0xfe00
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unsigned short* rl2blk(int *blk,unsigned short *mdec_rl) {
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int i,k,q_scale,rl;
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int *iqtab;
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@ -335,55 +287,13 @@ unsigned short* rl2blk(int *blk,unsigned short *mdec_rl) {
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if (k > 63) break;
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blk[zscan[k]] = (VALOF(rl) * iqtab[k] * q_scale) / 8; // / 16;
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}
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// blk[0] = (blk[0] * iq_t[0] * 8) / 16;
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// for(int j=1;j<64;j++)
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// blk[j] = blk[j] * iq_t[j] * q_scale;
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// idct
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idct(blk,k+1);
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blk+=DCTSIZE2;
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}
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return mdec_rl;
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}
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#ifdef FIXED
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#define MULR(a) ((((int)0x0000059B) * (a)) >> 10)
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#define MULG(a) ((((int)0xFFFFFEA1) * (a)) >> 10)
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#define MULG2(a) ((((int)0xFFFFFD25) * (a)) >> 10)
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#define MULB(a) ((((int)0x00000716) * (a)) >> 10)
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#else
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#define MULR(a) ((int)((float)1.40200 * (a)))
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#define MULG(a) ((int)((float)-0.3437 * (a)))
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#define MULG2(a) ((int)((float)-0.7143 * (a)))
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#define MULB(a) ((int)((float)1.77200 * (a)))
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#endif
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#define MAKERGB15(r,g,b) ( (((r)>>3)<<10)|(((g)>>3)<<5)|((b)>>3) )
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#define ROUND(c) roundtbl[((c)+128+256)]//&0x3ff]
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/*#define ROUND(c) round(c+128)
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int round(int r) {
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if (r<0) return 0;
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if (r>255) return 255;
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return r;
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}*/
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#define RGB15(n, Y) \
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image[n] = MAKERGB15(ROUND(Y + R),ROUND(Y + G),ROUND(Y + B));
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#define RGB15BW(n, Y) \
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image[n] = MAKERGB15(ROUND(Y),ROUND(Y),ROUND(Y));
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#define RGB24(n, Y) \
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image[n+2] = ROUND(Y + R); \
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image[n+1] = ROUND(Y + G); \
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image[n+0] = ROUND(Y + B);
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#define RGB24BW(n, Y) \
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image[n+2] = ROUND(Y); \
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image[n+1] = ROUND(Y); \
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image[n+0] = ROUND(Y);
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unsigned char roundtbl[256*3];
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void round_init(void) {
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79
pcsx2/Mdec.h
79
pcsx2/Mdec.h
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@ -19,6 +19,72 @@
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#ifndef __MDEC_H__
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#define __MDEC_H__
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// mdec status:
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#define MDEC_BUSY 0x20000000
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#define MDEC_DREQ 0x18000000
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#define MDEC_FIFO 0xc0000000
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#define MDEC_RGB24 0x02000000
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#define MDEC_STP 0x00800000
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#define CONST_BITS 8
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#define PASS1_BITS 2
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#define CONST_BITS14 14
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#define IFAST_SCALE_BITS 2
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#define FIX_1_082392200 (277)
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#define FIX_1_414213562 (362)
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#define FIX_1_847759065 (473)
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#define FIX_2_613125930 (669)
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#define MULTIPLY(var,const) (DESCALE((var) * (const), CONST_BITS))
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#define DEQUANTIZE(coef,quantval) (coef)
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#define DESCALE(x,n) ((x)>>(n))
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#define RANGE(n) (n)
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#define DCTSIZE 8
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#define DCTSIZE2 64
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#define RUNOF(a) ((a)>>10)
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#define VALOF(a) (((int)(a)<<(32-10))>>(32-10))
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#define NOP 0xfe00
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#define FIXED
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#ifdef FIXED
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#define MULR(a) ((((int)0x0000059B) * (a)) >> 10)
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#define MULG(a) ((((int)0xFFFFFEA1) * (a)) >> 10)
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#define MULG2(a) ((((int)0xFFFFFD25) * (a)) >> 10)
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#define MULB(a) ((((int)0x00000716) * (a)) >> 10)
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#else
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#define MULR(a) ((int)((float)1.40200 * (a)))
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#define MULG(a) ((int)((float)-0.3437 * (a)))
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#define MULG2(a) ((int)((float)-0.7143 * (a)))
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#define MULB(a) ((int)((float)1.77200 * (a)))
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#endif
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#define MAKERGB15(r,g,b) ( (((r)>>3)<<10)|(((g)>>3)<<5)|((b)>>3) )
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#define ROUND(c) roundtbl[((c)+128+256)]//&0x3ff]
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#define RGB15(n, Y) \
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image[n] = MAKERGB15(ROUND(Y + R),ROUND(Y + G),ROUND(Y + B));
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#define RGB15BW(n, Y) \
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image[n] = MAKERGB15(ROUND(Y),ROUND(Y),ROUND(Y));
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#define RGB24(n, Y) \
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image[n+2] = ROUND(Y + R); \
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image[n+1] = ROUND(Y + G); \
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image[n+0] = ROUND(Y + B);
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#define RGB24BW(n, Y) \
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image[n+2] = ROUND(Y); \
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image[n+1] = ROUND(Y); \
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image[n+0] = ROUND(Y);
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void mdecInit();
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void mdecWrite0(u32 data);
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void mdecWrite1(u32 data);
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@ -28,4 +94,17 @@ void psxDma0(u32 madr, u32 bcr, u32 chcr);
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void psxDma1(u32 madr, u32 bcr, u32 chcr);
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int mdecFreeze(gzFile f, int Mode);
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unsigned short* rl2blk(int *blk,unsigned short *mdec_rl);
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void iqtab_init(int *iqtab,unsigned char *iq_y);
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void round_init(void);
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void yuv2rgb24(int *blk,unsigned char *image);
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void yuv2rgb15(int *blk,unsigned short *image);
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struct {
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unsigned long command;
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unsigned long status;
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unsigned short *rl;
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int rlsize;
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} mdec;
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#endif /* __MDEC_H__ */
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22
pcsx2/Misc.h
22
pcsx2/Misc.h
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@ -249,7 +249,7 @@ void * memcpy_amd_(void *dest, const void *src, size_t n);
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//#define memcpy_fast memcpy //Dont use normal memcpy, it has sse in 2k5!
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#else
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// for now disable linux fast memcpy
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#define memcpy_fast memcpy_pcsx2
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#define memcpy_fast memcpy
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#endif
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#endif
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@ -345,17 +345,24 @@ static __forceinline long InterlockedDecrement( long* Addend )
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return InterlockedExchangeAdd( Addend, -1 );
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}
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#if 0 // These don't work, but are also never called.
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static __forceinline long InterlockedCompareExchange(volatile long *dest, long exch, long comp)
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{
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long old;
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#ifdef __x86_64__
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__asm__ __volatile__
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(
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"lock; cmpxchgq %q2, %1"
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: "=a" (old), "=m" (*dest)
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: "r" (exch), "m" (*dest), "0" (comp));
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#else
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__asm__ __volatile__
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(
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"lock; cmpxchgl %2, %0"
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: "=m" (*dest), "=a" (old)
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: "r" (exch), "m" (*dest), "a" (comp)
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);
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#endif
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return(old);
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}
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@ -368,17 +375,24 @@ static __forceinline long InterlockedCompareExchangePointer(PVOID volatile *dest
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// that matches the size of the pointer type, so no need to ifdef it like the std non-compare
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// exchange.
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#ifdef __x86_64__
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__asm__ __volatile__
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(
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"lock; cmpxchgq %q2, %1"
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: "=a" (old), "=m" (*dest)
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: "r" (exch), "m" (*dest), "0" (comp)
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);
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#else
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__asm__ __volatile__
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(
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"lock; cmpxchgl %2, %0"
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: "=m" (*dest), "=a" (old)
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: "r" (exch), "m" (*dest), "a" (comp)
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);
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#endif
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return(old);
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}
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#endif
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#endif
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extern void InitCPUTicks();
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extern u64 GetTickFrequency();
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|
|
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|
|
@ -27,7 +27,7 @@ static int branch = 0;
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static int branch2 = 0;
|
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static u32 branchPC;
|
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|
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static void doBranch(tar); // forward declared prototype
|
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static void doBranch(s32 tar); // forward declared prototype
|
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|
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// Subsets
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extern void (*psxBSC[64])();
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|
|
@ -736,7 +736,7 @@ static __forceinline void execI() {
|
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}
|
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|
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static void doBranch(tar) {
|
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static void doBranch(s32 tar) {
|
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branch2 = branch = 1;
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branchPC = tar;
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execI();
|
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|
|
|
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91
pcsx2/VU0.c
91
pcsx2/VU0.c
|
|
@ -129,7 +129,7 @@ void QMTC2() {
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}
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if (_Fs_ == 0) return;
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VU0.VF[_Fs_].UD[0] = cpuRegs.GPR.r[_Rt_].UD[0];
|
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VU0.VF[_Fs_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1];
|
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VU0.VF[_Fs_].UD[1] = cpuRegs.GPR.r[_Rt_].UD[1];
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}
|
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|
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void CFC2() {
|
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|
|
@ -175,9 +175,7 @@ void CTC2() {
|
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case REG_CMSAR1: // REG_CMSAR1
|
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if (!(VU0.VI[REG_VPU_STAT].UL & 0x100) ) {
|
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VU1.VI[REG_TPC].UL = cpuRegs.GPR.r[_Rt_].US[0];
|
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//FreezeXMMRegs(1);
|
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vu1ExecMicro(VU1.VI[REG_TPC].UL); // Execute VU1 Micro SubRoutine
|
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//FreezeXMMRegs(0);
|
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}
|
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break;
|
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default:
|
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|
|
@ -189,8 +187,17 @@ void CTC2() {
|
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//---------------------------------------------------------------------------------------
|
||||
|
||||
|
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#define SYNCMSFLAGS() VU0.VI[REG_STATUS_FLAG].UL = VU0.statusflag; VU0.VI[REG_MAC_FLAG].UL = VU0.macflag;
|
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#define SYNCFDIV() VU0.VI[REG_Q].UL = VU0.q.UL; VU0.VI[REG_STATUS_FLAG].UL = VU0.statusflag;
|
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__forceinline void SYNCMSFLAGS()
|
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{
|
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VU0.VI[REG_STATUS_FLAG].UL = VU0.statusflag;
|
||||
VU0.VI[REG_MAC_FLAG].UL = VU0.macflag;
|
||||
}
|
||||
|
||||
__forceinline void SYNCFDIV()
|
||||
{
|
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VU0.VI[REG_Q].UL = VU0.q.UL;
|
||||
VU0.VI[REG_STATUS_FLAG].UL = VU0.statusflag;
|
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}
|
||||
|
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void VABS() { VU0.code = cpuRegs.code; _vuABS(&VU0); }
|
||||
void VADD() { VU0.code = cpuRegs.code; _vuADD(&VU0); SYNCMSFLAGS(); }
|
||||
|
|
@ -331,25 +338,49 @@ void VFCSET() { VU0.code = cpuRegs.code; _vuFCSET(&VU0); }
|
|||
void VFCGET() { VU0.code = cpuRegs.code; _vuFCGET(&VU0); }
|
||||
void VXITOP() { VU0.code = cpuRegs.code; _vuXITOP(&VU0); }
|
||||
|
||||
#define CP2COND (/*(VU0.VI[REG_VPU_STAT].US[0] & 1) | */((VU0.VI[REG_VPU_STAT].US[0] >> 8) & 1))
|
||||
#define CP2COND (((VU0.VI[REG_VPU_STAT].US[0] >> 8) & 1))
|
||||
|
||||
#define BC2(cond) \
|
||||
if (CP2COND cond) { \
|
||||
SysPrintf("VU0 Macro Branch \n"); \
|
||||
intDoBranch(_BranchTarget_); \
|
||||
void BC2F()
|
||||
{
|
||||
if (CP2COND == 0)
|
||||
{
|
||||
SysPrintf("VU0 Macro Branch \n");
|
||||
intDoBranch(_BranchTarget_);
|
||||
}
|
||||
}
|
||||
void BC2T()
|
||||
{
|
||||
if (CP2COND == 1)
|
||||
{
|
||||
SysPrintf("VU0 Macro Branch \n");
|
||||
intDoBranch(_BranchTarget_);
|
||||
}
|
||||
}
|
||||
|
||||
void BC2F() { BC2(== 0);}
|
||||
void BC2T() { BC2(== 1);}
|
||||
|
||||
#define BC2L(cond) \
|
||||
if (CP2COND cond) { \
|
||||
SysPrintf("VU0 Macro Branch \n"); \
|
||||
intDoBranch(_BranchTarget_); \
|
||||
} else cpuRegs.pc+= 4;
|
||||
|
||||
void BC2FL() { BC2L(== 0);}
|
||||
void BC2TL() { BC2L(== 1);}
|
||||
void BC2FL()
|
||||
{
|
||||
if (CP2COND == 0)
|
||||
{
|
||||
SysPrintf("VU0 Macro Branch \n");
|
||||
intDoBranch(_BranchTarget_);
|
||||
}
|
||||
else
|
||||
{
|
||||
cpuRegs.pc+= 4;
|
||||
}
|
||||
}
|
||||
void BC2TL()
|
||||
{
|
||||
if (CP2COND == 1)
|
||||
{
|
||||
SysPrintf("VU0 Macro Branch \n");
|
||||
intDoBranch(_BranchTarget_);
|
||||
}
|
||||
else
|
||||
{
|
||||
cpuRegs.pc+= 4;
|
||||
}
|
||||
}
|
||||
|
||||
void vu0Finish()
|
||||
{
|
||||
|
|
@ -373,29 +404,11 @@ void vu0Finish()
|
|||
}
|
||||
|
||||
void VCALLMS() {
|
||||
//FreezeXMMRegs(1);
|
||||
|
||||
vu0Finish();
|
||||
vu0ExecMicro(((cpuRegs.code >> 6) & 0x7FFF) * 8);
|
||||
//FreezeXMMRegs(0);
|
||||
}
|
||||
|
||||
void VCALLMSR() {
|
||||
//FreezeXMMRegs(1);
|
||||
vu0Finish();
|
||||
vu0ExecMicro(VU0.VI[REG_CMSAR0].US[0] * 8);
|
||||
//FreezeXMMRegs(0);
|
||||
}
|
||||
|
||||
#ifndef _MSC_VER
|
||||
|
||||
/*u32* GET_VU_MEM(VURegs* VU, u32 addr)
|
||||
{
|
||||
if( VU == g_pVU1 ) return (u32*)(VU1.Mem+(addr&0x3fff));
|
||||
|
||||
if( addr >= 0x4200 ) return &VU1.VI[(addr>>2)&0x1f].UL;
|
||||
|
||||
return (u32*)(VU0.Mem+(addr&0x0fff));
|
||||
}*/
|
||||
|
||||
#endif
|
||||
|
|
|
|||
105
pcsx2/VUflags.c
105
pcsx2/VUflags.c
|
|
@ -43,47 +43,76 @@ __inline void vuUpdateDI(VURegs * VU) {
|
|||
// VU->statusflag|= (Flag_D | (VU0.VI[REG_STATUS_FLAG].US[0] >> 5)) << 11;
|
||||
}
|
||||
|
||||
#define VU_MAC_UPDATE(name, shift) \
|
||||
u32 name(VURegs * VU, float f) { \
|
||||
u32 v = *(u32*)&f; \
|
||||
int exp = (v >> 23) & 0xff; \
|
||||
u32 s = v & 0x80000000; \
|
||||
\
|
||||
if (s) VU->macflag |= 0x0010<<shift; \
|
||||
else VU->macflag &= ~(0x0010<<shift); \
|
||||
\
|
||||
if( f == 0 ) { \
|
||||
VU->macflag = (VU->macflag & ~(0x1100<<shift)) | (0x0001<<shift); \
|
||||
return v; \
|
||||
} \
|
||||
\
|
||||
switch(exp) { \
|
||||
case 0: \
|
||||
VU->macflag = (VU->macflag&~(0x1000<<shift)) | (0x0101<<shift); \
|
||||
return s; \
|
||||
case 255: \
|
||||
VU->macflag = (VU->macflag&~(0x0100<<shift)) | (0x1000<<shift); \
|
||||
return s|0x7f7fffff; /* max allowed */ \
|
||||
default: \
|
||||
VU->macflag = (VU->macflag & ~(0x1101<<shift)); \
|
||||
return v; \
|
||||
} \
|
||||
} \
|
||||
__forceinline u32 VU_MAC_UPDATE( int shift, VURegs * VU, float f)
|
||||
{
|
||||
u32 v = *(u32*)&f;
|
||||
int exp = (v >> 23) & 0xff;
|
||||
u32 s = v & 0x80000000;
|
||||
|
||||
if (s)
|
||||
VU->macflag |= 0x0010<<shift;
|
||||
else
|
||||
VU->macflag &= ~(0x0010<<shift);
|
||||
|
||||
if( f == 0 )
|
||||
{
|
||||
VU->macflag = (VU->macflag & ~(0x1100<<shift)) | (0x0001<<shift);
|
||||
return v;
|
||||
}
|
||||
|
||||
switch(exp)
|
||||
{
|
||||
case 0:
|
||||
VU->macflag = (VU->macflag&~(0x1000<<shift)) | (0x0101<<shift);
|
||||
return s;
|
||||
case 255:
|
||||
VU->macflag = (VU->macflag&~(0x0100<<shift)) | (0x1000<<shift);
|
||||
return s|0x7f7fffff; /* max allowed */
|
||||
default:
|
||||
VU->macflag = (VU->macflag & ~(0x1101<<shift));
|
||||
return v;
|
||||
}
|
||||
}
|
||||
|
||||
VU_MAC_UPDATE(VU_MACx_UPDATE, 3);
|
||||
VU_MAC_UPDATE(VU_MACy_UPDATE, 2);
|
||||
VU_MAC_UPDATE(VU_MACz_UPDATE, 1);
|
||||
VU_MAC_UPDATE(VU_MACw_UPDATE, 0);
|
||||
__forceinline u32 VU_MACx_UPDATE(VURegs * VU, float x)
|
||||
{
|
||||
return VU_MAC_UPDATE(3, VU, x);
|
||||
}
|
||||
|
||||
#define VU_MAC_CLEAR(name, shift) \
|
||||
void name(VURegs * VU) { \
|
||||
VU->macflag&= ~(0x1111<<shift); \
|
||||
} \
|
||||
__forceinline u32 VU_MACy_UPDATE(VURegs * VU, float y)
|
||||
{
|
||||
return VU_MAC_UPDATE(2, VU, y);
|
||||
}
|
||||
|
||||
VU_MAC_CLEAR(VU_MACx_CLEAR, 3);
|
||||
VU_MAC_CLEAR(VU_MACy_CLEAR, 2);
|
||||
VU_MAC_CLEAR(VU_MACz_CLEAR, 1);
|
||||
VU_MAC_CLEAR(VU_MACw_CLEAR, 0);
|
||||
__forceinline u32 VU_MACz_UPDATE(VURegs * VU, float z)
|
||||
{
|
||||
return VU_MAC_UPDATE(1, VU, z);
|
||||
}
|
||||
|
||||
__forceinline u32 VU_MACw_UPDATE(VURegs * VU, float w)
|
||||
{
|
||||
return VU_MAC_UPDATE(0, VU, w);
|
||||
}
|
||||
|
||||
__forceinline void VU_MACx_CLEAR(VURegs * VU)
|
||||
{
|
||||
VU->macflag&= ~(0x1111<<3);
|
||||
}
|
||||
|
||||
__forceinline void VU_MACy_CLEAR(VURegs * VU)
|
||||
{
|
||||
VU->macflag&= ~(0x1111<<2);
|
||||
}
|
||||
|
||||
__forceinline void VU_MACz_CLEAR(VURegs * VU)
|
||||
{
|
||||
VU->macflag&= ~(0x1111<<1);
|
||||
}
|
||||
|
||||
__forceinline void VU_MACw_CLEAR(VURegs * VU)
|
||||
{
|
||||
VU->macflag&= ~(0x1111<<0);
|
||||
}
|
||||
|
||||
void VU_STAT_UPDATE(VURegs * VU) {
|
||||
int newflag = 0 ;
|
||||
|
|
|
|||
|
|
@ -22,14 +22,15 @@
|
|||
#include "VU.h"
|
||||
|
||||
void vuUpdateDI(VURegs * VU);
|
||||
u32 VU_MACx_UPDATE(VURegs * VU, float x);
|
||||
u32 VU_MACy_UPDATE(VURegs * VU, float y);
|
||||
u32 VU_MACz_UPDATE(VURegs * VU, float z);
|
||||
u32 VU_MACw_UPDATE(VURegs * VU, float w);
|
||||
void VU_MACx_CLEAR(VURegs * VU);
|
||||
void VU_MACy_CLEAR(VURegs * VU);
|
||||
void VU_MACz_CLEAR(VURegs * VU);
|
||||
void VU_MACw_CLEAR(VURegs * VU);
|
||||
__forceinline u32 VU_MAC_UPDATE( int shift, VURegs * VU, float f);
|
||||
__forceinline u32 VU_MACx_UPDATE(VURegs * VU, float x);
|
||||
__forceinline u32 VU_MACy_UPDATE(VURegs * VU, float y);
|
||||
__forceinline u32 VU_MACz_UPDATE(VURegs * VU, float z);
|
||||
__forceinline u32 VU_MACw_UPDATE(VURegs * VU, float w);
|
||||
__forceinline void VU_MACx_CLEAR(VURegs * VU);
|
||||
__forceinline void VU_MACy_CLEAR(VURegs * VU);
|
||||
__forceinline void VU_MACz_CLEAR(VURegs * VU);
|
||||
__forceinline void VU_MACw_CLEAR(VURegs * VU);
|
||||
void VU_STAT_UPDATE(VURegs * VU);
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,16 @@
|
|||
|
||||
#include "VU.h"
|
||||
|
||||
extern __forceinline u32 VU_MAC_UPDATE( int shift, VURegs * VU, float f);
|
||||
extern __forceinline u32 VU_MACx_UPDATE(VURegs * VU, float x);
|
||||
extern __forceinline u32 VU_MACy_UPDATE(VURegs * VU, float y);
|
||||
extern __forceinline u32 VU_MACz_UPDATE(VURegs * VU, float z);
|
||||
extern __forceinline u32 VU_MACw_UPDATE(VURegs * VU, float w);
|
||||
extern __forceinline void VU_MACx_CLEAR(VURegs * VU);
|
||||
extern __forceinline void VU_MACy_CLEAR(VURegs * VU);
|
||||
extern __forceinline void VU_MACz_CLEAR(VURegs * VU);
|
||||
extern __forceinline void VU_MACw_CLEAR(VURegs * VU);
|
||||
|
||||
#define float_to_int4(x) (s32)((float)x * (1.0f / 0.0625f))
|
||||
#define float_to_int12(x) (s32)((float)x * (1.0f / 0.000244140625f))
|
||||
#define float_to_int15(x) (s32)((float)x * (1.0f / 0.000030517578125))
|
||||
|
|
|
|||
Loading…
Reference in New Issue