mirror of https://github.com/PCSX2/pcsx2.git
GS: Fix CSR.FIELD for progressive mode
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98947c10bb
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7717450044
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@ -73,6 +73,11 @@ static bool IsInterlacedVideoMode()
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return (gsVideoMode == GS_VideoMode::PAL || gsVideoMode == GS_VideoMode::NTSC || gsVideoMode == GS_VideoMode::DVD_NTSC || gsVideoMode == GS_VideoMode::DVD_PAL || gsVideoMode == GS_VideoMode::HDTV_1080I);
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return (gsVideoMode == GS_VideoMode::PAL || gsVideoMode == GS_VideoMode::NTSC || gsVideoMode == GS_VideoMode::DVD_NTSC || gsVideoMode == GS_VideoMode::DVD_PAL || gsVideoMode == GS_VideoMode::HDTV_1080I);
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}
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}
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static bool IsProgressiveVideoMode()
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{
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return (gsVideoMode == GS_VideoMode::VESA || gsVideoMode == GS_VideoMode::SDTV_480P || gsVideoMode == GS_VideoMode::SDTV_576P || gsVideoMode == GS_VideoMode::HDTV_720P || gsVideoMode == GS_VideoMode::HDTV_1080P);
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}
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void rcntReset(int index) {
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void rcntReset(int index) {
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counters[index].count = 0;
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counters[index].count = 0;
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counters[index].sCycleT = cpuRegs.cycle;
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counters[index].sCycleT = cpuRegs.cycle;
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@ -604,7 +609,11 @@ static __fi void VSyncStart(u32 sCycle)
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static __fi void GSVSync()
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static __fi void GSVSync()
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{
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{
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// CSR is swapped and GS vBlank IRQ is triggered roughly 3.5 hblanks after VSync Start
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// CSR is swapped and GS vBlank IRQ is triggered roughly 3.5 hblanks after VSync Start
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CSRreg.SwapField();
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if (IsProgressiveVideoMode())
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CSRreg.SetField();
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else
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CSRreg.SwapField();
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if (!CSRreg.VSINT)
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if (!CSRreg.VSINT)
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{
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{
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@ -145,6 +145,11 @@ union tGS_CSR
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_u32 ^= 0x2000;
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_u32 ^= 0x2000;
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}
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}
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void SetField()
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{
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_u32 |= 0x2000;
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}
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void Reset()
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void Reset()
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{
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{
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_u64 = 0;
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_u64 = 0;
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