mirror of https://github.com/PCSX2/pcsx2.git
Added a check to to clear QWC register if the upper 16bits are set. This fixes most of the broken backgrounds in movies.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@964 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -40,11 +40,22 @@ using namespace R5900;
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// dark cloud2 uses 8 bit DMAs register writes
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// dark cloud2 uses 8 bit DMAs register writes
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static __forceinline void DmaExec8( void (*func)(), u32 mem, u8 value )
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static __forceinline void DmaExec8( void (*func)(), u32 mem, u8 value )
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{
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{
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u32 qwcRegister = mem | 0x20;
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//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
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//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
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if((value & 0x1) && (psHu8(mem) & 0x1) == 0x1 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
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if((value & 0x1) && (psHu8(mem) & 0x1) == 0x1 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
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DMA_LOG( "DMAExec8 Attempt to run DMA while one is already active mem = %x", mem );
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DMA_LOG( "DMAExec8 Attempt to run DMA while one is already active mem = %x", mem );
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return;
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}
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}
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// Upper 16bits of QWC should not be written since QWC is 16bits in size.
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if ((psHu32(qwcRegister) >> 16) != 0)
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{
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DMA_LOG("DMA QWC (%x) upper 16bits set to %x\n",
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qwcRegister,
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psHu32(qwcRegister) >> 16);
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psHu32(qwcRegister) = 0;
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}
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psHu8(mem) = (u8)value;
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psHu8(mem) = (u8)value;
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if ((psHu8(mem) & 0x1) && (psHu32(DMAC_CTRL) & 0x1))
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if ((psHu8(mem) & 0x1) && (psHu32(DMAC_CTRL) & 0x1))
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{
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{
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@ -55,11 +66,22 @@ static __forceinline void DmaExec8( void (*func)(), u32 mem, u8 value )
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static __forceinline void DmaExec16( void (*func)(), u32 mem, u16 value )
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static __forceinline void DmaExec16( void (*func)(), u32 mem, u16 value )
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{
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{
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u32 qwcRegister = mem | 0x20;
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//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
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//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
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if((value & 0x100) && (psHu32(mem) & 0x100) == 0x100 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
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if((value & 0x100) && (psHu32(mem) & 0x100) == 0x100 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
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DMA_LOG( "DMAExec16 Attempt to run DMA while one is already active mem = %x", mem);
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DMA_LOG( "DMAExec16 Attempt to run DMA while one is already active mem = %x", mem);
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return;
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}
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}
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// Upper 16bits of QWC should not be written since QWC is 16bits in size.
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if ((psHu32(qwcRegister) >> 16) != 0)
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{
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DMA_LOG("DMA QWC (%x) upper 16bits set to %x\n",
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qwcRegister,
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psHu32(qwcRegister) >> 16);
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psHu32(qwcRegister) = 0;
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}
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psHu16(mem) = (u16)value;
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psHu16(mem) = (u16)value;
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if ((psHu16(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1))
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if ((psHu16(mem) & 0x100) && (psHu32(DMAC_CTRL) & 0x1))
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{
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{
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@ -70,11 +92,22 @@ static __forceinline void DmaExec16( void (*func)(), u32 mem, u16 value )
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static void DmaExec( void (*func)(), u32 mem, u32 value )
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static void DmaExec( void (*func)(), u32 mem, u32 value )
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{
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{
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u32 qwcRegister = mem | 0x20;
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//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
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//Its invalid for the hardware to write a DMA while it is active, not without Suspending the DMAC
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if((value & 0x100) && (psHu32(mem) & 0x100) == 0x100 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
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if((value & 0x100) && (psHu32(mem) & 0x100) == 0x100 && (psHu32(DMAC_CTRL) & 0x1) == 1) {
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DMA_LOG( "DMAExec32 Attempt to run DMA while one is already active mem = %x", mem );
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DMA_LOG( "DMAExec32 Attempt to run DMA while one is already active mem = %x", mem );
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return;
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}
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}
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// Upper 16bits of QWC should not be written since QWC is 16bits in size.
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if ((psHu32(qwcRegister) >> 16) != 0)
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{
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DMA_LOG("DMA QWC (%x) upper 16bits set to %x\n",
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qwcRegister,
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psHu32(qwcRegister) >> 16);
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psHu32(qwcRegister) = 0;
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}
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/* Keep the old tag if in chain mode and hw doesnt set it*/
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/* Keep the old tag if in chain mode and hw doesnt set it*/
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if( (value & 0xc) == 0x4 && (value & 0xffff0000) == 0)
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if( (value & 0xc) == 0x4 && (value & 0xffff0000) == 0)
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psHu32(mem) = (psHu32(mem) & 0xFFFF0000) | (u16)value;
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psHu32(mem) = (psHu32(mem) & 0xFFFF0000) | (u16)value;
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