From 73c15f56bdb370d9109dbd3a16c6b35a14cf2220 Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Mon, 15 Sep 2008 23:23:37 +0000 Subject: [PATCH] fixed a possible zerorec branching error. git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@124 a6443dda-0b58-4228-96e9-037be469359c --- pcsx2/x86/iVUzerorec.cpp | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/pcsx2/x86/iVUzerorec.cpp b/pcsx2/x86/iVUzerorec.cpp index 942dafa8b1..45a0e4c57e 100644 --- a/pcsx2/x86/iVUzerorec.cpp +++ b/pcsx2/x86/iVUzerorec.cpp @@ -103,8 +103,8 @@ using namespace std; #define VU_EXESIZE 0x00800000 -#define _Imm11_ ((s32)(vucode & 0x400 ? 0xfffffc00 | (vucode & 0x3ff) : vucode & 0x3ff)&0x3fff) -#define _UImm11_ ((s32)(vucode & 0x7ff)&0x3fff) +#define _Imm11_ (s32)( (vucode & 0x400) ? (0xfffffc00 | (vucode & 0x3ff)) : (vucode & 0x3ff) ) +#define _UImm11_ (s32)(vucode & 0x7ff) #define _Ft_ ((VU->code >> 16) & 0x1F) // The rt part of the instruction register #define _Fs_ ((VU->code >> 11) & 0x1F) // The rd part of the instruction register @@ -903,11 +903,10 @@ static VuFunctionHeader* SuperVURecompileProgram(u32 startpc, int vuindex) } static int _recbranchAddr(u32 vucode) { - //u32 bpc = pc + (_Imm11_ << 3); - int bpc = pc + (_Imm11_ << 3); + s32 bpc = pc + (_Imm11_ << 3); - if (bpc < 0) { //how can u32 be < 0? (rama) - SysPrintf("Warning: bpc < 0 ( %d ), this should not happen \n", bpc); + if ( bpc < 0 ) { + SysPrintf("zerorec branch warning: bpc < 0 ( %x ); Using unsigned imm11\n", bpc); bpc = pc + (_UImm11_ << 3); } bpc &= (s_MemSize[s_vu]-1);