Core: Remove trailing whitespace from all files

This commit is contained in:
TellowKrinkle 2022-09-13 21:20:25 -05:00 committed by tellowkrinkle
parent 09c41b6e20
commit 738c8cb630
187 changed files with 648 additions and 648 deletions

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@ -10,7 +10,7 @@ fi
export BINARY_NAME=$(basename "$ARGV0") export BINARY_NAME=$(basename "$ARGV0")
if [[ ! -e "$PWD/$BINARY_NAME.config" ]]; then if [[ ! -e "$PWD/$BINARY_NAME.config" ]]; then
mkdir "$PWD/$BINARY_NAME.config" mkdir "$PWD/$BINARY_NAME.config"
fi fi
export XDG_CONFIG_HOME="$PWD/$BINARY_NAME.config" export XDG_CONFIG_HOME="$PWD/$BINARY_NAME.config"
mkdir -p "$HOME"/.local/share/icons/hicolor/scalable/apps && cp "$APPDIR"/PCSX2.png "$HOME"/.local/share/icons/hicolor/scalable/apps mkdir -p "$HOME"/.local/share/icons/hicolor/scalable/apps && cp "$APPDIR"/PCSX2.png "$HOME"/.local/share/icons/hicolor/scalable/apps

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@ -1,6 +1,6 @@
# Once done, this will define # Once done, this will define
# #
# LIBC_FOUND - system has libc # LIBC_FOUND - system has libc
# LIBC_LIBRARIES - link these to use libc # LIBC_LIBRARIES - link these to use libc
if(LIBC_LIBRARIES) if(LIBC_LIBRARIES)
@ -12,7 +12,7 @@ find_library(libm NAMES m)
# OSX doesn't have rt. On Linux timer and aio dependency. # OSX doesn't have rt. On Linux timer and aio dependency.
if(APPLE) if(APPLE)
find_library(libdl NAMES dl) find_library(libdl NAMES dl)
set(LIBC_LIBRARIES ${librt} ${libdl} ${libm}) set(LIBC_LIBRARIES ${librt} ${libdl} ${libm})
elseif(Linux) elseif(Linux)
find_library(libdl NAMES dl) find_library(libdl NAMES dl)
find_library(librt NAMES rt) find_library(librt NAMES rt)
@ -23,7 +23,7 @@ else()
set(LIBC_LIBRARIES ${librt} ${libm}) set(LIBC_LIBRARIES ${librt} ${libm})
endif() endif()
# handle the QUIETLY and REQUIRED arguments and set LIBC_FOUND to TRUE if # handle the QUIETLY and REQUIRED arguments and set LIBC_FOUND to TRUE if
# all listed variables are TRUE # all listed variables are TRUE
include(FindPackageHandleStandardArgs) include(FindPackageHandleStandardArgs)
find_package_handle_standard_args(Libc DEFAULT_MSG LIBC_LIBRARIES) find_package_handle_standard_args(Libc DEFAULT_MSG LIBC_LIBRARIES)

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@ -746,7 +746,7 @@ static uint cdvdRotationalLatency(CDVD_MODE_TYPE mode)
{ {
const float rotationPerSecond = static_cast<float>(((mode == MODE_CDROM) ? CD_MIN_ROTATION_X1 : DVD_MIN_ROTATION_X1) * cdvd.Speed) / 60.0f; const float rotationPerSecond = static_cast<float>(((mode == MODE_CDROM) ? CD_MIN_ROTATION_X1 : DVD_MIN_ROTATION_X1) * cdvd.Speed) / 60.0f;
const float msPerRotation = 1000.0f / rotationPerSecond; const float msPerRotation = 1000.0f / rotationPerSecond;
return ((PSXCLK / 1000) * msPerRotation); return ((PSXCLK / 1000) * msPerRotation);
} }
else else
@ -1123,7 +1123,7 @@ __fi void cdvdReadInterrupt()
cdvdUpdateReady(CDVD_DRIVE_BUSY); cdvdUpdateReady(CDVD_DRIVE_BUSY);
cdvdUpdateStatus(CDVD_STATUS_READ); cdvdUpdateStatus(CDVD_STATUS_READ);
cdvd.WaitingDMA = false; cdvd.WaitingDMA = false;
if (!cdvd.Readed) if (!cdvd.Readed)
{ {
// Seeking finished. Process the track we requested before, and // Seeking finished. Process the track we requested before, and
@ -1166,7 +1166,7 @@ __fi void cdvdReadInterrupt()
cdvdSetIrq(); cdvdSetIrq();
return; return;
} }
if (cdvd.Reading) if (cdvd.Reading)
{ {
if (cdvd.RErr == 0) if (cdvd.RErr == 0)
@ -1288,7 +1288,7 @@ static uint cdvdStartSeek(uint newsector, CDVD_MODE_TYPE mode)
// So In the case where it's seeking to data it will be Spinning (0x2) not reading (0x8) and Seeking (0x10, but because seeking is also spinning 0x2 is also set)) // So In the case where it's seeking to data it will be Spinning (0x2) not reading (0x8) and Seeking (0x10, but because seeking is also spinning 0x2 is also set))
// Update - Apparently all that was rubbish and some games don't like it. WRC was the one in this scenario which hated SEEK |ZPAUSE, so just putting it back to pause for now. // Update - Apparently all that was rubbish and some games don't like it. WRC was the one in this scenario which hated SEEK |ZPAUSE, so just putting it back to pause for now.
// We should really run some tests for this behaviour. // We should really run some tests for this behaviour.
cdvdUpdateStatus(CDVD_STATUS_SEEK); cdvdUpdateStatus(CDVD_STATUS_SEEK);
if (!cdvd.Spinning) if (!cdvd.Spinning)
@ -1324,7 +1324,7 @@ static uint cdvdStartSeek(uint newsector, CDVD_MODE_TYPE mode)
// if delta > 0 it will read a new sector so the readInterrupt will account for this. // if delta > 0 it will read a new sector so the readInterrupt will account for this.
seektime = 0; seektime = 0;
isSeeking = false; isSeeking = false;
if (delta == 0) if (delta == 0)
{ {
//cdvd.Status = CDVD_STATUS_PAUSE; //cdvd.Status = CDVD_STATUS_PAUSE;
@ -1336,9 +1336,9 @@ static uint cdvdStartSeek(uint newsector, CDVD_MODE_TYPE mode)
// setting Readed to 0 skips the seek logic, which means the next call to // setting Readed to 0 skips the seek logic, which means the next call to
// cdvdReadInterrupt will load a block. So make sure it's properly scheduled // cdvdReadInterrupt will load a block. So make sure it's properly scheduled
// based on sector read speeds: // based on sector read speeds:
//seektime = cdvd.ReadTime; //seektime = cdvd.ReadTime;
if (!cdvd.nextSectorsBuffered)//Buffering time hasn't completed yet so cancel it and simulate the remaining time if (!cdvd.nextSectorsBuffered)//Buffering time hasn't completed yet so cancel it and simulate the remaining time
{ {
if (psxRegs.interrupt & (1 << IopEvt_CdvdSectorReady)) if (psxRegs.interrupt & (1 << IopEvt_CdvdSectorReady))

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@ -145,7 +145,7 @@ struct CDVD_API
}; };
// ---------------------------------------------------------------------------- // ----------------------------------------------------------------------------
// Multiple interface system for CDVD. // Multiple interface system for CDVD.
// ---------------------------------------------------------------------------- // ----------------------------------------------------------------------------
extern CDVD_API* CDVD; // currently active CDVD access mode api (either Iso, NoDisc, or Disc) extern CDVD_API* CDVD; // currently active CDVD access mode api (either Iso, NoDisc, or Disc)

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@ -212,7 +212,7 @@ bool IOCtlSrc::ReadDVDInfo()
// least 18 bytes of the layer descriptor or else the ioctl will fail. The // least 18 bytes of the layer descriptor or else the ioctl will fail. The
// media specific information seems to be empty, so there's no point reading // media specific information seems to be empty, so there's no point reading
// any more than that. // any more than that.
// UPDATE 15 Jan 2021 // UPDATE 15 Jan 2021
// Okay so some drives seem to have descriptors BIGGER than 22 bytes! // Okay so some drives seem to have descriptors BIGGER than 22 bytes!
// This causes the read to fail with INVALID_PARAMETER. // This causes the read to fail with INVALID_PARAMETER.

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@ -443,7 +443,7 @@ endif()
set(pcsx2USBNullSources USB/USBNull.cpp) set(pcsx2USBNullSources USB/USBNull.cpp)
set(pcsx2USBNullHeaders USB/USB.h) set(pcsx2USBNullHeaders USB/USB.h)
# USB sources # USB sources
set(pcsx2USBSources set(pcsx2USBSources
USB/USB.cpp USB/USB.cpp
USB/deviceproxy.cpp USB/deviceproxy.cpp

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@ -341,7 +341,7 @@ void CACHE()
u32 addr = cpuRegs.GPR.r[_Rs_].UL[0] + _Imm_; u32 addr = cpuRegs.GPR.r[_Rs_].UL[0] + _Imm_;
// CACHE_LOG("cpuRegs.GPR.r[_Rs_].UL[0] = %x, IMM = %x RT = %x", cpuRegs.GPR.r[_Rs_].UL[0], _Imm_, _Rt_); // CACHE_LOG("cpuRegs.GPR.r[_Rs_].UL[0] = %x, IMM = %x RT = %x", cpuRegs.GPR.r[_Rs_].UL[0], _Imm_, _Rt_);
switch (_Rt_) switch (_Rt_)
{ {
case 0x1a: //DHIN (Data Cache Hit Invalidate) case 0x1a: //DHIN (Data Cache Hit Invalidate)
doCacheHitOp(addr, "DHIN", [](CacheLine line) doCacheHitOp(addr, "DHIN", [](CacheLine line)

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@ -390,7 +390,7 @@ u32 UpdateVSyncRate()
// The PS2's vsync timer is an *independent* crystal that is fixed to either 59.94 (NTSC) // The PS2's vsync timer is an *independent* crystal that is fixed to either 59.94 (NTSC)
// or 50.0 (PAL) Hz. It has *nothing* to do with real TV timings or the real vsync of // or 50.0 (PAL) Hz. It has *nothing* to do with real TV timings or the real vsync of
// the GS's output circuit. It is the same regardless if the GS is outputting interlace // the GS's output circuit. It is the same regardless if the GS is outputting interlace
// or progressive scan content. // or progressive scan content.
const double vertical_frequency = GetVerticalFrequency(); const double vertical_frequency = GetVerticalFrequency();
@ -457,7 +457,7 @@ u32 UpdateVSyncRate()
if (video_mode_initialized) if (video_mode_initialized)
Console.WriteLn(Color_Green, "(UpdateVSyncRate) Mode Changed to %s.", ReportVideoMode()); Console.WriteLn(Color_Green, "(UpdateVSyncRate) Mode Changed to %s.", ReportVideoMode());
if (custom && video_mode_initialized) if (custom && video_mode_initialized)
Console.Indent().WriteLn(Color_StrongGreen, "... with user configured refresh rate: %.02f Hz", vertical_frequency); Console.Indent().WriteLn(Color_StrongGreen, "... with user configured refresh rate: %.02f Hz", vertical_frequency);
@ -543,7 +543,7 @@ static __fi void DoFMVSwitch()
RendererSwitched = false; RendererSwitched = false;
} }
// Convenience function to update UI thread and set patches. // Convenience function to update UI thread and set patches.
static __fi void frameLimitUpdateCore() static __fi void frameLimitUpdateCore()
{ {
DoFMVSwitch(); DoFMVSwitch();
@ -585,15 +585,15 @@ static __fi void frameLimit()
// Conversion of delta from CPU ticks (microseconds) to milliseconds // Conversion of delta from CPU ticks (microseconds) to milliseconds
s32 msec = (int) ((sDeltaTime * -1000) / (s64) GetTickFrequency()); s32 msec = (int) ((sDeltaTime * -1000) / (s64) GetTickFrequency());
// If any integer value of milliseconds exists, sleep it off. // If any integer value of milliseconds exists, sleep it off.
// Prior comments suggested that 1-2 ms sleeps were inaccurate on some OSes; // Prior comments suggested that 1-2 ms sleeps were inaccurate on some OSes;
// further testing suggests instead that this was utter bullshit. // further testing suggests instead that this was utter bullshit.
if (msec > 1) if (msec > 1)
{ {
Threading::Sleep(msec - 1); Threading::Sleep(msec - 1);
} }
// Conversion to milliseconds loses some precision; after sleeping off whole milliseconds, // Conversion to milliseconds loses some precision; after sleeping off whole milliseconds,
// spin the thread without sleeping until we finally reach our expected end time. // spin the thread without sleeping until we finally reach our expected end time.
while (GetCPUTicks() < uExpectedEnd) while (GetCPUTicks() < uExpectedEnd)
@ -628,7 +628,7 @@ static __fi void VSyncStart(u32 sCycle)
hwIntcIrq(INTC_VBLANK_S); hwIntcIrq(INTC_VBLANK_S);
psxVBlankStart(); psxVBlankStart();
if (gates) rcntStartGate(true, sCycle); // Counters Start Gate code if (gates) rcntStartGate(true, sCycle); // Counters Start Gate code
// INTC - VB Blank Start Hack -- // INTC - VB Blank Start Hack --
@ -746,7 +746,7 @@ __fi void rcntUpdate_vSync()
if (vsyncCounter.Mode == MODE_VSYNC) if (vsyncCounter.Mode == MODE_VSYNC)
{ {
VSyncEnd(vsyncCounter.sCycle); VSyncEnd(vsyncCounter.sCycle);
vsyncCounter.sCycle += vSyncInfo.Blank; vsyncCounter.sCycle += vSyncInfo.Blank;
vsyncCounter.CycleT = vSyncInfo.Render; vsyncCounter.CycleT = vSyncInfo.Render;
vsyncCounter.Mode = MODE_VRENDER; vsyncCounter.Mode = MODE_VRENDER;
@ -962,7 +962,7 @@ static __fi void rcntEndGate(bool isVblank , u32 sCycle)
// calls to rcntUpdate). // calls to rcntUpdate).
counters[i].mode.IsCounting = 1; counters[i].mode.IsCounting = 1;
counters[i].sCycleT = cpuRegs.cycle; counters[i].sCycleT = cpuRegs.cycle;
EECNT_LOG("EE Counter[%d] %s EndGate Type0, count = %x", i, EECNT_LOG("EE Counter[%d] %s EndGate Type0, count = %x", i,
isVblank ? "vblank" : "hblank", counters[i].count ); isVblank ? "vblank" : "hblank", counters[i].count );
break; break;
@ -1131,7 +1131,7 @@ __fi u16 rcntRead32( u32 mem )
case(RCNT3_MODE): return (u16)counters[3].modeval; case(RCNT3_MODE): return (u16)counters[3].modeval;
case(RCNT3_TARGET): return (u16)counters[3].target; case(RCNT3_TARGET): return (u16)counters[3].target;
} }
return psHu16(mem); return psHu16(mem);
} }

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@ -257,7 +257,7 @@ EXTERN int ThreadRun;
#define SMAP_R_RXFIFO_FRAME_CNT (SMAP_REGBASE + 0xf3C) #define SMAP_R_RXFIFO_FRAME_CNT (SMAP_REGBASE + 0xf3C)
#define SMAP_R_RXFIFO_FRAME_DEC (SMAP_REGBASE + 0xf40) #define SMAP_R_RXFIFO_FRAME_DEC (SMAP_REGBASE + 0xf40)
#define SMAP_R_RXFIFO_DATA (SMAP_REGBASE + 0x1100) #define SMAP_R_RXFIFO_DATA (SMAP_REGBASE + 0x1100)
#define SMAP_R_FIFO_ADDR (SMAP_REGBASE + 0x1200) #define SMAP_R_FIFO_ADDR (SMAP_REGBASE + 0x1200)
#define SMAP_FIFO_CMD_READ (1<<1) #define SMAP_FIFO_CMD_READ (1<<1)
#define SMAP_FIFO_DATA_SWAP (1<<0) #define SMAP_FIFO_DATA_SWAP (1<<0)

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@ -66,7 +66,7 @@ namespace PacketReader::ARP
, senderProtocolAddress{std::make_unique<u8[]>(original.protocolAddressLength)} , senderProtocolAddress{std::make_unique<u8[]>(original.protocolAddressLength)}
, targetHardwareAddress{std::make_unique<u8[]>(original.hardwareAddressLength)} , targetHardwareAddress{std::make_unique<u8[]>(original.hardwareAddressLength)}
, targetProtocolAddress{std::make_unique<u8[]>(original.protocolAddressLength)} , targetProtocolAddress{std::make_unique<u8[]>(original.protocolAddressLength)}
{ {
memcpy(senderHardwareAddress.get(), original.senderHardwareAddress.get(), hardwareAddressLength); memcpy(senderHardwareAddress.get(), original.senderHardwareAddress.get(), hardwareAddressLength);
memcpy(senderProtocolAddress.get(), original.senderProtocolAddress.get(), protocolAddressLength); memcpy(senderProtocolAddress.get(), original.senderProtocolAddress.get(), protocolAddressLength);
memcpy(targetHardwareAddress.get(), original.targetHardwareAddress.get(), hardwareAddressLength); memcpy(targetHardwareAddress.get(), original.targetHardwareAddress.get(), hardwareAddressLength);

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@ -19,7 +19,7 @@ namespace PacketReader::IP
{ {
struct IP_Address struct IP_Address
{ {
union union
{ {
u8 bytes[4]; u8 bytes[4];
u32 integer; u32 integer;

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@ -82,7 +82,7 @@ namespace PacketReader::IP
* Not Defined (xxx000) * Not Defined (xxx000)
* 6 = Internetwork Control Class 6 * 6 = Internetwork Control Class 6
* 7 = Network Control Class 7 * 7 = Network Control Class 7
* *
* Lower 3 Bits * Lower 3 Bits
* In TOS, defined as follows * In TOS, defined as follows
* bit 0: Reliability * bit 0: Reliability

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@ -75,7 +75,7 @@ using namespace std::chrono_literals;
FreeBSD FreeBSD
Raw sockets restricted Raw sockets restricted
No unprivilaged ICMP sockets No unprivilaged ICMP sockets
Timeouts reported as a normal packet?? Timeouts reported as a normal packet??
Ping cli Ping cli
Present for all platforms, but command args differ Present for all platforms, but command args differ

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@ -371,15 +371,15 @@ bool TAPGetWin32Adapter(const std::string& name, PIP_ADAPTER_ADDRESSES adapter,
* but it doesn't tell you whether it's a bridge or an LBFO team or something more exotic. * but it doesn't tell you whether it's a bridge or an LBFO team or something more exotic.
* The way to distinguish exactly which flavor of ms_implat you have is to look at which LWF driver is bound to the *virtual miniport* above the IM driver. * The way to distinguish exactly which flavor of ms_implat you have is to look at which LWF driver is bound to the *virtual miniport* above the IM driver.
* This is two steps then. * This is two steps then.
* *
* 1. Given a physical NIC, you first want to determine which virtual NIC is layered over it. * 1. Given a physical NIC, you first want to determine which virtual NIC is layered over it.
* 2. Given a virtual NIC, you want to determine whether ms_bridge is bound to it. * 2. Given a virtual NIC, you want to determine whether ms_bridge is bound to it.
* *
* To get the first part, look through the interface stack table (GetIfStackTable). Search the stack table for any entry where the lower is the IfIndex of the physical NIC. * To get the first part, look through the interface stack table (GetIfStackTable). Search the stack table for any entry where the lower is the IfIndex of the physical NIC.
* For any such entry (there will probably be a few), check if that entry's upper IfIndex is the IfIndex for a virtual miniport with component ID "COMPOSITEBUS\MS_IMPLAT_MP". * For any such entry (there will probably be a few), check if that entry's upper IfIndex is the IfIndex for a virtual miniport with component ID "COMPOSITEBUS\MS_IMPLAT_MP".
* If you find such a thing, that means the physical NIC is a member of a bridge/LBFO/something-else-fancy. * If you find such a thing, that means the physical NIC is a member of a bridge/LBFO/something-else-fancy.
* If you don't find it, then you know the NIC isn't part of the bridge that comes with Windows 8 / Windows 10. * If you don't find it, then you know the NIC isn't part of the bridge that comes with Windows 8 / Windows 10.
* *
* To get the second part, just use the same INetCfg code above on the *virtual* NIC's component. If the ms_bridge component is bound to the virtual NIC, * To get the second part, just use the same INetCfg code above on the *virtual* NIC's component. If the ms_bridge component is bound to the virtual NIC,
* then that virtual NIC is doing bridging. Otherwise, it's doing something else (like LBFO). * then that virtual NIC is doing bridging. Otherwise, it's doing something else (like LBFO).
*/ */

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@ -194,8 +194,8 @@ void tx_process()
if (dev9.txfifo_rd_ptr==16384) if (dev9.txfifo_rd_ptr==16384)
dev9.txfifo_rd_ptr=0; dev9.txfifo_rd_ptr=0;
} }
if (dev9.txfifo_rd_ptr&(~16383)) if (dev9.txfifo_rd_ptr&(~16383))
{ {
@ -612,7 +612,7 @@ void smap_write16(u32 addr, u16 value)
value = (value >> 8) | (value << 8); value = (value >> 8) | (value << 8);
dev9Ru16(addr) = value; dev9Ru16(addr) = value;
/* /*
switch (addr & 0x7) switch (addr & 0x7)
{ {
case 0: // ctrl_stat case 0: // ctrl_stat
DevCon.WriteLn("DEV9: TX_CTRL_STAT[%d]: write %x", (addr - SMAP_BD_TX_BASE) / 8, value); DevCon.WriteLn("DEV9: TX_CTRL_STAT[%d]: write %x", (addr - SMAP_BD_TX_BASE) / 8, value);
@ -642,7 +642,7 @@ void smap_write16(u32 addr, u16 value)
value = (value >> 8) | (value << 8); value = (value >> 8) | (value << 8);
dev9Ru16(addr) = value; dev9Ru16(addr) = value;
/* /*
switch (addr & 0x7) switch (addr & 0x7)
{ {
case 0: // ctrl_stat case 0: // ctrl_stat
DevCon.WriteLn("DEV9: RX_CTRL_STAT[%d]: write %x", rx_index, value); DevCon.WriteLn("DEV9: RX_CTRL_STAT[%d]: write %x", rx_index, value);
@ -772,7 +772,7 @@ void smap_write16(u32 addr, u16 value)
emu_printf("SMAP: SMAP_R_EMAC3_TxMODE0_H 16bit write %x\n", value); emu_printf("SMAP: SMAP_R_EMAC3_TxMODE0_H 16bit write %x\n", value);
dev9Ru16(addr) = value; dev9Ru16(addr) = value;
return; return;
case SMAP_R_EMAC3_TxMODE1_H: case SMAP_R_EMAC3_TxMODE1_H:
emu_printf("SMAP: SMAP_R_EMAC3_TxMODE1_H 16bit write %x\n", value); emu_printf("SMAP: SMAP_R_EMAC3_TxMODE1_H 16bit write %x\n", value);
dev9Ru16(addr) = value; dev9Ru16(addr) = value;

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@ -49,7 +49,7 @@ enum {
THS_WAIT_SUSPEND = 0x0C, THS_WAIT_SUSPEND = 0x0C,
THS_DORMANT = 0x10, THS_DORMANT = 0x10,
}; };
enum { enum {
WAIT_NONE = 0, WAIT_NONE = 0,
WAIT_WAKEUP_REQ = 1, WAIT_WAKEUP_REQ = 1,

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@ -91,7 +91,7 @@ public:
{ {
return SysTraceLog::IsActive() && EmuConfig.Trace.EE.m_EnableAll; return SysTraceLog::IsActive() && EmuConfig.Trace.EE.m_EnableAll;
} }
std::string GetCategory() const override { return "EE"; } std::string GetCategory() const override { return "EE"; }
}; };
@ -266,7 +266,7 @@ struct SysTraceLogPack
SysTraceLog_EE_Disasm COP1; SysTraceLog_EE_Disasm COP1;
SysTraceLog_EE_Disasm COP2; SysTraceLog_EE_Disasm COP2;
SysTraceLog_EE_Disasm Cache; SysTraceLog_EE_Disasm Cache;
SysTraceLog_EE_Registers KnownHw; SysTraceLog_EE_Registers KnownHw;
SysTraceLog_EE_Registers UnknownHw; SysTraceLog_EE_Registers UnknownHw;
SysTraceLog_EE_Registers DMAhw; SysTraceLog_EE_Registers DMAhw;
@ -281,7 +281,7 @@ struct SysTraceLogPack
EE_PACK(); EE_PACK();
} EE; } EE;
struct IOP_PACK struct IOP_PACK
{ {
SysTraceLog_IOP Bios; SysTraceLog_IOP Bios;

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@ -221,11 +221,11 @@ void DisassemblyManager::analyze(u32 address, u32 size = 1024)
std::vector<BranchLine> DisassemblyManager::getBranchLines(u32 start, u32 size) std::vector<BranchLine> DisassemblyManager::getBranchLines(u32 start, u32 size)
{ {
std::vector<BranchLine> result; std::vector<BranchLine> result;
auto it = findDisassemblyEntry(entries,start,false); auto it = findDisassemblyEntry(entries,start,false);
if (it != entries.end()) if (it != entries.end())
{ {
do do
{ {
it->second->getBranchLines(start,size,result); it->second->getBranchLines(start,size,result);
it++; it++;
@ -258,7 +258,7 @@ void DisassemblyManager::getLine(u32 address, bool insertSymbols, DisassemblyLin
DisassemblyEntry* entry = it->second; DisassemblyEntry* entry = it->second;
if (entry->disassemble(address,dest,insertSymbols)) if (entry->disassemble(address,dest,insertSymbols))
return; return;
if (address % 4) if (address % 4)
dest.totalSize = ((address+3) & ~3)-address; dest.totalSize = ((address+3) & ~3)-address;
else else
@ -277,7 +277,7 @@ u32 DisassemblyManager::getStartAddress(u32 address)
if (it == entries.end()) if (it == entries.end())
return address; return address;
} }
DisassemblyEntry* entry = it->second; DisassemblyEntry* entry = it->second;
int line = entry->getLineNum(address,true); int line = entry->getLineNum(address,true);
return entry->getLineAddress(line); return entry->getLineAddress(line);
@ -288,7 +288,7 @@ u32 DisassemblyManager::getNthPreviousAddress(u32 address, int n)
while (cpu->isValidAddress(address)) while (cpu->isValidAddress(address))
{ {
auto it = findDisassemblyEntry(entries,address,false); auto it = findDisassemblyEntry(entries,address,false);
while (it != entries.end()) while (it != entries.end())
{ {
DisassemblyEntry* entry = it->second; DisassemblyEntry* entry = it->second;
@ -302,10 +302,10 @@ u32 DisassemblyManager::getNthPreviousAddress(u32 address, int n)
n -= oldLineNum+1; n -= oldLineNum+1;
it = findDisassemblyEntry(entries,address,false); it = findDisassemblyEntry(entries,address,false);
} }
analyze(address-127,128); analyze(address-127,128);
} }
return address-n*4; return address-n*4;
} }
@ -314,7 +314,7 @@ u32 DisassemblyManager::getNthNextAddress(u32 address, int n)
while (cpu->isValidAddress(address)) while (cpu->isValidAddress(address))
{ {
auto it = findDisassemblyEntry(entries,address,false); auto it = findDisassemblyEntry(entries,address,false);
while (it != entries.end()) while (it != entries.end())
{ {
DisassemblyEntry* entry = it->second; DisassemblyEntry* entry = it->second;
@ -532,7 +532,7 @@ void DisassemblyFunction::load()
break; break;
} }
} }
u32 funcPos = address; u32 funcPos = address;
u32 funcEnd = address+size; u32 funcEnd = address+size;
@ -563,7 +563,7 @@ void DisassemblyFunction::load()
DisassemblyComment* comment = new DisassemblyComment(cpu,funcPos,nextPos-funcPos,".align","4"); DisassemblyComment* comment = new DisassemblyComment(cpu,funcPos,nextPos-funcPos,".align","4");
entries[funcPos] = comment; entries[funcPos] = comment;
lineAddresses.push_back(funcPos); lineAddresses.push_back(funcPos);
funcPos = nextPos; funcPos = nextPos;
opcodeSequenceStart = funcPos; opcodeSequenceStart = funcPos;
continue; continue;
@ -572,14 +572,14 @@ void DisassemblyFunction::load()
MIPSAnalyst::MipsOpcodeInfo opInfo = MIPSAnalyst::GetOpcodeInfo(cpu,funcPos); MIPSAnalyst::MipsOpcodeInfo opInfo = MIPSAnalyst::GetOpcodeInfo(cpu,funcPos);
u32 opAddress = funcPos; u32 opAddress = funcPos;
funcPos += 4; funcPos += 4;
// skip branches and their delay slots // skip branches and their delay slots
if (opInfo.isBranch) if (opInfo.isBranch)
{ {
if (funcPos < funcEnd) funcPos += 4; // only include delay slots within the function bounds if (funcPos < funcEnd) funcPos += 4; // only include delay slots within the function bounds
continue; continue;
} }
// lui // lui
if (MIPS_GET_OP(opInfo.encodedOpcode) == 0x0F && funcPos < funcEnd && funcPos != nextData) if (MIPS_GET_OP(opInfo.encodedOpcode) == 0x0F && funcPos < funcEnd && funcPos != nextData)
{ {
@ -692,7 +692,7 @@ void DisassemblyFunction::clear()
bool DisassemblyOpcode::disassemble(u32 address, DisassemblyLineInfo& dest, bool insertSymbols) bool DisassemblyOpcode::disassemble(u32 address, DisassemblyLineInfo& dest, bool insertSymbols)
{ {
char opcode[64],arguments[256]; char opcode[64],arguments[256];
std::string dis = cpu->disasm(address,insertSymbols); std::string dis = cpu->disasm(address,insertSymbols);
parseDisasm(cpu->GetSymbolMap(),dis.c_str(),opcode,arguments,insertSymbols); parseDisasm(cpu->GetSymbolMap(),dis.c_str(),opcode,arguments,insertSymbols);
dest.type = DISTYPE_OPCODE; dest.type = DISTYPE_OPCODE;
@ -770,7 +770,7 @@ bool DisassemblyMacro::disassemble(u32 address, DisassemblyLineInfo& dest, bool
{ {
case MACRO_LI: case MACRO_LI:
dest.name = name; dest.name = name;
addressSymbol = cpu->GetSymbolMap().GetLabelString(immediate); addressSymbol = cpu->GetSymbolMap().GetLabelString(immediate);
if (!addressSymbol.empty() && insertSymbols) if (!addressSymbol.empty() && insertSymbols)
{ {
@ -780,7 +780,7 @@ bool DisassemblyMacro::disassemble(u32 address, DisassemblyLineInfo& dest, bool
} }
dest.params = buffer; dest.params = buffer;
dest.info.hasRelevantAddress = true; dest.info.hasRelevantAddress = true;
dest.info.releventAddress = immediate; dest.info.releventAddress = immediate;
break; break;
@ -883,7 +883,7 @@ void DisassemblyData::createLines()
u32 pos = address; u32 pos = address;
u32 end = address+size; u32 end = address+size;
u32 maxChars = DisassemblyManager::getMaxParamChars(); u32 maxChars = DisassemblyManager::getMaxParamChars();
std::string currentLine; std::string currentLine;
u32 currentLineStart = pos; u32 currentLineStart = pos;
@ -904,7 +904,7 @@ void DisassemblyData::createLines()
DataEntry entry = {currentLine,pos-1-currentLineStart,lineCount++}; DataEntry entry = {currentLine,pos-1-currentLineStart,lineCount++};
lines[currentLineStart] = entry; lines[currentLineStart] = entry;
lineAddresses.push_back(currentLineStart); lineAddresses.push_back(currentLineStart);
currentLine = ""; currentLine = "";
currentLineStart = pos-1; currentLineStart = pos-1;
inString = false; inString = false;
@ -925,11 +925,11 @@ void DisassemblyData::createLines()
{ {
if (inString) if (inString)
currentLine += "\""; currentLine += "\"";
DataEntry entry = {currentLine,pos-1-currentLineStart,lineCount++}; DataEntry entry = {currentLine,pos-1-currentLineStart,lineCount++};
lines[currentLineStart] = entry; lines[currentLineStart] = entry;
lineAddresses.push_back(currentLineStart); lineAddresses.push_back(currentLineStart);
currentLine = ""; currentLine = "";
currentLineStart = pos-1; currentLineStart = pos-1;
inString = false; inString = false;

View File

@ -305,7 +305,7 @@ bool initPostfixExpression(const char* infix, IExpressionFunctions* funcs, Postf
while (true) while (true)
{ {
if (opcodeStack.empty()) if (opcodeStack.empty())
{ {
sprintf(expressionError,"Closing parenthesis without opening one"); sprintf(expressionError,"Closing parenthesis without opening one");
return false; return false;
} }
@ -319,7 +319,7 @@ bool initPostfixExpression(const char* infix, IExpressionFunctions* funcs, Postf
while (true) while (true)
{ {
if (opcodeStack.empty()) if (opcodeStack.empty())
{ {
sprintf(expressionError,"Closing bracket without opening one"); sprintf(expressionError,"Closing bracket without opening one");
return false; return false;
} }

View File

@ -57,19 +57,19 @@ namespace MIPSAnalyst
{ {
u32 op = r5900Debug.read32(addr); u32 op = r5900Debug.read32(addr);
const R5900::OPCODE& opcode = R5900::GetInstruction(op); const R5900::OPCODE& opcode = R5900::GetInstruction(op);
int branchType = (opcode.flags & BRANCHTYPE_MASK); int branchType = (opcode.flags & BRANCHTYPE_MASK);
if ((opcode.flags & IS_BRANCH) && (branchType == BRANCHTYPE_BRANCH || branchType == BRANCHTYPE_BC1)) if ((opcode.flags & IS_BRANCH) && (branchType == BRANCHTYPE_BRANCH || branchType == BRANCHTYPE_BC1))
return addr + 4 + ((signed short)(op&0xFFFF)<<2); return addr + 4 + ((signed short)(op&0xFFFF)<<2);
else else
return INVALIDTARGET; return INVALIDTARGET;
} }
u32 GetBranchTargetNoRA(u32 addr) u32 GetBranchTargetNoRA(u32 addr)
{ {
u32 op = r5900Debug.read32(addr); u32 op = r5900Debug.read32(addr);
const R5900::OPCODE& opcode = R5900::GetInstruction(op); const R5900::OPCODE& opcode = R5900::GetInstruction(op);
int branchType = (opcode.flags & BRANCHTYPE_MASK); int branchType = (opcode.flags & BRANCHTYPE_MASK);
if ((opcode.flags & IS_BRANCH) && (branchType == BRANCHTYPE_BRANCH || branchType == BRANCHTYPE_BC1)) if ((opcode.flags & IS_BRANCH) && (branchType == BRANCHTYPE_BRANCH || branchType == BRANCHTYPE_BC1))
{ {
@ -86,7 +86,7 @@ namespace MIPSAnalyst
{ {
u32 op = r5900Debug.read32(addr); u32 op = r5900Debug.read32(addr);
const R5900::OPCODE& opcode = R5900::GetInstruction(op); const R5900::OPCODE& opcode = R5900::GetInstruction(op);
if ((opcode.flags & IS_BRANCH) && (opcode.flags & BRANCHTYPE_MASK) == BRANCHTYPE_BRANCH) if ((opcode.flags & IS_BRANCH) && (opcode.flags & BRANCHTYPE_MASK) == BRANCHTYPE_BRANCH)
{ {
bool sure = false; bool sure = false;
@ -290,7 +290,7 @@ namespace MIPSAnalyst
} }
} }
} }
if (end) { if (end) {
// most functions are aligned to 8 or 16 bytes // most functions are aligned to 8 or 16 bytes
// add the padding to this one // add the padding to this one
@ -353,7 +353,7 @@ namespace MIPSAnalyst
case BRANCHTYPE_BRANCH: case BRANCHTYPE_BRANCH:
info.isConditional = true; info.isConditional = true;
info.branchTarget = info.opcodeAddress + 4 + ((s16)(op&0xFFFF)<<2); info.branchTarget = info.opcodeAddress + 4 + ((s16)(op&0xFFFF)<<2);
rs = info.cpu->getRegister(0,MIPS_GET_RS(op))._u64[0]; rs = info.cpu->getRegister(0,MIPS_GET_RS(op))._u64[0];
rt = info.cpu->getRegister(0,MIPS_GET_RT(op))._u64[0]; rt = info.cpu->getRegister(0,MIPS_GET_RT(op))._u64[0];
switch (opcode.flags & CONDTYPE_MASK) switch (opcode.flags & CONDTYPE_MASK)
@ -381,7 +381,7 @@ namespace MIPSAnalyst
info.conditionMet = (((s64)rs) >= 0); info.conditionMet = (((s64)rs) >= 0);
break; break;
} }
break; break;
case BRANCHTYPE_REGISTER: case BRANCHTYPE_REGISTER:
info.isConditional = false; info.isConditional = false;
@ -430,7 +430,7 @@ namespace MIPSAnalyst
info.lrType = LOADSTORE_LEFT; info.lrType = LOADSTORE_LEFT;
else if (opcode.flags & IS_RIGHT) else if (opcode.flags & IS_RIGHT)
info.lrType = LOADSTORE_RIGHT; info.lrType = LOADSTORE_RIGHT;
u32 rs = info.cpu->getRegister(0, (int)MIPS_GET_RS(op)); u32 rs = info.cpu->getRegister(0, (int)MIPS_GET_RS(op));
s16 imm16 = op & 0xFFFF; s16 imm16 = op & 0xFFFF;
info.dataAddress = rs + imm16; info.dataAddress = rs + imm16;
@ -457,7 +457,7 @@ namespace MIPSAnalyst
info.dataSize = 16; info.dataSize = 16;
break; break;
} }
info.hasRelevantAddress = true; info.hasRelevantAddress = true;
info.releventAddress = info.dataAddress; info.releventAddress = info.dataAddress;
} }

View File

@ -49,7 +49,7 @@ namespace MIPSAnalyst
DebugInterface* cpu; DebugInterface* cpu;
u32 opcodeAddress; u32 opcodeAddress;
u32 encodedOpcode; u32 encodedOpcode;
// shared between branches and conditional moves // shared between branches and conditional moves
bool isConditional; bool isConditional;
bool conditionMet; bool conditionMet;
@ -72,6 +72,6 @@ namespace MIPSAnalyst
bool hasRelevantAddress; bool hasRelevantAddress;
u32 releventAddress; u32 releventAddress;
} MipsOpcodeInfo; } MipsOpcodeInfo;
MipsOpcodeInfo GetOpcodeInfo(DebugInterface* cpu, u32 address); MipsOpcodeInfo GetOpcodeInfo(DebugInterface* cpu, u32 address);
}; };

View File

@ -27,7 +27,7 @@ public:
{ {
// //
} }
static void queueError(ErrorType type, const wchar_t* text, ...) static void queueError(ErrorType type, const wchar_t* text, ...)
{ {
// //
@ -177,7 +177,7 @@ void SplitLine(const char* Line, char* Name, char* Arguments)
*Name++ = *Line++; *Name++ = *Line++;
} }
*Name = 0; *Name = 0;
while (*Line == ' ' || *Line == '\t') Line++; while (*Line == ' ' || *Line == '\t') Line++;
while (*Line != 0) while (*Line != 0)
@ -587,7 +587,7 @@ bool CMipsInstruction::LoadEncoding(const tMipsOpcode& SourceOpcode, const char*
while (*Line == ' ' || *Line == '\t') Line++; while (*Line == ' ' || *Line == '\t') Line++;
if (*Line != 0) return false; // there's something else, bad if (*Line != 0) return false; // there's something else, bad
// opcode is ok - now set all flags // opcode is ok - now set all flags
Opcode = SourceOpcode; Opcode = SourceOpcode;
immediate.value = immediate.originalValue; immediate.value = immediate.originalValue;
@ -601,13 +601,13 @@ void CMipsInstruction::setOmittedRegisters()
// copy over omitted registers // copy over omitted registers
if (Opcode.flags & MO_RSD) if (Opcode.flags & MO_RSD)
registers.grd = registers.grs; registers.grd = registers.grs;
if (Opcode.flags & MO_RST) if (Opcode.flags & MO_RST)
registers.grt = registers.grs; registers.grt = registers.grs;
if (Opcode.flags & MO_RDT) if (Opcode.flags & MO_RDT)
registers.grt = registers.grd; registers.grt = registers.grd;
if (Opcode.flags & MO_FRSD) if (Opcode.flags & MO_FRSD)
registers.frd = registers.frs; registers.frd = registers.frs;
} }
@ -641,7 +641,7 @@ bool CMipsInstruction::Validate()
if (immediateType != MIPS_NOIMMEDIATE) if (immediateType != MIPS_NOIMMEDIATE)
{ {
immediate.originalValue = immediate.value; immediate.originalValue = immediate.value;
if (Opcode.flags & MO_IMMALIGNED) // immediate must be aligned if (Opcode.flags & MO_IMMALIGNED) // immediate must be aligned
{ {
if (immediate.value % 4) if (immediate.value % 4)
@ -657,7 +657,7 @@ bool CMipsInstruction::Validate()
} else if (Opcode.flags & MO_IPCR) // relative 16 bit value } else if (Opcode.flags & MO_IPCR) // relative 16 bit value
{ {
int num = (immediate.value-RamPos-4); int num = (immediate.value-RamPos-4);
if (num > 0x20000 || num < (-0x20000)) if (num > 0x20000 || num < (-0x20000))
{ {
Logger::queueError(Logger::Error,L"Branch target %08X out of range",immediate.value); Logger::queueError(Logger::Error,L"Branch target %08X out of range",immediate.value);
@ -665,7 +665,7 @@ bool CMipsInstruction::Validate()
} }
immediate.value = num >> 2; immediate.value = num >> 2;
} }
int immediateBits = getImmediateBits(immediateType); int immediateBits = getImmediateBits(immediateType);
unsigned int mask = (0xFFFFFFFF << (32-immediateBits)) >> (32-immediateBits); unsigned int mask = (0xFFFFFFFF << (32-immediateBits)) >> (32-immediateBits);
int digits = (immediateBits+3) / 4; int digits = (immediateBits+3) / 4;
@ -678,7 +678,7 @@ bool CMipsInstruction::Validate()
immediate.value &= mask; immediate.value &= mask;
} }
return true; return true;
} }
@ -689,11 +689,11 @@ void CMipsInstruction::encodeNormal()
if (registers.grs.num != -1) encoding |= MIPS_RS(registers.grs.num); // source reg if (registers.grs.num != -1) encoding |= MIPS_RS(registers.grs.num); // source reg
if (registers.grt.num != -1) encoding |= MIPS_RT(registers.grt.num); // target reg if (registers.grt.num != -1) encoding |= MIPS_RT(registers.grt.num); // target reg
if (registers.grd.num != -1) encoding |= MIPS_RD(registers.grd.num); // dest reg if (registers.grd.num != -1) encoding |= MIPS_RD(registers.grd.num); // dest reg
if (registers.frt.num != -1) encoding |= MIPS_FT(registers.frt.num); // float target reg if (registers.frt.num != -1) encoding |= MIPS_FT(registers.frt.num); // float target reg
if (registers.frs.num != -1) encoding |= MIPS_FS(registers.frs.num); // float source reg if (registers.frs.num != -1) encoding |= MIPS_FS(registers.frs.num); // float source reg
if (registers.frd.num != -1) encoding |= MIPS_FD(registers.frd.num); // float dest reg if (registers.frd.num != -1) encoding |= MIPS_FD(registers.frd.num); // float dest reg
if (registers.ps2vrt.num != -1) encoding |= (registers.ps2vrt.num << 16); // ps2 vector target reg if (registers.ps2vrt.num != -1) encoding |= (registers.ps2vrt.num << 16); // ps2 vector target reg
if (registers.ps2vrs.num != -1) encoding |= (registers.ps2vrs.num << 21); // ps2 vector source reg if (registers.ps2vrs.num != -1) encoding |= (registers.ps2vrs.num << 21); // ps2 vector source reg
if (registers.ps2vrd.num != -1) encoding |= (registers.ps2vrd.num << 6); // ps2 vector dest reg if (registers.ps2vrd.num != -1) encoding |= (registers.ps2vrd.num << 6); // ps2 vector dest reg

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@ -133,7 +133,7 @@ bool SymbolMap::GetSymbolInfo(SymbolInfo *info, u32 address, SymbolType symmask)
return true; return true;
} }
if (dataAddress != INVALID_ADDRESS) { if (dataAddress != INVALID_ADDRESS) {
if (info != NULL) { if (info != NULL) {
info->type = ST_DATA; info->type = ST_DATA;

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@ -120,7 +120,7 @@ __fi tDMA_TAG* SPRdmaGetAddr(u32 addr, bool write)
DevCon.Warning("MTVU: SPR Accessing VU1 Memory"); DevCon.Warning("MTVU: SPR Accessing VU1 Memory");
vu1Thread.WaitVU(); vu1Thread.WaitVU();
} }
//Access for VU Memory //Access for VU Memory
if((addr >= 0x1100c000) && (addr < 0x11010000)) if((addr >= 0x1100c000) && (addr < 0x11010000))
@ -134,7 +134,7 @@ __fi tDMA_TAG* SPRdmaGetAddr(u32 addr, bool write)
//DevCon.Warning("VU0 Mem %x", addr); //DevCon.Warning("VU0 Mem %x", addr);
return (tDMA_TAG*)(VU0.Mem + (addr & 0xff0)); return (tDMA_TAG*)(VU0.Mem + (addr & 0xff0));
} }
//Possibly not needed but the manual doesn't say SPR cannot access it. //Possibly not needed but the manual doesn't say SPR cannot access it.
if((addr >= 0x11000000) && (addr < 0x11004000)) if((addr >= 0x11000000) && (addr < 0x11004000))
{ {
@ -147,8 +147,8 @@ __fi tDMA_TAG* SPRdmaGetAddr(u32 addr, bool write)
//DevCon.Warning("VU1 Micro %x", addr); //DevCon.Warning("VU1 Micro %x", addr);
return (tDMA_TAG*)(VU1.Micro + (addr & 0x3ff0)); return (tDMA_TAG*)(VU1.Micro + (addr & 0x3ff0));
} }
// Unreachable // Unreachable
return NULL; return NULL;
} }
@ -255,7 +255,7 @@ static __ri void DmaExec( void (*func)(), u32 mem, u32 value )
cpuClearInt( 11 ); cpuClearInt( 11 );
QueuedDMA._u16 &= ~(1 << 11); //Clear any queued DMA requests for this channel QueuedDMA._u16 &= ~(1 << 11); //Clear any queued DMA requests for this channel
} }
cpuClearInt( channel ); cpuClearInt( channel );
QueuedDMA._u16 &= ~(1 << channel); //Clear any queued DMA requests for this channel QueuedDMA._u16 &= ~(1 << channel); //Clear any queued DMA requests for this channel
} }
@ -307,7 +307,7 @@ __fi u32 dmacRead32( u32 mem )
// Set OPH and APATH from counter, cycling paths and alternating OPH // Set OPH and APATH from counter, cycling paths and alternating OPH
return gifRegs.stat._u32 & ~(7 << 9) | (counter & 1 ? counter << 9 : 0); return gifRegs.stat._u32 & ~(7 << 9) | (counter & 1 ? counter << 9 : 0);
} }
return psHu32(mem); return psHu32(mem);
} }

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@ -41,7 +41,7 @@ Advanced users may wish to use a different folder for their BIOS, you can do so
![PCSX2_First_Time_Configuration_bios.png](PCSX2_First_Time_Configuration_bios.png) ![PCSX2_First_Time_Configuration_bios.png](PCSX2_First_Time_Configuration_bios.png)
## Post-Setup Configuration ## Post-Setup Configuration
A large number of games work out-of-the-box on default PCSX2 settings. However, a subset of games require special settings to run, and some games require special settings to be upscaled. This guide will briefly cover some frequent problems and configuration settings to address them. A large number of games work out-of-the-box on default PCSX2 settings. However, a subset of games require special settings to run, and some games require special settings to be upscaled. This guide will briefly cover some frequent problems and configuration settings to address them.
### Multi-Threaded VU1 (MTVU) ### Multi-Threaded VU1 (MTVU)
The MTVU option is a unique case of a recommended setting that is **not** enabled by default. MTVU boosts performance for PCs with at least 3 cores with almost no consequences for the overwhelming majority of games. However, a small number of high profile games are incompabible with MTVU and will break if it is enabled. For these reasons, we do not enable it by default, **but strongly recommend you do so yourself**. If your game fails to boot, crashes, stalls, or has other problems with it enabled, disable it and try again. The MTVU option is a unique case of a recommended setting that is **not** enabled by default. MTVU boosts performance for PCs with at least 3 cores with almost no consequences for the overwhelming majority of games. However, a small number of high profile games are incompabible with MTVU and will break if it is enabled. For these reasons, we do not enable it by default, **but strongly recommend you do so yourself**. If your game fails to boot, crashes, stalls, or has other problems with it enabled, disable it and try again.
@ -50,7 +50,7 @@ The MTVU option is a unique case of a recommended setting that is **not** enable
Looking for information specific to a single game? Head to the [PCSX2 Wiki](https://wiki.pcsx2.net/Main_Page) and search for your game using the search bar in the top right. Known issues and solutions should be towards the bottom of a game's wiki page. Looking for information specific to a single game? Head to the [PCSX2 Wiki](https://wiki.pcsx2.net/Main_Page) and search for your game using the search bar in the top right. Known issues and solutions should be towards the bottom of a game's wiki page.
### General solutions ### General solutions
Want some general ideas to try that are not specific to a game? Here are some more commonly known issues and solutions to try. Want some general ideas to try that are not specific to a game? Here are some more commonly known issues and solutions to try.
*Note: For some of these issues, multiple solutions are given one after the other. Before moving from one solution to the next, **undo the previous solution**. Stacking multiple fixes on top of each other is usually unnecessary and likely to introduce new issues.* *Note: For some of these issues, multiple solutions are given one after the other. Before moving from one solution to the next, **undo the previous solution**. Stacking multiple fixes on top of each other is usually unnecessary and likely to introduce new issues.*
#### Grid-like pattern on screen #### Grid-like pattern on screen
@ -74,7 +74,7 @@ Sometimes a game uses blending for lighting effects and needs more accuracy for
Increment Blending Accuracy until the problem goes away. Note, higher Blending Accuracy substantially increases performance requirements. Increment Blending Accuracy until the problem goes away. Note, higher Blending Accuracy substantially increases performance requirements.
#### Flickering or improperly shaped shadows #### Flickering or improperly shaped shadows
This can either be a GS or VU problem so solutions will vary wildly by game. This can either be a GS or VU problem so solutions will vary wildly by game.
##### GS ##### GS
Navigate to the GSdx Advanced Settings and Hacks: Navigate to the GSdx Advanced Settings and Hacks:

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@ -5,7 +5,7 @@
/* PCSX2 - PS2 Emulator for PCs /* PCSX2 - PS2 Emulator for PCs
* Copyright (C) 2002-2019 PCSX2 Dev Team * Copyright (C) 2002-2019 PCSX2 Dev Team
* *
* PCSX2 is free software: you can redistribute it and/or modify it under the terms * PCSX2 is free software: you can redistribute it and/or modify it under the terms
* of the GNU Lesser General Public License as published by the Free Software Found- * of the GNU Lesser General Public License as published by the Free Software Found-
* ation, either version 3 of the License, or (at your option) any later version. * ation, either version 3 of the License, or (at your option) any later version.

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@ -25,7 +25,7 @@ There are a number of ways to help the project, whether it be bug reporting, gam
* Want to improve the PCSX2 wiki? [Here is how to contribute](https://wiki.pcsx2.net/Help!_How_to_contribute_guide) * Want to improve the PCSX2 wiki? [Here is how to contribute](https://wiki.pcsx2.net/Help!_How_to_contribute_guide)
### Question 4: Is PCSX2 ready to run out-of-the-box? ### Question 4: Is PCSX2 ready to run out-of-the-box?
No, first, you must dump your PlayStation 2 console's BIOS using the BIOS dumper. The BIOS dumper is [available on the PCSX2 website](https://pcsx2.net/download/releases/tools.html). No, first, you must dump your PlayStation 2 console's BIOS using the BIOS dumper. The BIOS dumper is [available on the PCSX2 website](https://pcsx2.net/download/releases/tools.html).
After dumping your PlayStation 2 console's BIOS and copying it to your computer, launch PCSX2, step through the first time setup wizard, and then you may begin playing. After dumping your PlayStation 2 console's BIOS and copying it to your computer, launch PCSX2, step through the first time setup wizard, and then you may begin playing.
@ -44,7 +44,7 @@ After dumping your PlayStation 2 console's BIOS and copying it to your computer,
*Note: Recommended Single Thread Performance is based on moderately complex games. Games that pushed the PS2 hardware to its limits will struggle on CPUs at this level. Some release titles and 2D games which underutilized the PS2 hardware may run on CPUs rated as low as 1200. A quick reference for CPU **intensive games**: [Wiki](https://wiki.pcsx2.net/Category:CPU_intensive_games), [Forum](https://forums.pcsx2.net/Thread-LIST-The-Most-CPU-Intensive-Games) and CPU **light** games: [Forum](https://forums.pcsx2.net/Thread-LIST-Games-that-don-t-need-a-strong-CPU-to-emulate)* *Note: Recommended Single Thread Performance is based on moderately complex games. Games that pushed the PS2 hardware to its limits will struggle on CPUs at this level. Some release titles and 2D games which underutilized the PS2 hardware may run on CPUs rated as low as 1200. A quick reference for CPU **intensive games**: [Wiki](https://wiki.pcsx2.net/Category:CPU_intensive_games), [Forum](https://forums.pcsx2.net/Thread-LIST-The-Most-CPU-Intensive-Games) and CPU **light** games: [Forum](https://forums.pcsx2.net/Thread-LIST-Games-that-don-t-need-a-strong-CPU-to-emulate)*
#### Recommended #### Recommended
| Operating System | CPU | GPU | RAM | | Operating System | CPU | GPU | RAM |
| --- | --- | --- | --- | | --- | --- | --- | --- |
@ -66,7 +66,7 @@ The CPU load as reported in software such as Windows' Task Manager is usually a
No. PCSX2 does not use or require SLI or Crossfire. No. PCSX2 does not use or require SLI or Crossfire.
### Question 9: How do I check if a game is playable? ### Question 9: How do I check if a game is playable?
The PCSX2 website has a [compatibility list](https://pcsx2.net/compat/) with every game that has been tested. The PCSX2 website has a [compatibility list](https://pcsx2.net/compat/) with every game that has been tested.
### Question 10: Do PS1 (PSX) games work on PCSX2? ### Question 10: Do PS1 (PSX) games work on PCSX2?
@ -74,12 +74,12 @@ The PCSX2 website has a [compatibility list](https://pcsx2.net/compat/) with eve
No, they will not work without issues. Please use a proper PS1 emulator, such as Duckstation or Mednafen. No, they will not work without issues. Please use a proper PS1 emulator, such as Duckstation or Mednafen.
#### If you are a tinkerer and like to break things: #### If you are a tinkerer and like to break things:
PS1 games may work on PCSX2, but compatibility is very limited. Specific settings are often required to get a game to boot, and there are other universal problems including missing/pitch-shifted audio and severe FMV corruption. A [forum thread for PS1 compatibility](https://forums.pcsx2.net/Thread-PSX-Mode-Unofficial-Compatibility-List) is tracking some fixes and compatibility reports. PS1 games may work on PCSX2, but compatibility is very limited. Specific settings are often required to get a game to boot, and there are other universal problems including missing/pitch-shifted audio and severe FMV corruption. A [forum thread for PS1 compatibility](https://forums.pcsx2.net/Thread-PSX-Mode-Unofficial-Compatibility-List) is tracking some fixes and compatibility reports.
*While we encourage discussion about PS1 games and improving compatibility, bug reports are NOT being accepted for PS1 games. Any reports for PS1 games will be closed immediately as invalid.* *While we encourage discussion about PS1 games and improving compatibility, bug reports are NOT being accepted for PS1 games. Any reports for PS1 games will be closed immediately as invalid.*
### Question 11: Why does my game not work like it did in an earlier PCSX2 version? ### Question 11: Why does my game not work like it did in an earlier PCSX2 version?
Any change to the emulator may fix one game, but cause problems for another. If the issue is severe and not fixable with different settings, you can always revert back to the last known PCSX2 version to work, and report the build number that broke the game. [Development builds](https://pcsx2.net/download/development.html) are very helpful for finding the exact change that caused a regression. Any change to the emulator may fix one game, but cause problems for another. If the issue is severe and not fixable with different settings, you can always revert back to the last known PCSX2 version to work, and report the build number that broke the game. [Development builds](https://pcsx2.net/download/development.html) are very helpful for finding the exact change that caused a regression.
### Question 12: Why is PCSX2 slow? ### Question 12: Why is PCSX2 slow?
The PlayStation 2 is a complex console, and this substantially raises the PC requirements to emulate it at full speed accurately. [This forum thread](https://forums.pcsx2.net/Thread-Why-is-PCSX2-slow) helps explain some of the technical reasons behind it, and our current guidelines for PC requirements are listed above. The PlayStation 2 is a complex console, and this substantially raises the PC requirements to emulate it at full speed accurately. [This forum thread](https://forums.pcsx2.net/Thread-Why-is-PCSX2-slow) helps explain some of the technical reasons behind it, and our current guidelines for PC requirements are listed above.
@ -142,12 +142,12 @@ Some settings are greyed out. These are advanced counters that should only be mo
### Question 22: What is the normal speed for a PlayStation 2 game? ### Question 22: What is the normal speed for a PlayStation 2 game?
* NTSC games will play at 59.94 FPS * NTSC games will play at 59.94 FPS
* PAL games will play at 50 FPS * PAL games will play at 50 FPS
* Keep in mind that there is a difference between the internal framerate (iFPS) and what PCSX2 shows as virtual framerate (vFPS). * Keep in mind that there is a difference between the internal framerate (iFPS) and what PCSX2 shows as virtual framerate (vFPS).
These framerates are what the PlayStation 2 console would push to a real TV through its video cable. A game itself, typically, internally generates only half of those frames, and repeats frames to fill the gaps. This is why a "full speed" game may not "feel like 60 FPS". The console's "speed" (meaning AI, sound, physics, *everything*) is tied to the playback framerate, which is what PCSX2 reports as its "FPS". These framerates are what the PlayStation 2 console would push to a real TV through its video cable. A game itself, typically, internally generates only half of those frames, and repeats frames to fill the gaps. This is why a "full speed" game may not "feel like 60 FPS". The console's "speed" (meaning AI, sound, physics, *everything*) is tied to the playback framerate, which is what PCSX2 reports as its "FPS".
### Question 23: What are Gamefixes? ### Question 23: What are Gamefixes?
Gamefixes are specialized fixes built into PCSX2 for specific games. Gamefixes mostly fix core emulation problems that would crash or soft lock a game, rather than graphical or performance issues. By default, the "System > Automatic Gamefixes" option is enabled, meaning any games that need gamefixes will have them automatically applied, regardless of what gamefix settings you have enabled. Gamefixes are specialized fixes built into PCSX2 for specific games. Gamefixes mostly fix core emulation problems that would crash or soft lock a game, rather than graphical or performance issues. By default, the "System > Automatic Gamefixes" option is enabled, meaning any games that need gamefixes will have them automatically applied, regardless of what gamefix settings you have enabled.
Most games will not need gamefixes, however if your game is having issues, you can try manually enabling them in Emulation Settings. Most games will not need gamefixes, however if your game is having issues, you can try manually enabling them in Emulation Settings.
@ -161,7 +161,7 @@ As the name says, speedhacks are hacks to make things faster. They will speed up
*Bug reports of issues caused by speedhacks will NOT be accepted, and will be immediately closed as invalid.* *Bug reports of issues caused by speedhacks will NOT be accepted, and will be immediately closed as invalid.*
### Question 25: What are all these EE/IOP and VU options? ### Question 25: What are all these EE/IOP and VU options?
The PS2 EE, IOP and VU processors are substantially different from a PC CPU and require different rounding and clamping modes to do math accurately. Most games work fine on the default options, but some games might need a different setting. You can check the [PCSX2 Wiki](https://wiki.pcsx2.net/Category:Games) to see if your game needs an alternate setting, or check the [PCSX2 Forums](https://forums.pcsx2.net/) to see if anyone else has posted about it there. The PS2 EE, IOP and VU processors are substantially different from a PC CPU and require different rounding and clamping modes to do math accurately. Most games work fine on the default options, but some games might need a different setting. You can check the [PCSX2 Wiki](https://wiki.pcsx2.net/Category:Games) to see if your game needs an alternate setting, or check the [PCSX2 Forums](https://forums.pcsx2.net/) to see if anyone else has posted about it there.
### Question 26: What are PCSX2 plugins? ### Question 26: What are PCSX2 plugins?
Older versions of PCSX2 used a plugin framework for various sections of the emulator. A plugin is a small, incomplete piece of software that, when plugged in to another piece of software, provides some sort of additional function. PCSX2 used to use plugins for: Older versions of PCSX2 used a plugin framework for various sections of the emulator. A plugin is a small, incomplete piece of software that, when plugged in to another piece of software, provides some sort of additional function. PCSX2 used to use plugins for:
@ -184,7 +184,7 @@ For Linux users, PCSX2 will automatically detect and bind controls to any recogn
--- ---
## Useful Links ## Useful Links
### BIOS Dumping Guides ### BIOS Dumping Guides
* [pgert's guide to BIOS and memory card tools](https://forums.pcsx2.net/Thread-An-orientation-through-some-of-the-PCSX2-BIOS-memcard-tools-Windows?pid=183709#pid183709) * [pgert's guide to BIOS and memory card tools](https://forums.pcsx2.net/Thread-An-orientation-through-some-of-the-PCSX2-BIOS-memcard-tools-Windows?pid=183709#pid183709)
* [One of the original BIOS dumping guides, originally from ngemu](https://forums.pcsx2.net/Thread-Guide-to-Dumping-Your-PS2-Bios-over-LAN) * [One of the original BIOS dumping guides, originally from ngemu](https://forums.pcsx2.net/Thread-Guide-to-Dumping-Your-PS2-Bios-over-LAN)

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@ -150,7 +150,7 @@ std::pair<u32,u32> ElfObject::getTextRange()
if (start <= header.e_entry && (start+size) > header.e_entry) if (start <= header.e_entry && (start+size) > header.e_entry)
return std::make_pair(start,size); return std::make_pair(start,size);
} }
return std::make_pair(0,0); return std::make_pair(0,0);
} }

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@ -139,7 +139,7 @@ void LayeredSettingsInterface::SetDoubleValue(const char* section, const char* k
void LayeredSettingsInterface::SetBoolValue(const char* section, const char* key, bool value) void LayeredSettingsInterface::SetBoolValue(const char* section, const char* key, bool value)
{ {
pxFailRel("Attempt to call SetBoolValue() on layered settings interface"); pxFailRel("Attempt to call SetBoolValue() on layered settings interface");
} }
void LayeredSettingsInterface::SetStringValue(const char* section, const char* key, const char* value) void LayeredSettingsInterface::SetStringValue(const char* section, const char* key, const char* value)

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@ -96,7 +96,7 @@ static __fi void gsCSRwrite( const tGS_CSR& csr )
// Our emulated GS has no FIFO, but if it did, it would flush it here... // Our emulated GS has no FIFO, but if it did, it would flush it here...
//Console.WriteLn("GS_CSR FLUSH GS fifo: %x (CSRr=%x)", value, GSCSRr); //Console.WriteLn("GS_CSR FLUSH GS fifo: %x (CSRr=%x)", value, GSCSRr);
} }
if(csr.SIGNAL) if(csr.SIGNAL)
{ {
// SIGNAL : What's not known here is whether or not the SIGID register should be updated // SIGNAL : What's not known here is whether or not the SIGID register should be updated
@ -114,9 +114,9 @@ static __fi void gsCSRwrite( const tGS_CSR& csr )
gifUnit.gsSIGNAL.queued = false; gifUnit.gsSIGNAL.queued = false;
gifUnit.Execute(false, true); // Resume paused transfers gifUnit.Execute(false, true); // Resume paused transfers
} }
if (csr.FINISH) { if (csr.FINISH) {
CSRreg.FINISH = false; CSRreg.FINISH = false;
gifUnit.gsFINISH.gsFINISHFired = false; //Clear the previously fired FINISH (YS, Indiecar 2005, MGS3) gifUnit.gsFINISH.gsFINISHFired = false; //Clear the previously fired FINISH (YS, Indiecar 2005, MGS3)
} }
if(csr.HSINT) CSRreg.HSINT = false; if(csr.HSINT) CSRreg.HSINT = false;
@ -140,7 +140,7 @@ __fi void gsWrite8(u32 mem, u8 value)
{ {
// CSR 8-bit write handlers. // CSR 8-bit write handlers.
// I'm quite sure these would just write the CSR portion with the other // I'm quite sure these would just write the CSR portion with the other
// bits set to 0 (no action). The previous implementation masked the 8-bit // bits set to 0 (no action). The previous implementation masked the 8-bit
// write value against the previous CSR write value, but that really doesn't // write value against the previous CSR write value, but that really doesn't
// make any sense, given that the real hardware's CSR circuit probably has no // make any sense, given that the real hardware's CSR circuit probably has no
// real "memory" where it saves anything. (for example, you can't write to // real "memory" where it saves anything. (for example, you can't write to
@ -173,7 +173,7 @@ __fi void gsWrite16(u32 mem, u16 value)
{ {
// See note above about CSR 8 bit writes, and handling them as zero'd bits // See note above about CSR 8 bit writes, and handling them as zero'd bits
// for all but the written parts. // for all but the written parts.
case GS_CSR: case GS_CSR:
gsCSRwrite( tGS_CSR((u32)value) ); gsCSRwrite( tGS_CSR((u32)value) );
return; // do not write to MTGS memory return; // do not write to MTGS memory
@ -364,7 +364,7 @@ void gsIrq() {
void gsPostVsyncStart() void gsPostVsyncStart()
{ {
//gifUnit.FlushToMTGS(); // Needed for some (broken?) homebrew game loaders //gifUnit.FlushToMTGS(); // Needed for some (broken?) homebrew game loaders
const bool registers_written = s_GSRegistersWritten; const bool registers_written = s_GSRegistersWritten;
s_GSRegistersWritten = false; s_GSRegistersWritten = false;
GetMTGS().PostVsyncStart(registers_written); GetMTGS().PostVsyncStart(registers_written);

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@ -28,12 +28,12 @@ LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
// TEXTINCLUDE // TEXTINCLUDE
// //
1 TEXTINCLUDE 1 TEXTINCLUDE
BEGIN BEGIN
"resource.h\0" "resource.h\0"
END END
2 TEXTINCLUDE 2 TEXTINCLUDE
BEGIN BEGIN
"#ifndef APSTUDIO_INVOKED\r\n" "#ifndef APSTUDIO_INVOKED\r\n"
"#include ""targetver.h""\r\n" "#include ""targetver.h""\r\n"

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@ -172,7 +172,7 @@ void GSClut::Write(const GIFRegTEX0& TEX0, const GIFRegTEXCLUT& TEXCLUT)
m_write.TEXCLUT = TEXCLUT; m_write.TEXCLUT = TEXCLUT;
m_read.dirty = true; m_read.dirty = true;
m_write.dirty = false; m_write.dirty = false;
(this->*m_wc[TEX0.CSM][TEX0.CPSM][TEX0.PSM])(TEX0, TEXCLUT); (this->*m_wc[TEX0.CSM][TEX0.CPSM][TEX0.PSM])(TEX0, TEXCLUT);
} }

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@ -521,7 +521,7 @@ GSVector4i GSState::GetFrameRect(int i, bool ignore_off)
return rectangle; return rectangle;
const auto& DISP = m_regs->DISP[i].DISPLAY; const auto& DISP = m_regs->DISP[i].DISPLAY;
const u32 DW = DISP.DW + 1; const u32 DW = DISP.DW + 1;
const u32 DH = DISP.DH + 1; const u32 DH = DISP.DH + 1;
const GSVector2i magnification(DISP.MAGH+1, DISP.MAGV + 1); const GSVector2i magnification(DISP.MAGH+1, DISP.MAGV + 1);
@ -1737,7 +1737,7 @@ inline bool GSState::TestDrawChanged()
prim_mask &= ~0x7; prim_mask &= ~0x7;
else else
return true; return true;
if ((m_env.PRIM.U32[0] ^ m_prev_env.PRIM.U32[0]) & prim_mask) if ((m_env.PRIM.U32[0] ^ m_prev_env.PRIM.U32[0]) & prim_mask)
return true; return true;
@ -2117,7 +2117,7 @@ void GSState::Move()
endy = -1; endy = -1;
y_inc = -y_inc; y_inc = -y_inc;
} }
for (int y = starty; y != endy; y+= y_inc, _sy += y_inc, _dy += y_inc) for (int y = starty; y != endy; y+= y_inc, _sy += y_inc, _dy += y_inc)
{ {
auto s = getPAHelper(spo, sx, _sy); auto s = getPAHelper(spo, sx, _sy);
@ -3455,7 +3455,7 @@ GSState::TextureMinMaxResult GSState::GetTextureMinMax(const GIFRegTEX0& TEX0, c
if (m_vt.m_primclass == GS_SPRITE_CLASS && PRIM->FST == 1 && m_index.tail < 3) if (m_vt.m_primclass == GS_SPRITE_CLASS && PRIM->FST == 1 && m_index.tail < 3)
{ {
// When coordinates are fractional, GS appears to draw to the right/bottom (effectively // When coordinates are fractional, GS appears to draw to the right/bottom (effectively
// taking the ceiling), not to the top/left (taking the floor). // taking the ceiling), not to the top/left (taking the floor).
const GSVector4i int_rc(m_vt.m_min.p.ceil().xyxy(m_vt.m_max.p.floor())); const GSVector4i int_rc(m_vt.m_min.p.ceil().xyxy(m_vt.m_max.p.floor()));
const GSVector4i scissored_rc(int_rc.rintersect(GSVector4i(m_context->scissor.in))); const GSVector4i scissored_rc(int_rc.rintersect(GSVector4i(m_context->scissor.in)));
if (!int_rc.eq(scissored_rc)) if (!int_rc.eq(scissored_rc))

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@ -185,7 +185,7 @@ protected:
void GrowVertexBuffer(); void GrowVertexBuffer();
void HandleAutoFlush(); void HandleAutoFlush();
template <u32 prim, bool auto_flush, bool index_swap> template <u32 prim, bool auto_flush, bool index_swap>
void VertexKick(u32 skip); void VertexKick(u32 skip);

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@ -116,8 +116,8 @@ public:
__forceinline GSVector8(__m128 m0, __m128 m1) __forceinline GSVector8(__m128 m0, __m128 m1)
{ {
#if 0 // _MSC_VER >= 1700 #if 0 // _MSC_VER >= 1700
this->m = _mm256_permute2f128_ps(_mm256_castps128_ps256(m0), _mm256_castps128_ps256(m1), 0x20); this->m = _mm256_permute2f128_ps(_mm256_castps128_ps256(m0), _mm256_castps128_ps256(m1), 0x20);
#else #else

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@ -91,8 +91,8 @@ public:
__forceinline GSVector8i(__m128i m0, __m128i m1) __forceinline GSVector8i(__m128i m0, __m128i m1)
{ {
#if 0 // _MSC_VER >= 1700 #if 0 // _MSC_VER >= 1700
this->m = _mm256_permute2x128_si256(_mm256_castsi128_si256(m0), _mm256_castsi128_si256(m1), 0); this->m = _mm256_permute2x128_si256(_mm256_castsi128_si256(m0), _mm256_castsi128_si256(m1), 0);
#else #else

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@ -213,7 +213,7 @@ bool GSRenderer::Merge(int field)
// If using scanmsk we have to keep the single line offset, regardless of upscale // If using scanmsk we have to keep the single line offset, regardless of upscale
// so we handle this separately after the rect calculations. // so we handle this separately after the rect calculations.
float interlace_offset = 0.0f; float interlace_offset = 0.0f;
if ((!GSConfig.PCRTCAntiBlur || m_scanmask_used) && display_offset) if ((!GSConfig.PCRTCAntiBlur || m_scanmask_used) && display_offset)
{ {
interlace_offset = static_cast<float>(display_diff.y & 1); interlace_offset = static_cast<float>(display_diff.y & 1);
@ -266,7 +266,7 @@ bool GSRenderer::Merge(int field)
if (display_diff.y >= 4 || !GSConfig.PCRTCAntiBlur) if (display_diff.y >= 4 || !GSConfig.PCRTCAntiBlur)
off.y = display_diff.y; off.y = display_diff.y;
if (samesrc) if (samesrc)
{ {
// Adjusting the screen offset when using a negative offset. // Adjusting the screen offset when using a negative offset.
@ -353,7 +353,7 @@ bool GSRenderer::Merge(int field)
GSVector2i max_resolution = GetResolution(); GSVector2i max_resolution = GetResolution();
resolution.x = display_combined.x - display_baseline.x; resolution.x = display_combined.x - display_baseline.x;
resolution.y = display_combined.y - display_baseline.y; resolution.y = display_combined.y - display_baseline.y;
if (isinterlaced() && m_regs->SMODE2.FFMD) if (isinterlaced() && m_regs->SMODE2.FFMD)
{ {
resolution.y >>= 1; resolution.y >>= 1;

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@ -899,7 +899,7 @@ void GSDevice11::DoFXAA(GSTexture* sTex, GSTexture* dTex)
Console.Error("FXAA shader is missing"); Console.Error("FXAA shader is missing");
return; return;
} }
ShaderMacro sm(m_shader_cache.GetFeatureLevel()); ShaderMacro sm(m_shader_cache.GetFeatureLevel());
m_fxaa_ps = m_shader_cache.GetPixelShader(m_dev.get(), *shader, sm.GetPtr(), "ps_main"); m_fxaa_ps = m_shader_cache.GetPixelShader(m_dev.get(), *shader, sm.GetPtr(), "ps_main");
if (!m_fxaa_ps) if (!m_fxaa_ps)

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@ -142,7 +142,7 @@ bool GSC_Manhunt2(const GSFrameInfo& fi, int& skip)
bool GSC_CrashBandicootWoC(const GSFrameInfo& fi, int& skip) bool GSC_CrashBandicootWoC(const GSFrameInfo& fi, int& skip)
{ {
// Channel effect not properly supported - Removes fog to fix the fog wall issue on Direct3D at any resolution, and while upscaling on every Hardware renderer. // Channel effect not properly supported - Removes fog to fix the fog wall issue on Direct3D at any resolution, and while upscaling on every Hardware renderer.
if (skip == 0) if (skip == 0)
{ {
if (fi.TME && (fi.FBP == 0x00000 || fi.FBP == 0x008c0 || fi.FBP == 0x00a00) && (fi.TBP0 == 0x00000 || fi.TBP0 == 0x008c0 || fi.TBP0 == 0x00a00) && fi.FBP == fi.TBP0 && fi.FPSM == PSM_PSMCT32 && fi.FPSM == fi.TPSM) if (fi.TME && (fi.FBP == 0x00000 || fi.FBP == 0x008c0 || fi.FBP == 0x00a00) && (fi.TBP0 == 0x00000 || fi.TBP0 == 0x008c0 || fi.TBP0 == 0x00a00) && fi.FBP == fi.TBP0 && fi.FPSM == PSM_PSMCT32 && fi.FPSM == fi.TPSM)
{ {

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@ -2878,7 +2878,7 @@ void GSRendererHW::EmulateBlending(bool& DATE_PRIMID, bool& DATE_BARRIER, bool&
// For mixed blend, the source blend is done in the shader (so we use CONST_ONE as a factor). // For mixed blend, the source blend is done in the shader (so we use CONST_ONE as a factor).
m_conf.blend = {true, GSDevice::CONST_ONE, blend.dst, blend.op, m_conf.ps.blend_c == 2, AFIX}; m_conf.blend = {true, GSDevice::CONST_ONE, blend.dst, blend.op, m_conf.ps.blend_c == 2, AFIX};
m_conf.ps.blend_mix = (blend.op == GSDevice::OP_REV_SUBTRACT) ? 2 : 1; m_conf.ps.blend_mix = (blend.op == GSDevice::OP_REV_SUBTRACT) ? 2 : 1;
// Elide DSB colour output if not used by dest. // Elide DSB colour output if not used by dest.
m_conf.ps.no_color1 |= !GSDevice::IsDualSourceBlendFactor(blend.dst); m_conf.ps.no_color1 |= !GSDevice::IsDualSourceBlendFactor(blend.dst);
@ -4412,7 +4412,7 @@ void GSRendererHW::OI_DoubleHalfClear(GSTextureCache::Target*& rt, GSTextureCach
&& (m_context->FRAME.PSM & 0xF) == (m_context->ZBUF.PSM & 0xF) && (u32)(GSVector4i(m_vt.m_max.p).z) == 0) && (m_context->FRAME.PSM & 0xF) == (m_context->ZBUF.PSM & 0xF) && (u32)(GSVector4i(m_vt.m_max.p).z) == 0)
{ {
const GSVertex* v = &m_vertex.buff[0]; const GSVertex* v = &m_vertex.buff[0];
// Z and color must be constant and the same // Z and color must be constant and the same
if (m_vt.m_eq.rgba != 0xFFFF || !m_vt.m_eq.z || v[1].XYZ.Z != v[1].RGBAQ.U32[0]) if (m_vt.m_eq.rgba != 0xFFFF || !m_vt.m_eq.z || v[1].XYZ.Z != v[1].RGBAQ.U32[0])
return; return;

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@ -458,7 +458,7 @@ GSTextureCache::Target* GSTextureCache::LookupTarget(const GIFRegTEX0& TEX0, con
break; break;
} }
} }
} }
else else
{ {
assert(type == RenderTarget); assert(type == RenderTarget);
@ -648,7 +648,7 @@ void GSTextureCache::ScaleTargetForDisplay(Target* t, const GIFRegTEX0& dispfb,
// So, for these cases, we simply expand the target to include both images, based on the read height. // So, for these cases, we simply expand the target to include both images, based on the read height.
// It won't affect normal rendering, since that doesn't go through this path. // It won't affect normal rendering, since that doesn't go through this path.
// Compute offset into the target that we'll start reading from. // Compute offset into the target that we'll start reading from.
const int delta = dispfb.TBP0 - t->m_TEX0.TBP0; const int delta = dispfb.TBP0 - t->m_TEX0.TBP0;
int y_offset = 0; int y_offset = 0;
@ -2717,7 +2717,7 @@ GSTextureCache::SurfaceOffset GSTextureCache::ComputeSurfaceOffset(const Surface
const auto it = m_surface_offset_cache.find(sok); const auto it = m_surface_offset_cache.find(sok);
if (it != m_surface_offset_cache.end()) if (it != m_surface_offset_cache.end())
return it->second; // Cache HIT. return it->second; // Cache HIT.
// Cache MISS. // Cache MISS.
// Search for a valid <x,y> offset from B to A in B coordinates. // Search for a valid <x,y> offset from B to A in B coordinates.
SurfaceOffset so; SurfaceOffset so;
@ -2810,7 +2810,7 @@ GSTextureCache::SurfaceOffset GSTextureCache::ComputeSurfaceOffset(const Surface
const GSVector4i& r2 = b_rect; const GSVector4i& r2 = b_rect;
[[maybe_unused]] const GSVector4i ri = r1.rintersect(r2); [[maybe_unused]] const GSVector4i ri = r1.rintersect(r2);
assert(!so.is_valid || (r1.eq(ri) && r1.x >= 0 && r1.y >= 0 && r1.z > 0 && r1.w > 0)); assert(!so.is_valid || (r1.eq(ri) && r1.x >= 0 && r1.y >= 0 && r1.z > 0 && r1.w > 0));
// Clear cache if size too big. // Clear cache if size too big.
if (m_surface_offset_cache.size() + 1 > S_SURFACE_OFFSET_CACHE_MAX_SIZE) if (m_surface_offset_cache.size() + 1 > S_SURFACE_OFFSET_CACHE_MAX_SIZE)
{ {

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@ -68,7 +68,7 @@ fragment float4 ps_filter_complex(ConvertShaderData data [[stage_in]], ConvertPS
float2 texdim = float2(res.texture.get_width(), res.texture.get_height()); float2 texdim = float2(res.texture.get_width(), res.texture.get_height());
float factor = (0.9f - 0.4f * cos(2.f * M_PI_F * data.t.y * texdim.y)); float factor = (0.9f - 0.4f * cos(2.f * M_PI_F * data.t.y * texdim.y));
float ycoord = (floor(data.t.y * texdim.y) + 0.5f) / texdim.y; float ycoord = (floor(data.t.y * texdim.y) + 0.5f) / texdim.y;
return factor * res.sample(float2(data.t.x, ycoord)); return factor * res.sample(float2(data.t.x, ycoord));
} }

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@ -669,7 +669,7 @@ void GSDeviceOGL::RestoreAPIState()
glBlendEquationSeparate(GLState::eq_RGB, GL_FUNC_ADD); glBlendEquationSeparate(GLState::eq_RGB, GL_FUNC_ADD);
glBlendFuncSeparate(GLState::f_sRGB, GLState::f_dRGB, GL_ONE, GL_ZERO); glBlendFuncSeparate(GLState::f_sRGB, GLState::f_dRGB, GL_ONE, GL_ZERO);
const float bf = static_cast<float>(GLState::bf) / 128.0f; const float bf = static_cast<float>(GLState::bf) / 128.0f;
glBlendColor(bf, bf, bf, bf); glBlendColor(bf, bf, bf, bf);
@ -702,7 +702,7 @@ void GSDeviceOGL::RestoreAPIState()
glStencilOp(GL_KEEP, GL_KEEP, GLState::stencil_pass); glStencilOp(GL_KEEP, GL_KEEP, GLState::stencil_pass);
glBindSampler(0, GLState::ps_ss); glBindSampler(0, GLState::ps_ss);
for (GLuint i = 0; i < sizeof(GLState::tex_unit) / sizeof(GLState::tex_unit[0]); i++) for (GLuint i = 0; i < sizeof(GLState::tex_unit) / sizeof(GLState::tex_unit[0]); i++)
glBindTextureUnit(i, GLState::tex_unit[i]); glBindTextureUnit(i, GLState::tex_unit[i]);
@ -1263,7 +1263,7 @@ void GSDeviceOGL::PresentRect(GSTexture* sTex, const GSVector4& sRect, GSTexture
cb.SetSource(sRect, sTex->GetSize()); cb.SetSource(sRect, sTex->GetSize());
cb.SetTarget(dRect, ds); cb.SetTarget(dRect, ds);
cb.SetTime(shaderTime); cb.SetTime(shaderTime);
GL::Program& prog = m_present[static_cast<int>(shader)]; GL::Program& prog = m_present[static_cast<int>(shader)];
prog.Bind(); prog.Bind();
prog.Uniform4fv(0, cb.SourceRect.F32); prog.Uniform4fv(0, cb.SourceRect.F32);
@ -2214,7 +2214,7 @@ void GSDeviceOGL::PopDebugGroup()
#ifdef ENABLE_OGL_DEBUG #ifdef ENABLE_OGL_DEBUG
if (!glPopDebugGroup) if (!glPopDebugGroup)
return; return;
glPopDebugGroup(); glPopDebugGroup();
#endif #endif
} }
@ -2248,7 +2248,7 @@ void GSDeviceOGL::InsertDebugMessage(DebugMessageCategory category, const char*
id = 0xDEAD; id = 0xDEAD;
severity = GL_DEBUG_SEVERITY_MEDIUM; severity = GL_DEBUG_SEVERITY_MEDIUM;
break; break;
case GSDevice::DebugMessageCategory::Performance: case GSDevice::DebugMessageCategory::Performance:
default: default:
type = GL_DEBUG_TYPE_PERFORMANCE; type = GL_DEBUG_TYPE_PERFORMANCE;
id = 0xFEE1; id = 0xFEE1;

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@ -1014,7 +1014,7 @@ bool GSRendererSW::GetScanlineGlobalData(SharedData* data)
bool zwrite = zm != 0xffffffff; bool zwrite = zm != 0xffffffff;
bool ztest = context->TEST.ZTE && context->TEST.ZTST > ZTST_ALWAYS; bool ztest = context->TEST.ZTE && context->TEST.ZTST > ZTST_ALWAYS;
/* /*
printf("%05x %d %05x %d %05x %d %dx%d\n", printf("%05x %d %05x %d %05x %d %dx%d\n",
fwrite || ftest ? m_context->FRAME.Block() : 0xfffff, m_context->FRAME.PSM, fwrite || ftest ? m_context->FRAME.Block() : 0xfffff, m_context->FRAME.PSM,
zwrite || ztest ? m_context->ZBUF.Block() : 0xfffff, m_context->ZBUF.PSM, zwrite || ztest ? m_context->ZBUF.Block() : 0xfffff, m_context->ZBUF.PSM,
PRIM->TME ? m_context->TEX0.TBP0 : 0xfffff, m_context->TEX0.PSM, (int)m_context->TEX0.TW, (int)m_context->TEX0.TH); PRIM->TME ? m_context->TEX0.TBP0 : 0xfffff, m_context->TEX0.PSM, (int)m_context->TEX0.TW, (int)m_context->TEX0.TH);

View File

@ -401,7 +401,7 @@ void GSTextureVK::CommitClear(VkCommandBuffer cmdbuf)
vkCmdClearColorImage(cmdbuf, m_texture.GetImage(), m_texture.GetLayout(), &cv, 1, &srr); vkCmdClearColorImage(cmdbuf, m_texture.GetImage(), m_texture.GetLayout(), &cv, 1, &srr);
} }
SetState(GSTexture::State::Dirty); SetState(GSTexture::State::Dirty);
} }
VkFramebuffer GSTextureVK::GetFramebuffer(bool feedback_loop) { return GetLinkedFramebuffer(nullptr, feedback_loop); } VkFramebuffer GSTextureVK::GetFramebuffer(bool feedback_loop) { return GetLinkedFramebuffer(nullptr, feedback_loop); }

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@ -142,7 +142,7 @@ void GSCaptureDlg::OnInit()
else if (wcsstr(str.get(), L"@device:sw:")) prefix = L"(DS) "; else if (wcsstr(str.get(), L"@device:sw:")) prefix = L"(DS) ";
else if (wcsstr(str.get(), L"@device:cm:")) prefix = L"(VfW) "; else if (wcsstr(str.get(), L"@device:cm:")) prefix = L"(VfW) ";
c.DisplayName = str.get(); c.DisplayName = str.get();
wil::com_ptr_nothrow<IPropertyBag> pPB; wil::com_ptr_nothrow<IPropertyBag> pPB;

View File

@ -20,7 +20,7 @@
#define IDC_STATIC -1 #define IDC_STATIC -1
// Next default values for new objects // Next default values for new objects
// //
#ifdef APSTUDIO_INVOKED #ifdef APSTUDIO_INVOKED
#ifndef APSTUDIO_READONLY_SYMBOLS #ifndef APSTUDIO_READONLY_SYMBOLS
#define _APS_NEXT_RESOURCE_VALUE 10019 #define _APS_NEXT_RESOURCE_VALUE 10019

View File

@ -41,7 +41,7 @@ void Gif_ParsePacket(u8* data, u32 size, GIF_PATH path) {
if (offset + 16 > size) return; if (offset + 16 > size) return;
gifTag.setTag(&buffer[offset], 1); gifTag.setTag(&buffer[offset], 1);
GIF_PARSE("--Gif Tag [mode=%s][pre=%d][prim=%d][nregs=%d][nloop=%d][qwc=%d][EOP=%d]", GIF_PARSE("--Gif Tag [mode=%s][pre=%d][prim=%d][nregs=%d][nloop=%d][qwc=%d][EOP=%d]",
GifTag_ModeStr[gifTag.tag.FLG], gifTag.tag.PRE, gifTag.tag.PRIM, GifTag_ModeStr[gifTag.tag.FLG], gifTag.tag.PRE, gifTag.tag.PRIM,
gifTag.nRegs, gifTag.nLoop, gifTag.len/16, gifTag.tag.EOP); gifTag.nRegs, gifTag.nLoop, gifTag.len/16, gifTag.tag.EOP);

View File

@ -87,7 +87,7 @@ __fi uint intcInterrupt()
//DevCon.Warning("*PCSX2*: intcInterrupt already cleared"); //DevCon.Warning("*PCSX2*: intcInterrupt already cleared");
return 0; return 0;
} }
if ((psHu32(INTC_STAT) & psHu32(INTC_MASK)) == 0) if ((psHu32(INTC_STAT) & psHu32(INTC_MASK)) == 0)
{ {
//DevCon.Warning("*PCSX2*: No valid interrupt INTC_MASK: %x INTC_STAT: %x", psHu32(INTC_MASK), psHu32(INTC_STAT)); //DevCon.Warning("*PCSX2*: No valid interrupt INTC_MASK: %x INTC_STAT: %x", psHu32(INTC_MASK), psHu32(INTC_STAT));
return 0; return 0;
@ -106,13 +106,13 @@ __fi uint intcInterrupt()
__fi uint dmacInterrupt() __fi uint dmacInterrupt()
{ {
if( ((psHu16(DMAC_STAT + 2) & psHu16(DMAC_STAT)) == 0 ) && if( ((psHu16(DMAC_STAT + 2) & psHu16(DMAC_STAT)) == 0 ) &&
( psHu16(DMAC_STAT) & 0x8000) == 0 ) ( psHu16(DMAC_STAT) & 0x8000) == 0 )
{ {
//DevCon.Warning("No valid DMAC interrupt MASK %x STAT %x", psHu16(DMAC_STAT+2), psHu16(DMAC_STAT)); //DevCon.Warning("No valid DMAC interrupt MASK %x STAT %x", psHu16(DMAC_STAT+2), psHu16(DMAC_STAT));
return 0; return 0;
} }
if (!dmacRegs.ctrl.DMAE || psHu8(DMAC_ENABLER+2) == 1) if (!dmacRegs.ctrl.DMAE || psHu8(DMAC_ENABLER+2) == 1)
{ {
//DevCon.Warning("DMAC Suspended or Disabled on interrupt"); //DevCon.Warning("DMAC Suspended or Disabled on interrupt");
return 0; return 0;
@ -174,12 +174,12 @@ __ri bool hwMFIFOWrite(u32 addr, const u128* data, uint qwc)
pxFailDev( fmt::format( "Scratchpad/MFIFO: Invalid base physical address: 0x{:08x}", u32(dmacRegs.rbor.ADDR)).c_str() ); pxFailDev( fmt::format( "Scratchpad/MFIFO: Invalid base physical address: 0x{:08x}", u32(dmacRegs.rbor.ADDR)).c_str() );
return false; return false;
} }
return true; return true;
} }
__ri void hwMFIFOResume(u32 transferred) { __ri void hwMFIFOResume(u32 transferred) {
if (transferred == 0) if (transferred == 0)
{ {
return; //Nothing got put in the MFIFO, we don't care return; //Nothing got put in the MFIFO, we don't care
@ -203,7 +203,7 @@ __ri void hwMFIFOResume(u32 transferred) {
//Apparently this is bad, i guess so, the data is going to memory rather than the FIFO //Apparently this is bad, i guess so, the data is going to memory rather than the FIFO
//vif1Regs.stat.FQC = 0x10; // FQC=16 //vif1Regs.stat.FQC = 0x10; // FQC=16
} }
break; break;
} }
case MFD_GIF: case MFD_GIF:
@ -332,11 +332,11 @@ liked this.
From what i've deduced, REFE does in fact increment, but END doesn't, after much testing, i've concluded this is how From what i've deduced, REFE does in fact increment, but END doesn't, after much testing, i've concluded this is how
we can standardize DMA chains, so i've modified the code to work like this. The below function controls the increment we can standardize DMA chains, so i've modified the code to work like this. The below function controls the increment
of the TADR along with the MADR on VIF, GIF and SPR1 when using the CNT tag, the others don't use it yet, but they of the TADR along with the MADR on VIF, GIF and SPR1 when using the CNT tag, the others don't use it yet, but they
can probably be modified to do so now. can probably be modified to do so now.
Reason for this:- Many games (such as clock tower 3 and FFX Videos) watched the TADR to see when a transfer has finished, Reason for this:- Many games (such as clock tower 3 and FFX Videos) watched the TADR to see when a transfer has finished,
so we need to simulate this wherever we can! Even the FFX video gets corruption and tries to fire multiple DMA Kicks so we need to simulate this wherever we can! Even the FFX video gets corruption and tries to fire multiple DMA Kicks
if this doesnt happen, which was the reasoning for the hacked up SPR timing we had, that is no longer required. if this doesnt happen, which was the reasoning for the hacked up SPR timing we had, that is no longer required.
-Refraction -Refraction
@ -347,7 +347,7 @@ void hwDmacSrcTadrInc(DMACh& dma)
//Don't touch it if in normal/interleave mode. //Don't touch it if in normal/interleave mode.
if (dma.chcr.STR == 0) return; if (dma.chcr.STR == 0) return;
if (dma.chcr.MOD != 1) return; if (dma.chcr.MOD != 1) return;
u16 tagid = (dma.chcr.TAG >> 12) & 0x7; u16 tagid = (dma.chcr.TAG >> 12) & 0x7;
if (tagid == TAG_CNT) if (tagid == TAG_CNT)

View File

@ -44,7 +44,7 @@ mem32_t _hwRead32(u32 mem)
{ {
case 0x00: return rcntRead32<0x00>( mem ); case 0x00: return rcntRead32<0x00>( mem );
case 0x01: return rcntRead32<0x01>( mem ); case 0x01: return rcntRead32<0x01>( mem );
case 0x02: return ipuRead32( mem ); case 0x02: return ipuRead32( mem );
case 0x03: case 0x03:
@ -56,7 +56,7 @@ mem32_t _hwRead32(u32 mem)
return vifRead32<0>(mem); return vifRead32<0>(mem);
} }
return dmacRead32<0x03>( mem ); return dmacRead32<0x03>( mem );
case 0x04: case 0x04:
case 0x05: case 0x05:
case 0x06: case 0x06:
@ -104,7 +104,7 @@ mem32_t _hwRead32(u32 mem)
case 0x00: case 0x00:
ret = psxHu32(0x1f801814); ret = psxHu32(0x1f801814);
break; break;
case 0x80: case 0x80:
#if PSX_EXTRALOGS #if PSX_EXTRALOGS
DevCon.Warning("FIFO Size %x", sif2fifosize); DevCon.Warning("FIFO Size %x", sif2fifosize);
#endif #endif
@ -130,7 +130,7 @@ mem32_t _hwRead32(u32 mem)
#endif #endif
return ret; return ret;
} }
/*if ((mem & 0x1000ff00) == 0x1000f200) /*if ((mem & 0x1000ff00) == 0x1000f200)
{ {
@ -189,7 +189,7 @@ mem32_t _hwRead32(u32 mem)
//Hack for Transformers and Test Drive Unlimited to simulate filling the VIF FIFO //Hack for Transformers and Test Drive Unlimited to simulate filling the VIF FIFO
//It actually stalls VIF a few QW before the end of the transfer, so we need to pretend its all gone //It actually stalls VIF a few QW before the end of the transfer, so we need to pretend its all gone
//else itll take aaaaaaaaages to boot. //else itll take aaaaaaaaages to boot.
if(mem == (D1_CHCR + 0x10) && CHECK_VIFFIFOHACK) if(mem == (D1_CHCR + 0x10) && CHECK_VIFFIFOHACK)
return psHu32(mem) + (vif1ch.qwc * 16); return psHu32(mem) + (vif1ch.qwc * 16);
/*if((mem == GIF_CHCR) && !vif1ch.chcr.STR && gifRegs.stat.M3P && gifRegs.stat.APATH != 3) /*if((mem == GIF_CHCR) && !vif1ch.chcr.STR && gifRegs.stat.M3P && gifRegs.stat.APATH != 3)
@ -284,7 +284,7 @@ static RETURNS_R64 _hwRead64(u32 mem)
// No game is known to attempt such a thing (yay!), so probably nothing for us to // No game is known to attempt such a thing (yay!), so probably nothing for us to
// worry about. Chances are, though, doing so is "legal" and yields some sort // worry about. Chances are, though, doing so is "legal" and yields some sort
// of reproducible behavior. Candidate for real hardware testing. // of reproducible behavior. Candidate for real hardware testing.
// Current assumption: Reads 128 bits and discards the unused portion. // Current assumption: Reads 128 bits and discards the unused portion.
uint wordpart = (mem >> 3) & 0x1; uint wordpart = (mem >> 3) & 0x1;
@ -364,7 +364,7 @@ RETURNS_R128 _hwRead128(u32 mem)
DevCon.Warning("128bit read from %x wibble", mem); DevCon.Warning("128bit read from %x wibble", mem);
if (mem == 0x1000f3E0) if (mem == 0x1000f3E0)
{ {
ReadFifoSingleWord(); ReadFifoSingleWord();
u32 part0 = psHu32(0x1000f3E0); u32 part0 = psHu32(0x1000f3E0);
ReadFifoSingleWord(); ReadFifoSingleWord();

View File

@ -120,7 +120,7 @@ void _hwWrite32( u32 mem, u32 value )
DevCon.Warning("GIF Mode cancelling P3 Disable"); DevCon.Warning("GIF Mode cancelling P3 Disable");
CPU_INT(DMAC_GIF, 8); CPU_INT(DMAC_GIF, 8);
} }
gifRegs.stat.M3R = gifRegs.mode.M3R; gifRegs.stat.M3R = gifRegs.mode.M3R;
gifRegs.stat.IMT = gifRegs.mode.IMT; gifRegs.stat.IMT = gifRegs.mode.IMT;
@ -400,7 +400,7 @@ void _hwWrite64( u32 mem, const mem64_t* srcval )
hwWrite128<page>(mem & ~0x0f, &zerofill); hwWrite128<page>(mem & ~0x0f, &zerofill);
} }
return; return;
default: default:
// disregard everything except the lower 32 bits. // disregard everything except the lower 32 bits.
// ... and skip the 64 bit writeback since the 32-bit one will suffice. // ... and skip the 64 bit writeback since the 32-bit one will suffice.

View File

@ -217,7 +217,7 @@ __fi u32 ipuRead32(u32 mem)
ipucase(IPU_BP): // IPU_BP ipucase(IPU_BP): // IPU_BP
{ {
pxAssume(g_BP.FP <= 2); pxAssume(g_BP.FP <= 2);
ipuRegs.ipubp = g_BP.BP & 0x7f; ipuRegs.ipubp = g_BP.BP & 0x7f;
ipuRegs.ipubp |= g_BP.IFC << 8; ipuRegs.ipubp |= g_BP.IFC << 8;
ipuRegs.ipubp |= g_BP.FP << 16; ipuRegs.ipubp |= g_BP.FP << 16;
@ -250,7 +250,7 @@ __fi RETURNS_R64 ipuRead64(u32 mem)
if (getBits32((u8*)&ipuRegs.cmd.DATA, 0)) if (getBits32((u8*)&ipuRegs.cmd.DATA, 0))
ipuRegs.cmd.DATA = BigEndian(ipuRegs.cmd.DATA); ipuRegs.cmd.DATA = BigEndian(ipuRegs.cmd.DATA);
} }
if (ipuRegs.cmd.DATA & 0xffffff) if (ipuRegs.cmd.DATA & 0xffffff)
IPU_LOG("read64: IPU_CMD=BUSY=%x, DATA=%08X", ipuRegs.cmd.BUSY ? 1 : 0, ipuRegs.cmd.DATA); IPU_LOG("read64: IPU_CMD=BUSY=%x, DATA=%08X", ipuRegs.cmd.BUSY ? 1 : 0, ipuRegs.cmd.DATA);
return r64_load(&ipuRegs.cmd._u64); return r64_load(&ipuRegs.cmd._u64);
@ -287,7 +287,7 @@ void ipuSoftReset()
ipu_cmd.clear(); ipu_cmd.clear();
ipuRegs.cmd.BUSY = 0; ipuRegs.cmd.BUSY = 0;
ipuRegs.cmd.DATA = 0; // required for Enthusia - Professional Racing after fix, or will freeze at start of next video. ipuRegs.cmd.DATA = 0; // required for Enthusia - Professional Racing after fix, or will freeze at start of next video.
hwIntcIrq(INTC_IPU); // required for FightBox hwIntcIrq(INTC_IPU); // required for FightBox
} }
@ -582,7 +582,7 @@ static __ri bool ipuCSC(tIPU_CMD_CSC csc)
ipu_csc(decoder.mb8, decoder.rgb32, 0); ipu_csc(decoder.mb8, decoder.rgb32, 0);
if (csc.OFM) ipu_dither(decoder.rgb32, decoder.rgb16, csc.DTE); if (csc.OFM) ipu_dither(decoder.rgb32, decoder.rgb16, csc.DTE);
if (csc.OFM) if (csc.OFM)
{ {
ipu_cmd.pos[1] += ipu_fifo.out.write(((u32*) & decoder.rgb16) + 4 * ipu_cmd.pos[1], 32 - ipu_cmd.pos[1]); ipu_cmd.pos[1] += ipu_fifo.out.write(((u32*) & decoder.rgb16) + 4 * ipu_cmd.pos[1], 32 - ipu_cmd.pos[1]);
@ -769,7 +769,7 @@ __fi u8 getBits32(u8 *address, bool advance)
if (!g_BP.FillBuffer(32)) return 0; if (!g_BP.FillBuffer(32)) return 0;
const u8* readpos = &g_BP.internal_qwc->_u8[g_BP.BP/8]; const u8* readpos = &g_BP.internal_qwc->_u8[g_BP.BP/8];
if(uint shift = (g_BP.BP & 7)) if(uint shift = (g_BP.BP & 7))
{ {
u32 mask = (0xff >> shift); u32 mask = (0xff >> shift);

View File

@ -275,7 +275,7 @@ union tIPU_cmd
u32 current; u32 current;
}; };
}; };
u128 _u128[2]; u128 _u128[2];
void clear(); void clear();

View File

@ -124,7 +124,7 @@ int IPU_Fifo_Output::write(const u32 *value, uint size)
uint origsize = size; uint origsize = size;
/*do {*/ /*do {*/
//IPU0dma(); //IPU0dma();
uint transsize = std::min(size, 8 - (uint)ipuRegs.ctrl.OFC); uint transsize = std::min(size, 8 - (uint)ipuRegs.ctrl.OFC);
if(!transsize) return 0; if(!transsize) return 0;
@ -147,7 +147,7 @@ void IPU_Fifo_Output::read(void *value, uint size)
{ {
pxAssert(ipuRegs.ctrl.OFC >= size); pxAssert(ipuRegs.ctrl.OFC >= size);
ipuRegs.ctrl.OFC -= size; ipuRegs.ctrl.OFC -= size;
// Zeroing the read data is not needed, since the ringbuffer design will never read back // Zeroing the read data is not needed, since the ringbuffer design will never read back
// the zero'd data anyway. --air // the zero'd data anyway. --air

View File

@ -182,7 +182,7 @@ void IPU0dma()
ipu0ch.madr += readsize << 4; ipu0ch.madr += readsize << 4;
ipu0ch.qwc -= readsize; ipu0ch.qwc -= readsize;
if (dmacRegs.ctrl.STS == STS_fromIPU) // STS == fromIPU if (dmacRegs.ctrl.STS == STS_fromIPU) // STS == fromIPU
{ {
//DevCon.Warning("fromIPU Stall Control"); //DevCon.Warning("fromIPU Stall Control");

View File

@ -236,7 +236,7 @@ int __fi get_dmv()
int get_macroblock_address_increment() int get_macroblock_address_increment()
{ {
const MBAtab *mba; const MBAtab *mba;
u16 code = UBITS(16); u16 code = UBITS(16);
if (code >= 4096) if (code >= 4096)
@ -287,7 +287,7 @@ static __fi int get_luma_dc_dct_diff()
// 9 bits max // 9 bits max
} }
if (size==0) if (size==0)
dc_diff = 0; dc_diff = 0;
else else
@ -347,7 +347,7 @@ static bool get_intra_block()
const u8 (&quant_matrix)[64] = decoder.iq; const u8 (&quant_matrix)[64] = decoder.iq;
int quantizer_scale = decoder.quantizer_scale; int quantizer_scale = decoder.quantizer_scale;
s16 * dest = decoder.DCTblock; s16 * dest = decoder.DCTblock;
u16 code; u16 code;
/* decode AC coefficients */ /* decode AC coefficients */
for (int i=1 + ipu_cmd.pos[4]; ; i++) for (int i=1 + ipu_cmd.pos[4]; ; i++)
@ -428,7 +428,7 @@ static bool get_intra_block()
ipu_cmd.pos[4] = 0; ipu_cmd.pos[4] = 0;
return true; return true;
} }
i += (tab->run == 65) ? GETBITS(6) : tab->run; i += (tab->run == 65) ? GETBITS(6) : tab->run;
if (i >= 64) if (i >= 64)
{ {
@ -528,7 +528,7 @@ static bool get_non_intra_block(int * last)
tab = &DCT.first[(code >> 12) - 4]; tab = &DCT.first[(code >> 12) - 4];
} }
else else
{ {
tab = &DCT.next[(code >> 12)- 4]; tab = &DCT.next[(code >> 12)- 4];
} }
} }
@ -537,7 +537,7 @@ static bool get_non_intra_block(int * last)
tab = &DCT.tab0[(code >> 8) - 4]; tab = &DCT.tab0[(code >> 8) - 4];
} }
else if (code >= 512) else if (code >= 512)
{ {
tab = &DCT.tab1[(code >> 6) - 8]; tab = &DCT.tab1[(code >> 6) - 8];
} }
@ -547,23 +547,23 @@ static bool get_non_intra_block(int * last)
// have lots of room to spare. // have lots of room to spare.
else if (code >= 256) else if (code >= 256)
{ {
tab = &DCT.tab2[(code >> 4) - 16]; tab = &DCT.tab2[(code >> 4) - 16];
} }
else if (code >= 128) else if (code >= 128)
{ {
tab = &DCT.tab3[(code >> 3) - 16]; tab = &DCT.tab3[(code >> 3) - 16];
} }
else if (code >= 64) else if (code >= 64)
{ {
tab = &DCT.tab4[(code >> 2) - 16]; tab = &DCT.tab4[(code >> 2) - 16];
} }
else if (code >= 32) else if (code >= 32)
{ {
tab = &DCT.tab5[(code >> 1) - 16]; tab = &DCT.tab5[(code >> 1) - 16];
} }
else if (code >= 16) else if (code >= 16)
{ {
tab = &DCT.tab6[code - 16]; tab = &DCT.tab6[code - 16];
} }
else else
@ -884,7 +884,7 @@ __fi bool mpeg2sliceIDEC()
default: /* end of slice/frame, or error? */ default: /* end of slice/frame, or error? */
{ {
goto finish_idec; goto finish_idec;
} }
} }
} }
@ -990,7 +990,7 @@ __fi bool mpeg2_slice()
decoder.dc_dct_pred[1] = decoder.dc_dct_pred[1] =
decoder.dc_dct_pred[2] = 128 << decoder.intra_dc_precision; decoder.dc_dct_pred[2] = 128 << decoder.intra_dc_precision;
} }
ipuRegs.ctrl.ECD = 0; ipuRegs.ctrl.ECD = 0;
ipuRegs.top = 0; ipuRegs.top = 0;
memzero_sse_a(mb8); memzero_sse_a(mb8);
@ -1236,7 +1236,7 @@ __fi bool mpeg2_slice()
g_BP.Align(); g_BP.Align();
do do
{ {
if (!g_BP.FillBuffer(24)) if (!g_BP.FillBuffer(24))
{ {
ipu_cmd.pos[0] = 4; ipu_cmd.pos[0] = 4;
return false; return false;

View File

@ -171,7 +171,7 @@ struct decoder_t {
{ {
return ((u128*)&mb8) + ipu0_idx; return ((u128*)&mb8) + ipu0_idx;
} }
void AdvanceIpuDataBy(uint amt) void AdvanceIpuDataBy(uint amt)
{ {
pxAssertMsg(ipu0_data>=amt, "IPU FIFO Overflow on advance!" ); pxAssertMsg(ipu0_data>=amt, "IPU FIFO Overflow on advance!" );

View File

@ -21,7 +21,7 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/ */
// WARNING! This file should only be included into Mpeg.cpp AND NOWHERE ELSE. // WARNING! This file should only be included into Mpeg.cpp AND NOWHERE ELSE.
// All contents of this file are used only by Mpeg.cpp, and including it elsewhere will // All contents of this file are used only by Mpeg.cpp, and including it elsewhere will
// just result in the linker having to remove a whole lot of redundant/unused decoder // just result in the linker having to remove a whole lot of redundant/unused decoder

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@ -75,7 +75,7 @@ void intMemcheck(u32 op, u32 bits, bool store)
start = standardizeBreakpointAddress(start); start = standardizeBreakpointAddress(start);
u32 end = start + bits/8; u32 end = start + bits/8;
auto checks = CBreakPoints::GetMemChecks(); auto checks = CBreakPoints::GetMemChecks();
for (size_t i = 0; i < checks.size(); i++) for (size_t i = 0; i < checks.size(); i++)
{ {
@ -499,7 +499,7 @@ static void intEventTest()
{ {
// Perform counters, ints, and IOP updates: // Perform counters, ints, and IOP updates:
_cpuEventTest_Shared(); _cpuEventTest_Shared();
if (intExitExecution) if (intExitExecution)
{ {
intExitExecution = false; intExitExecution = false;

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@ -577,9 +577,9 @@ void psxRcntWcount32(int index, u32 value)
} }
psxCounters[index].count = value; psxCounters[index].count = value;
if (psxCounters[index].count > psxCounters[index].target) if (psxCounters[index].count > psxCounters[index].target)
{ {
// Count already higher than Target // Count already higher than Target
//DevCon.Warning("32bit Count already higher than target"); //DevCon.Warning("32bit Count already higher than target");
psxCounters[index].target |= IOPCNT_FUTURE_TARGET; psxCounters[index].target |= IOPCNT_FUTURE_TARGET;

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@ -13,7 +13,7 @@
* If not, see <http://www.gnu.org/licenses/>. * If not, see <http://www.gnu.org/licenses/>.
*/ */
#pragma once #pragma once
extern void psxDma2(u32 madr, u32 bcr, u32 chcr); extern void psxDma2(u32 madr, u32 bcr, u32 chcr);
extern void psxDma3(u32 madr, u32 bcr, u32 chcr); extern void psxDma3(u32 madr, u32 bcr, u32 chcr);

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@ -163,11 +163,11 @@ __inline unsigned long MFC2(int reg) {
gteORGB = (((gteIR1 >> 7) & 0x1f)) | gteORGB = (((gteIR1 >> 7) & 0x1f)) |
(((gteIR2 >> 7) & 0x1f) << 5) | (((gteIR2 >> 7) & 0x1f) << 5) |
(((gteIR3 >> 7) & 0x1f) << 10); (((gteIR3 >> 7) & 0x1f) << 10);
// gteORGB = (gteIR1 ) | // gteORGB = (gteIR1 ) |
// (gteIR2 << 5) | // (gteIR2 << 5) |
// (gteIR3 << 10); // (gteIR3 << 10);
// gteORGB = ((gteIR1 & 0xf80)>>7) | // gteORGB = ((gteIR1 & 0xf80)>>7) |
// ((gteIR2 & 0xf80)>>2) | // ((gteIR2 & 0xf80)>>2) |
// ((gteIR3 & 0xf80)<<3); // ((gteIR3 & 0xf80)<<3);
return gteORGB; return gteORGB;
@ -453,7 +453,7 @@ __inline double limG1(double x) {
if (x > 1023.0) { x = 1023.0; gteFLAG |= (1 << 14); } if (x > 1023.0) { x = 1023.0; gteFLAG |= (1 << 14); }
else else
if (x < -1024.0) { x = -1024.0; gteFLAG |= (1 << 14); } if (x < -1024.0) { x = -1024.0; gteFLAG |= (1 << 14); }
return (x); return (x);
} }
@ -494,10 +494,10 @@ __inline s32 FlimE(s32 x) { _LIMX(0, 65535, 12); }
__inline s32 FlimG1(s64 x) { __inline s32 FlimG1(s64 x) {
if (x > 2147483647) { gteFLAG |= (1 << 16); } if (x > 2147483647) { gteFLAG |= (1 << 16); }
else if (x < (s64)0xffffffff80000000) { gteFLAG |= (1 << 15); } else if (x < (s64)0xffffffff80000000) { gteFLAG |= (1 << 15); }
if (x > 1023) { x = 1023; gteFLAG |= (1 << 14); } if (x > 1023) { x = 1023; gteFLAG |= (1 << 14); }
else if (x < -1024) { x = -1024; gteFLAG |= (1 << 14); } else if (x < -1024) { x = -1024; gteFLAG |= (1 << 14); }
return (x); return (x);
} }
@ -508,8 +508,8 @@ __inline s32 FlimG2(s64 x) {
if (x > 1023) { x = 1023; gteFLAG |= (1 << 13); } if (x > 1023) { x = 1023; gteFLAG |= (1 << 13); }
else else
if (x < -1024) { x = -1024; gteFLAG |= (1 << 13); } if (x < -1024) { x = -1024; gteFLAG |= (1 << 13); }
return (x); return (x);
} }
@ -2475,7 +2475,7 @@ void gteDPCS() {
} }
void gteDPCT() { void gteDPCT() {
// unsigned long C,R,G,B; // unsigned long C,R,G,B;
// double RR0,GG0,BB0; // double RR0,GG0,BB0;
#ifdef GTE_DUMP #ifdef GTE_DUMP
static int sample = 0; sample++; static int sample = 0; sample++;

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@ -101,7 +101,7 @@ void iopMemoryReserve::Reset()
psxMemWLUT[i + 0x2000 + 0x1e00] = (uptr)&eeMem->ROM1[i << 16]; psxMemWLUT[i + 0x2000 + 0x1e00] = (uptr)&eeMem->ROM1[i << 16];
} }
for (int i = 0; i < 0x0008; i++) for (int i = 0; i < 0x0008; i++)
{ {
psxMemWLUT[i + 0x2000 + 0x1e40] = (uptr)&eeMem->ROM2[i << 16]; psxMemWLUT[i + 0x2000 + 0x1e40] = (uptr)&eeMem->ROM2[i << 16];
} }

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@ -183,7 +183,7 @@ void PMFHL() {
case 0x02: // SLW case 0x02: // SLW
{ {
s64 TempS64 = ((u64)cpuRegs.HI.UL[0] << 32) | (u64)cpuRegs.LO.UL[0]; s64 TempS64 = ((u64)cpuRegs.HI.UL[0] << 32) | (u64)cpuRegs.LO.UL[0];
if (TempS64 >= 0x000000007fffffffLL) { if (TempS64 >= 0x000000007fffffffLL) {
cpuRegs.GPR.r[_Rd_].UD[0] = 0x000000007fffffffLL; cpuRegs.GPR.r[_Rd_].UD[0] = 0x000000007fffffffLL;
} else if (TempS64 <= -0x80000000LL) { } else if (TempS64 <= -0x80000000LL) {

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@ -137,7 +137,7 @@ void SysMtgsThread::ThreadEntryPoint()
m_sem_event.WaitForWork(); m_sem_event.WaitForWork();
} }
// try initializing.. this could fail // try initializing.. this could fail
const bool opened = TryOpenGS(); const bool opened = TryOpenGS();
m_open_flag.store(opened, std::memory_order_release); m_open_flag.store(opened, std::memory_order_release);
@ -997,7 +997,7 @@ void SysMtgsThread::SetSoftwareRendering(bool software, bool display_message /*
new_renderer = EmuConfig.GS.UseHardwareRenderer() ? EmuConfig.GS.Renderer : GSRendererType::Auto; new_renderer = EmuConfig.GS.UseHardwareRenderer() ? EmuConfig.GS.Renderer : GSRendererType::Auto;
else else
new_renderer = GSRendererType::SW; new_renderer = GSRendererType::SW;
SwitchRenderer(new_renderer, display_message); SwitchRenderer(new_renderer, display_message);
} }

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@ -362,7 +362,7 @@ void VU_Thread::Get_MTVUChanges()
u32 interrupts = mtvuInterrupts.load(std::memory_order_relaxed); u32 interrupts = mtvuInterrupts.load(std::memory_order_relaxed);
if (!interrupts) if (!interrupts)
return; return;
if (interrupts & InterruptFlagSignal) if (interrupts & InterruptFlagSignal)
{ {
std::atomic_thread_fence(std::memory_order_acquire); std::atomic_thread_fence(std::memory_order_acquire);
@ -415,7 +415,7 @@ void VU_Thread::Get_MTVUChanges()
if (interrupts & InterruptFlagVUEBit) if (interrupts & InterruptFlagVUEBit)
{ {
mtvuInterrupts.fetch_and(~InterruptFlagVUEBit, std::memory_order_relaxed); mtvuInterrupts.fetch_and(~InterruptFlagVUEBit, std::memory_order_relaxed);
if(INSTANT_VU1) if(INSTANT_VU1)
VU0.VI[REG_VPU_STAT].UL &= ~0xFF00; VU0.VI[REG_VPU_STAT].UL &= ~0xFF00;
//DevCon.Warning("E-Bit registered %x", VU0.VI[REG_VPU_STAT].UL); //DevCon.Warning("E-Bit registered %x", VU0.VI[REG_VPU_STAT].UL);

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@ -99,7 +99,7 @@ public:
void WriteVIRegs(REG_VI* viRegs); void WriteVIRegs(REG_VI* viRegs);
void WriteVFRegs(VECTOR* vfRegs); void WriteVFRegs(VECTOR* vfRegs);
void WriteCol(vifStruct& _vif); void WriteCol(vifStruct& _vif);
void WriteRow(vifStruct& _vif); void WriteRow(vifStruct& _vif);

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@ -462,28 +462,28 @@ template<int vunum> static __fi void ClearVuFunc(u32 addr, u32 size) {
template<int vunum> static mem8_t vuMicroRead8(u32 addr) { template<int vunum> static mem8_t vuMicroRead8(u32 addr) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) vu1Thread.WaitVU(); if (vunum && THREAD_VU1) vu1Thread.WaitVU();
return vu->Micro[addr]; return vu->Micro[addr];
} }
template<int vunum> static mem16_t vuMicroRead16(u32 addr) { template<int vunum> static mem16_t vuMicroRead16(u32 addr) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) vu1Thread.WaitVU(); if (vunum && THREAD_VU1) vu1Thread.WaitVU();
return *(u16*)&vu->Micro[addr]; return *(u16*)&vu->Micro[addr];
} }
template<int vunum> static mem32_t vuMicroRead32(u32 addr) { template<int vunum> static mem32_t vuMicroRead32(u32 addr) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) vu1Thread.WaitVU(); if (vunum && THREAD_VU1) vu1Thread.WaitVU();
return *(u32*)&vu->Micro[addr]; return *(u32*)&vu->Micro[addr];
} }
template<int vunum> static RETURNS_R64 vuMicroRead64(u32 addr) { template<int vunum> static RETURNS_R64 vuMicroRead64(u32 addr) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) vu1Thread.WaitVU(); if (vunum && THREAD_VU1) vu1Thread.WaitVU();
return r64_load(&vu->Micro[addr]); return r64_load(&vu->Micro[addr]);
} }
@ -491,7 +491,7 @@ template<int vunum> static RETURNS_R128 vuMicroRead128(u32 addr) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) vu1Thread.WaitVU(); if (vunum && THREAD_VU1) vu1Thread.WaitVU();
return r128_load(&vu->Micro[addr]); return r128_load(&vu->Micro[addr]);
} }
@ -500,7 +500,7 @@ template<int vunum> static RETURNS_R128 vuMicroRead128(u32 addr) {
template<int vunum> static void vuMicroWrite8(u32 addr,mem8_t data) { template<int vunum> static void vuMicroWrite8(u32 addr,mem8_t data) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) { if (vunum && THREAD_VU1) {
vu1Thread.WriteMicroMem(addr, &data, sizeof(u8)); vu1Thread.WriteMicroMem(addr, &data, sizeof(u8));
return; return;
@ -513,7 +513,7 @@ template<int vunum> static void vuMicroWrite8(u32 addr,mem8_t data) {
template<int vunum> static void vuMicroWrite16(u32 addr, mem16_t data) { template<int vunum> static void vuMicroWrite16(u32 addr, mem16_t data) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) { if (vunum && THREAD_VU1) {
vu1Thread.WriteMicroMem(addr, &data, sizeof(u16)); vu1Thread.WriteMicroMem(addr, &data, sizeof(u16));
return; return;
@ -526,7 +526,7 @@ template<int vunum> static void vuMicroWrite16(u32 addr, mem16_t data) {
template<int vunum> static void vuMicroWrite32(u32 addr, mem32_t data) { template<int vunum> static void vuMicroWrite32(u32 addr, mem32_t data) {
VURegs* vu = vunum ? &VU1 : &VU0; VURegs* vu = vunum ? &VU1 : &VU0;
addr &= vunum ? 0x3fff: 0xfff; addr &= vunum ? 0x3fff: 0xfff;
if (vunum && THREAD_VU1) { if (vunum && THREAD_VU1) {
vu1Thread.WriteMicroMem(addr, &data, sizeof(u32)); vu1Thread.WriteMicroMem(addr, &data, sizeof(u32));
return; return;
@ -544,7 +544,7 @@ template<int vunum> static void vuMicroWrite64(u32 addr, const mem64_t* data) {
vu1Thread.WriteMicroMem(addr, (void*)data, sizeof(u64)); vu1Thread.WriteMicroMem(addr, (void*)data, sizeof(u64));
return; return;
} }
if (*(u64*)&vu->Micro[addr]!=data[0]) { if (*(u64*)&vu->Micro[addr]!=data[0]) {
ClearVuFunc<vunum>(addr, 8); ClearVuFunc<vunum>(addr, 8);
*(u64*)&vu->Micro[addr] =data[0]; *(u64*)&vu->Micro[addr] =data[0];
@ -735,7 +735,7 @@ void eeMemoryReserve::Reset()
pxAssert(Source_PageFault); pxAssert(Source_PageFault);
mmap_faultHandler = new mmap_PageFaultHandler(); mmap_faultHandler = new mmap_PageFaultHandler();
} }
_parent::Reset(); _parent::Reset();
// Note!! Ideally the vtlb should only be initialized once, and then subsequent // Note!! Ideally the vtlb should only be initialized once, and then subsequent
@ -765,7 +765,7 @@ void eeMemoryReserve::Reset()
vu0_micro_mem = vtlb_RegisterHandlerTempl1(vuMicro,0); vu0_micro_mem = vtlb_RegisterHandlerTempl1(vuMicro,0);
vu1_micro_mem = vtlb_RegisterHandlerTempl1(vuMicro,1); vu1_micro_mem = vtlb_RegisterHandlerTempl1(vuMicro,1);
vu1_data_mem = (1||THREAD_VU1) ? vtlb_RegisterHandlerTempl1(vuData,1) : 0; vu1_data_mem = (1||THREAD_VU1) ? vtlb_RegisterHandlerTempl1(vuData,1) : 0;
////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////
// IOP's "secret" Hardware Register mapping, accessible from the EE (and meant for use // IOP's "secret" Hardware Register mapping, accessible from the EE (and meant for use
// by debugging or BIOS only). The IOP's hw regs are divided into three main pages in // by debugging or BIOS only). The IOP's hw regs are divided into three main pages in
@ -797,7 +797,7 @@ void eeMemoryReserve::Reset()
// psHw Optimized Mappings // psHw Optimized Mappings
// The HW Registers have been split into pages to improve optimization. // The HW Registers have been split into pages to improve optimization.
#define hwHandlerTmpl(page) \ #define hwHandlerTmpl(page) \
hwRead8<page>, hwRead16<page>, hwRead32<page>, hwRead64<page>, hwRead128<page>, \ hwRead8<page>, hwRead16<page>, hwRead32<page>, hwRead64<page>, hwRead128<page>, \
hwWrite8<page>, hwWrite16<page>,hwWrite32<page>,hwWrite64<page>,hwWrite128<page> hwWrite8<page>, hwWrite16<page>,hwWrite32<page>,hwWrite64<page>,hwWrite128<page>
@ -878,7 +878,7 @@ eeMemoryReserve::~eeMemoryReserve()
// =========================================================================================== // ===========================================================================================
// Memory Protection and Block Checking, vtlb Style! // Memory Protection and Block Checking, vtlb Style!
// =========================================================================================== // ===========================================================================================
// For the first time code is recompiled (executed), the PS2 ram page for that code is // For the first time code is recompiled (executed), the PS2 ram page for that code is
// protected using Virtual Memory (mprotect). If the game modifies its own code then this // protected using Virtual Memory (mprotect). If the game modifies its own code then this
@ -943,7 +943,7 @@ vtlb_ProtectionMode mmap_GetRamPageInfo( u32 paddr )
void mmap_MarkCountedRamPage( u32 paddr ) void mmap_MarkCountedRamPage( u32 paddr )
{ {
pxAssert( eeMem ); pxAssert( eeMem );
paddr &= ~0xfff; paddr &= ~0xfff;
uptr ptr = (uptr)PSM( paddr ); uptr ptr = (uptr)PSM( paddr );

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@ -25,18 +25,18 @@ LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
// TEXTINCLUDE // TEXTINCLUDE
// //
1 TEXTINCLUDE 1 TEXTINCLUDE
BEGIN BEGIN
"resource.h\0" "resource.h\0"
END END
2 TEXTINCLUDE 2 TEXTINCLUDE
BEGIN BEGIN
"#include <winres.h>\r\n" "#include <winres.h>\r\n"
"\0" "\0"
END END
3 TEXTINCLUDE 3 TEXTINCLUDE
BEGIN BEGIN
"\r\n" "\r\n"
"\0" "\0"
@ -55,7 +55,7 @@ STYLE DS_SETFONT | DS_MODALFRAME | DS_FIXEDSYS | WS_POPUP | WS_CAPTION
FONT 8, "MS Shell Dlg", 0, 0, 0x1 FONT 8, "MS Shell Dlg", 0, 0, 0x1
BEGIN BEGIN
CONTROL "",IDC_BINDINGS_LIST,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_NOSORTHEADER | WS_BORDER | WS_VSCROLL | WS_TABSTOP,7,7,183,237,WS_EX_CLIENTEDGE CONTROL "",IDC_BINDINGS_LIST,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_NOSORTHEADER | WS_BORDER | WS_VSCROLL | WS_TABSTOP,7,7,183,237,WS_EX_CLIENTEDGE
// Input Bindings: // Input Bindings:
PUSHBUTTON "Select",ID_SELECT,328,34,34,15 PUSHBUTTON "Select",ID_SELECT,328,34,34,15
PUSHBUTTON "Start",ID_START,366,34,34,15 PUSHBUTTON "Start",ID_START,366,34,34,15
PUSHBUTTON "Analog",ID_ANALOG,328,51,34,15 PUSHBUTTON "Analog",ID_ANALOG,328,51,34,15

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@ -29,14 +29,14 @@ LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
// TEXTINCLUDE // TEXTINCLUDE
// //
1 TEXTINCLUDE 1 TEXTINCLUDE
BEGIN BEGIN
"resource.h\r\n" "resource.h\r\n"
"SysForwardDefs.h\r\n" "SysForwardDefs.h\r\n"
"svnrev.h\0" "svnrev.h\0"
END END
2 TEXTINCLUDE 2 TEXTINCLUDE
BEGIN BEGIN
"#define APSTUDIO_HIDDEN_SYMBOLS\r\n" "#define APSTUDIO_HIDDEN_SYMBOLS\r\n"
"#include ""windows.h""\r\n" "#include ""windows.h""\r\n"
@ -54,7 +54,7 @@ END
VS_VERSION_INFO VERSIONINFO VS_VERSION_INFO VERSIONINFO
#if PCSX2_isReleaseVersion == false && GIT_TAGGED_COMMIT && defined(GIT_TAG_HI) #if PCSX2_isReleaseVersion == false && GIT_TAGGED_COMMIT && defined(GIT_TAG_HI)
FILEVERSION GIT_TAG_HI, GIT_TAG_MID, GIT_TAG_LO, 0 FILEVERSION GIT_TAG_HI, GIT_TAG_MID, GIT_TAG_LO, 0
PRODUCTVERSION GIT_TAG_HI, GIT_TAG_MID, GIT_TAG_LO, 0 PRODUCTVERSION GIT_TAG_HI, GIT_TAG_MID, GIT_TAG_LO, 0
#else #else
FILEVERSION VER_FILE_VERSION FILEVERSION VER_FILE_VERSION
@ -114,7 +114,7 @@ LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_UK
// TEXTINCLUDE // TEXTINCLUDE
// //
3 TEXTINCLUDE 3 TEXTINCLUDE
BEGIN BEGIN
"\r\n" "\r\n"
"\0" "\0"

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@ -13,7 +13,7 @@
* If not, see <http://www.gnu.org/licenses/>. * If not, see <http://www.gnu.org/licenses/>.
*/ */
/* A reference client implementation for interfacing with PINE is available /* A reference client implementation for interfacing with PINE is available
* here: https://code.govanify.com/govanify/pine/ */ * here: https://code.govanify.com/govanify/pine/ */
#pragma once #pragma once
@ -84,10 +84,10 @@ protected:
char* m_ipc_buffer; char* m_ipc_buffer;
/** /**
* IPC Command messages opcodes. * IPC Command messages opcodes.
* A list of possible operations possible by the IPC. * A list of possible operations possible by the IPC.
* Each one of them is what we call an "opcode" and is the first * Each one of them is what we call an "opcode" and is the first
* byte sent by the IPC to differentiate between commands. * byte sent by the IPC to differentiate between commands.
*/ */
enum IPCCommand : unsigned char enum IPCCommand : unsigned char
{ {
@ -122,7 +122,7 @@ protected:
}; };
/** /**
* IPC message buffer. * IPC message buffer.
* A list of all needed fields to store an IPC message. * A list of all needed fields to store an IPC message.
*/ */
struct IPCBuffer struct IPCBuffer
@ -154,14 +154,14 @@ protected:
* buf: buffer containing the IPC command. * buf: buffer containing the IPC command.
* buf_size: size of the buffer announced. * buf_size: size of the buffer announced.
* ret_buffer: buffer that will be used to send the reply. * ret_buffer: buffer that will be used to send the reply.
* return value: IPCBuffer containing a buffer with the result * return value: IPCBuffer containing a buffer with the result
* of the command and its size. * of the command and its size.
*/ */
IPCBuffer ParseCommand(char* buf, char* ret_buffer, u32 buf_size); IPCBuffer ParseCommand(char* buf, char* ret_buffer, u32 buf_size);
/** /**
* Formats an IPC buffer * Formats an IPC buffer
* ret_buffer: return buffer to use. * ret_buffer: return buffer to use.
* size: size of the IPC buffer. * size: size of the IPC buffer.
* return value: buffer containing the status code allocated of size * return value: buffer containing the status code allocated of size
*/ */
@ -170,17 +170,17 @@ protected:
/** /**
* Initializes an open socket for IPC communication. * Initializes an open socket for IPC communication.
* return value: -1 if a fatal failure happened, 0 otherwise. * return value: -1 if a fatal failure happened, 0 otherwise.
*/ */
int StartSocket(); int StartSocket();
/** /**
* Converts an uint to an char* in little endian * Converts an uint to an char* in little endian
* res_array: the array to modify * res_array: the array to modify
* res: the value to convert * res: the value to convert
* i: when to insert it into the array * i: when to insert it into the array
* return value: res_array * return value: res_array
* NB: implicitely inlined * NB: implicitely inlined
*/ */
template <typename T> template <typename T>
static char* ToArray(char* res_array, T res, int i) static char* ToArray(char* res_array, T res, int i)
@ -190,11 +190,11 @@ protected:
} }
/** /**
* Converts a char* to an uint in little endian * Converts a char* to an uint in little endian
* arr: the array to convert * arr: the array to convert
* i: when to load it from the array * i: when to load it from the array
* return value: the converted value * return value: the converted value
* NB: implicitely inlined * NB: implicitely inlined
*/ */
template <typename T> template <typename T>
static T FromArray(char* arr, int i) static T FromArray(char* arr, int i)

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@ -67,7 +67,7 @@ enum patch_data_type {
// PCSX2 currently supports the following values: // PCSX2 currently supports the following values:
// 0 - apply the patch line once on game boot/startup // 0 - apply the patch line once on game boot/startup
// 1 - apply the patch line continuously (technically - on every vsync) // 1 - apply the patch line continuously (technically - on every vsync)
// 2 - effect of 0 and 1 combined, see below // 2 - effect of 0 and 1 combined, see below
// Note: // Note:
// - while it may seem that a value of 1 does the same as 0, but also later // - while it may seem that a value of 1 does the same as 0, but also later
// continues to apply the patch on every vsync - it's not. // continues to apply the patch on every vsync - it's not.
@ -76,7 +76,7 @@ enum patch_data_type {
// will get applied before the first vsync and therefore earlier than 1 patches. // will get applied before the first vsync and therefore earlier than 1 patches.
// - There's no "place" value which indicates to apply both once on startup // - There's no "place" value which indicates to apply both once on startup
// and then also continuously, however such behavior can be achieved by // and then also continuously, however such behavior can be achieved by
// duplicating the line where one has a 0 place and the other has a 1 place. // duplicating the line where one has a 0 place and the other has a 1 place.
enum patch_place_type { enum patch_place_type {
PPT_ONCE_ON_LOAD = 0, PPT_ONCE_ON_LOAD = 0,
PPT_CONTINUOUSLY = 1, PPT_CONTINUOUSLY = 1,

View File

@ -100,7 +100,7 @@ typedef void FnType_Void();
typedef FnType_Void* Fnptr_Void; typedef FnType_Void* Fnptr_Void;
// -------------------------------------------------------------------------------------- // --------------------------------------------------------------------------------------
// Compiler/OS specific macros and defines // Compiler/OS specific macros and defines
// -------------------------------------------------------------------------------------- // --------------------------------------------------------------------------------------
#if defined(_MSC_VER) #if defined(_MSC_VER)

View File

@ -187,7 +187,7 @@ struct R3000Acpu {
s32 (*ExecuteBlock)( s32 eeCycles ); // executes the given number of EE cycles. s32 (*ExecuteBlock)( s32 eeCycles ); // executes the given number of EE cycles.
void (*Clear)(u32 Addr, u32 Size); void (*Clear)(u32 Addr, u32 Size);
void (*Shutdown)(); void (*Shutdown)();
uint (*GetCacheReserve)(); uint (*GetCacheReserve)();
void (*SetCacheReserve)( uint reserveInMegs ); void (*SetCacheReserve)( uint reserveInMegs );
}; };

View File

@ -187,7 +187,7 @@ void psxCheckMemcheck()
int needed = psxIsMemcheckNeeded(pc); int needed = psxIsMemcheckNeeded(pc);
if (needed == 0) if (needed == 0)
return; return;
u32 op = iopMemRead32(needed == 2 ? pc + 4 : pc); u32 op = iopMemRead32(needed == 2 ? pc + 4 : pc);
// Yeah, we use the R5900 opcode table for the R3000 // Yeah, we use the R5900 opcode table for the R3000
const R5900::OPCODE& opcode = R5900::GetInstruction(op); const R5900::OPCODE& opcode = R5900::GetInstruction(op);

View File

@ -381,7 +381,7 @@ void (*psxCP2[64])() = {
gteDPCS , gteINTPL, gteMVMVA, gteNCDS, gteCDP , psxNULL , gteNCDT , psxNULL, // 10 gteDPCS , gteINTPL, gteMVMVA, gteNCDS, gteCDP , psxNULL , gteNCDT , psxNULL, // 10
psxNULL , psxNULL , psxNULL , gteNCCS, gteCC , psxNULL , gteNCS , psxNULL, // 18 psxNULL , psxNULL , psxNULL , gteNCCS, gteCC , psxNULL , gteNCS , psxNULL, // 18
gteNCT , psxNULL , psxNULL , psxNULL, psxNULL, psxNULL , psxNULL , psxNULL, // 20 gteNCT , psxNULL , psxNULL , psxNULL, psxNULL, psxNULL , psxNULL , psxNULL, // 20
gteSQR , gteDCPL , gteDPCT , psxNULL, psxNULL, gteAVSZ3, gteAVSZ4, psxNULL, // 28 gteSQR , gteDCPL , gteDPCT , psxNULL, psxNULL, gteAVSZ3, gteAVSZ4, psxNULL, // 28
gteRTPT , psxNULL , psxNULL , psxNULL, psxNULL, psxNULL , psxNULL , psxNULL, // 30 gteRTPT , psxNULL , psxNULL , psxNULL, psxNULL, psxNULL , psxNULL , psxNULL, // 30
psxNULL , psxNULL , psxNULL , psxNULL, psxNULL, gteGPF , gteGPL , gteNCCT // 38 psxNULL , psxNULL , psxNULL , psxNULL, psxNULL, gteGPF , gteGPL , gteNCCT // 38
}; };

View File

@ -255,7 +255,7 @@ __fi int cpuGetCycles(int interrupt)
const int cycles = (cpuRegs.sCycle[interrupt] + cpuRegs.eCycle[interrupt]) - cpuRegs.cycle; const int cycles = (cpuRegs.sCycle[interrupt] + cpuRegs.eCycle[interrupt]) - cpuRegs.cycle;
return std::max(1, cycles); return std::max(1, cycles);
} }
} }
// tests the cpu cycle against the given start and delta values. // tests the cpu cycle against the given start and delta values.
@ -768,7 +768,7 @@ void eeloadHook2()
Console.WriteLn("eeloadHook2: arg block is '%s'.", (char *)PSM(g_osdsys_str)); Console.WriteLn("eeloadHook2: arg block is '%s'.", (char *)PSM(g_osdsys_str));
#endif #endif
int argc = ParseArgumentString(g_osdsys_str); int argc = ParseArgumentString(g_osdsys_str);
// Back up 4 bytes from start of args block for every arg + 4 bytes for start of argv pointer block, write pointers // Back up 4 bytes from start of args block for every arg + 4 bytes for start of argv pointer block, write pointers
uptr block_start = g_osdsys_str - (argc * 4); uptr block_start = g_osdsys_str - (argc * 4);
for (int a = 0; a < argc; a++) for (int a = 0; a < argc; a++)
@ -791,12 +791,12 @@ inline bool isBranchOrJump(u32 addr)
{ {
u32 op = memRead32(addr); u32 op = memRead32(addr);
const OPCODE& opcode = GetInstruction(op); const OPCODE& opcode = GetInstruction(op);
// Return false for eret & syscall as they are branch type in pcsx2 debugging tools, // Return false for eret & syscall as they are branch type in pcsx2 debugging tools,
// but shouldn't have delay slot in isBreakpointNeeded/isMemcheckNeeded. // but shouldn't have delay slot in isBreakpointNeeded/isMemcheckNeeded.
if ((opcode.flags == (IS_BRANCH | BRANCHTYPE_SYSCALL)) || (opcode.flags == (IS_BRANCH | BRANCHTYPE_ERET))) if ((opcode.flags == (IS_BRANCH | BRANCHTYPE_SYSCALL)) || (opcode.flags == (IS_BRANCH | BRANCHTYPE_ERET)))
return false; return false;
return (opcode.flags & IS_BRANCH) != 0; return (opcode.flags & IS_BRANCH) != 0;
} }
@ -821,7 +821,7 @@ int isMemcheckNeeded(u32 pc)
{ {
if (CBreakPoints::GetNumMemchecks() == 0) if (CBreakPoints::GetNumMemchecks() == 0)
return 0; return 0;
u32 addr = pc; u32 addr = pc;
if (isBranchOrJump(addr)) if (isBranchOrJump(addr))
addr += 4; addr += 4;

View File

@ -294,7 +294,7 @@ struct R5900cpu
// the virtual cpu provider. Allocating additional heap memory from this method is // the virtual cpu provider. Allocating additional heap memory from this method is
// NOT recommended. Heap allocations should be performed by Reset only. This // NOT recommended. Heap allocations should be performed by Reset only. This
// maximizes the likeliness of reservations claiming addresses they prefer. // maximizes the likeliness of reservations claiming addresses they prefer.
// //
// Thread Affinity: // Thread Affinity:
// Called from the main/UI thread only. Cpu execution status is guaranteed to // Called from the main/UI thread only. Cpu execution status is guaranteed to
// be inactive. No locking is necessary. // be inactive. No locking is necessary.
@ -344,7 +344,7 @@ struct R5900cpu
// call to return at the nearest state check (typically handled internally using // call to return at the nearest state check (typically handled internally using
// either C++ exceptions or setjmp/longjmp). // either C++ exceptions or setjmp/longjmp).
// //
// Exception Throws: // Exception Throws:
// Throws BaseR5900Exception and all derivatives. // Throws BaseR5900Exception and all derivatives.
// Throws FileNotFound or other Streaming errors (typically related to BIOS MEC/NVM) // Throws FileNotFound or other Streaming errors (typically related to BIOS MEC/NVM)
// //
@ -358,7 +358,7 @@ struct R5900cpu
// Safely throws host exceptions from executing code (either recompiled or interpreted). // Safely throws host exceptions from executing code (either recompiled or interpreted).
// If this function is called outside the context of the CPU's code execution, then the // If this function is called outside the context of the CPU's code execution, then the
// given exception will be re-thrown automatically. // given exception will be re-thrown automatically.
// //
// Exception Throws: // Exception Throws:
// (SEH) Rethrows the given exception immediately. // (SEH) Rethrows the given exception immediately.
// (setjmp) Re-throws immediately if called from outside the context of dynamically // (setjmp) Re-throws immediately if called from outside the context of dynamically
@ -382,7 +382,7 @@ struct R5900cpu
// doesn't matter if we're stripping it out soon. ;) // doesn't matter if we're stripping it out soon. ;)
// //
void (*Clear)(u32 Addr, u32 Size); void (*Clear)(u32 Addr, u32 Size);
uint (*GetCacheReserve)(); uint (*GetCacheReserve)();
void (*SetCacheReserve)( uint reserveInMegs ); void (*SetCacheReserve)( uint reserveInMegs );
}; };
@ -411,7 +411,7 @@ enum EE_EventType
DMAC_STALL_SIS = 13, // SIS DMAC_STALL_SIS = 13, // SIS
DMAC_MFIFO_EMPTY = 14, // MEIS DMAC_MFIFO_EMPTY = 14, // MEIS
DMAC_BUS_ERROR = 15, // BEIS DMAC_BUS_ERROR = 15, // BEIS
DMAC_GIF_UNIT, DMAC_GIF_UNIT,
VIF_VU0_FINISH, VIF_VU0_FINISH,
VIF_VU1_FINISH, VIF_VU1_FINISH,

View File

@ -138,7 +138,7 @@ namespace R5900Exception
class DebugBreakpoint : public BaseR5900Exception class DebugBreakpoint : public BaseR5900Exception
{ {
DEFINE_EXCEPTION_COPYTORS(DebugBreakpoint, BaseR5900Exception) DEFINE_EXCEPTION_COPYTORS(DebugBreakpoint, BaseR5900Exception)
public: public:
explicit DebugBreakpoint() explicit DebugBreakpoint()
{ {

View File

@ -64,7 +64,7 @@ static __fi bool _add32_Overflow( s32 x, s32 y, s64 &ret )
cpuException(0x30, cpuRegs.branch); cpuException(0x30, cpuRegs.branch);
return true; return true;
} }
ret = result.SD[0]; ret = result.SD[0];
return false; return false;
@ -201,7 +201,7 @@ static int __Deci2Call(int call, u32 *addr)
sprintf( reqaddr, "%x %x %x %x", addr[3], addr[2], addr[1], addr[0] ); sprintf( reqaddr, "%x %x %x %x", addr[3], addr[2], addr[1], addr[0] );
if (!deci2addr) return 1; if (!deci2addr) return 1;
const u32* d2ptr = (u32*)PSM(deci2addr); const u32* d2ptr = (u32*)PSM(deci2addr);
BIOS_LOG("deci2reqsend: %s: deci2addr: %x,%x,%x,buf=%x %x,%x,len=%x,%x", BIOS_LOG("deci2reqsend: %s: deci2addr: %x,%x,%x,buf=%x %x,%x,len=%x,%x",
@ -952,7 +952,7 @@ void SYSCALL()
{ {
u32 memaddr = cpuRegs.GPR.n.a0.UL[0]; u32 memaddr = cpuRegs.GPR.n.a0.UL[0];
u8 params[16]; u8 params[16];
cdvdReadLanguageParams(params); cdvdReadLanguageParams(params);
u32 osdconf = 0; u32 osdconf = 0;
@ -1082,7 +1082,7 @@ void SYSCALL()
// Pretty much what this does is find instances of string arguments and remaps them. // Pretty much what this does is find instances of string arguments and remaps them.
// Instead of the addresse(s) being relative to the PS2 address space, make them relative to program memory. // Instead of the addresse(s) being relative to the PS2 address space, make them relative to program memory.
// (This fixes issue #2865) // (This fixes issue #2865)
int curRegArg = 0; int curRegArg = 0;
for (int i = 0; 1; i++) for (int i = 0; 1; i++)
{ {
@ -1113,7 +1113,7 @@ void SYSCALL()
} }
break; break;
} }
default: default:
break; break;

View File

@ -626,7 +626,7 @@ namespace R5900
const OPCODE& Class_SPECIAL(u32 op) { return tbl_Special[op & 0x3F]; } const OPCODE& Class_SPECIAL(u32 op) { return tbl_Special[op & 0x3F]; }
const OPCODE& Class_REGIMM(u32 op) { return tbl_RegImm[(op >> 16) & 0x1F]; } const OPCODE& Class_REGIMM(u32 op) { return tbl_RegImm[(op >> 16) & 0x1F]; }
const OPCODE& Class_MMI(u32 op) { return tbl_MMI[op & 0x3F]; } const OPCODE& Class_MMI(u32 op) { return tbl_MMI[op & 0x3F]; }
const OPCODE& Class_MMI0(u32 op) { return tbl_MMI0[(op >> 6) & 0x1F]; } const OPCODE& Class_MMI0(u32 op) { return tbl_MMI0[(op >> 6) & 0x1F]; }
const OPCODE& Class_MMI1(u32 op) { return tbl_MMI1[(op >> 6) & 0x1F]; } const OPCODE& Class_MMI1(u32 op) { return tbl_MMI1[(op >> 6) & 0x1F]; }

View File

@ -1,4 +1,4 @@
pcsx2 log->debugger tty mapping pcsx2 log->debugger tty mapping
ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÑÍÍÑÍÍÍÄÄÄÂÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÑÍÍÑÍÍÍÄÄÄÂÄÄÄÂÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿
Bios ³EE³ 0 ³IOP³ Bios ³ Bios ³EE³ 0 ³IOP³ Bios ³
CPU & MMI & COP0 & FPU ³EE³ 1 ³IOP³ IOP cpu ³ CPU & MMI & COP0 & FPU ³EE³ 1 ³IOP³ IOP cpu ³

View File

@ -91,7 +91,7 @@ private:
bool frameLock = false; bool frameLock = false;
// The frame value to use as the frame lock reset point // The frame value to use as the frame lock reset point
u32 frameLockTracker = 0; u32 frameLockTracker = 0;
bool IsFinishedReplaying() const; bool IsFinishedReplaying() const;
// Calls mainEmuFrame's videoCaptureToggle to end a capture if active // Calls mainEmuFrame's videoCaptureToggle to end a capture if active
void StopCapture() const; void StopCapture() const;

View File

@ -93,7 +93,7 @@ VirtualPad::VirtualPad(wxWindow* parent, int controllerPort, AppConfig::InputRec
InitPressureButtonGuiElements(virtualPadData.cross, NewBitmap(EmbeddedImage<res_crossPressed>().Get(), wxPoint(938, 369)), this, wxPoint(1055, 645)); InitPressureButtonGuiElements(virtualPadData.cross, NewBitmap(EmbeddedImage<res_crossPressed>().Get(), wxPoint(938, 369)), this, wxPoint(1055, 645));
InitPressureButtonGuiElements(virtualPadData.left, NewBitmap(EmbeddedImage<res_leftPressed>().Get(), wxPoint(110, 303)), this, wxPoint(175, 525), true); InitPressureButtonGuiElements(virtualPadData.left, NewBitmap(EmbeddedImage<res_leftPressed>().Get(), wxPoint(110, 303)), this, wxPoint(175, 525), true);
InitPressureButtonGuiElements(virtualPadData.up, NewBitmap(EmbeddedImage<res_upPressed>().Get(), wxPoint(186, 227)), this, wxPoint(175, 565), true); InitPressureButtonGuiElements(virtualPadData.up, NewBitmap(EmbeddedImage<res_upPressed>().Get(), wxPoint(186, 227)), this, wxPoint(175, 565), true);
InitPressureButtonGuiElements(virtualPadData.right, NewBitmap(EmbeddedImage<res_rightPressed>().Get(), wxPoint(248, 302)), this, wxPoint(175, 605), true); InitPressureButtonGuiElements(virtualPadData.right, NewBitmap(EmbeddedImage<res_rightPressed>().Get(), wxPoint(248, 302)), this, wxPoint(175, 605), true);
InitPressureButtonGuiElements(virtualPadData.down, NewBitmap(EmbeddedImage<res_downPressed>().Get(), wxPoint(186, 359)), this, wxPoint(175, 645), true); InitPressureButtonGuiElements(virtualPadData.down, NewBitmap(EmbeddedImage<res_downPressed>().Get(), wxPoint(186, 359)), this, wxPoint(175, 645), true);

View File

@ -9,7 +9,7 @@ PlayStation 2 Memory Card File System
PlayStation 2 Memory Card File System PlayStation 2 Memory Card File System
</h1> </h1>
<div style="clear: both"> <div style="clear: both">
<h2>By <h2>By
<a href="https://plus.google.com/101505960668383360394/?rel=author"> <a href="https://plus.google.com/101505960668383360394/?rel=author">
Ross Ridge Ross Ridge
</a> </a>
@ -27,7 +27,7 @@ missing, misleading or just plain wrong. At lot of assumptions had to
be made during my research, and it's hard know to what exactly Sony be made during my research, and it's hard know to what exactly Sony
intended in every case. All most all of the names for structures, intended in every case. All most all of the names for structures,
fields and flags were made up by me. Nothing in this document should fields and flags were made up by me. Nothing in this document should
be considered official. be considered official.
</p> </p>
<p> <p>
For brevity, unused fields and flag bits are omitted from the tables. For brevity, unused fields and flag bits are omitted from the tables.
@ -56,7 +56,7 @@ memory cards, so I've created short glossary.
<dd>See "erase block".</dd> <dd>See "erase block".</dd>
<dt>cluster</dt> <dt>cluster</dt>
<dd>The unit of allocation used in the file system. A cluster <dd>The unit of allocation used in the file system. A cluster
is one or more pages in size.</dd> is one or more pages in size.</dd>
<dt>ECC</dt> <dt>ECC</dt>
@ -140,7 +140,7 @@ about the structure of the file system is kept.</dd>
data area a spare area. The data area is used to store ordinary data area a spare area. The data area is used to store ordinary
data, while the much smaller spare area is for software defined data, while the much smaller spare area is for software defined
error-correcting codes (ECC), wear leveling, bad block remapping, error-correcting codes (ECC), wear leveling, bad block remapping,
and other functions meant to deal with defects in the media. and other functions meant to deal with defects in the media.
</p> </p>
<p>The flash devices used in PS2 memory cards have a 528 byte page <p>The flash devices used in PS2 memory cards have a 528 byte page
@ -150,7 +150,7 @@ about the structure of the file system is kept.</dd>
The are 16384 pages, for a total combined raw data area capacity The are 16384 pages, for a total combined raw data area capacity
8,388,608 bytes. 8,388,608 bytes.
</p> </p>
</div> </div>
<div style="clear: both"> <div style="clear: both">
<h2>File System Organization</h2> <h2>File System Organization</h2>
@ -327,7 +327,7 @@ in the FAT and directory entries are relative to this.
<td nowrap="nowrap"><code>alloc_end</code></td> <td nowrap="nowrap"><code>alloc_end</code></td>
<td nowrap="nowrap"><code>word</code></td> <td nowrap="nowrap"><code>word</code></td>
<td nowrap="nowrap"><code>8135</code></td> <td nowrap="nowrap"><code>8135</code></td>
<td>The cluster after the highest allocatable cluster. Relative to <td>The cluster after the highest allocatable cluster. Relative to
<code style="font-family: monospace">alloc_offset</code>. <code style="font-family: monospace">alloc_offset</code>.
<br><em>Not used.</em></td> <br><em>Not used.</em></td>
@ -337,7 +337,7 @@ in the FAT and directory entries are relative to this.
<td nowrap="nowrap"><code>rootdir_cluster</code></td> <td nowrap="nowrap"><code>rootdir_cluster</code></td>
<td nowrap="nowrap"><code>word</code></td> <td nowrap="nowrap"><code>word</code></td>
<td nowrap="nowrap"><code>0</code></td> <td nowrap="nowrap"><code>0</code></td>
<td>First cluster of the root directory. Relative to <td>First cluster of the root directory. Relative to
<code style="font-family: monospace">alloc_offset</code>. <code style="font-family: monospace">alloc_offset</code>.
<br><em>Must be zero.</em></td> <br><em>Must be zero.</em></td>
@ -476,9 +476,9 @@ if that block was found to be bad.</em></td>
FAT might look something like this: FAT might look something like this:
</p> </p>
<p style="margin-left: 4em"><code style="font-family: monospace"> <p style="margin-left: 4em"><code style="font-family: monospace">
fat_offset = fat_index % 256 fat_offset = fat_index % 256
<br> <br>
indirect_index = fat_index / 256 indirect_index = fat_index / 256
<br> <br>
indirect_offset = indirect_index % 256 indirect_offset = indirect_index % 256
<br> <br>
@ -616,28 +616,28 @@ If this flag is clear, then the file or directory has been deleted.
<tr> <tr>
<td nowrap="nowrap"><code>0x00</code></td> <td nowrap="nowrap"><code>0x00</code></td>
<td nowrap="nowrap"><code>mode</code></td> <td nowrap="nowrap"><code>mode</code></td>
<td nowrap="nowrap"><code>half</code></td> <td nowrap="nowrap"><code>half</code></td>
<td>See directory mode table. <td>See directory mode table.
<br></td> <br></td>
</tr> </tr>
<tr> <tr>
<td nowrap="nowrap"><code>0x04</code></td> <td nowrap="nowrap"><code>0x04</code></td>
<td nowrap="nowrap"><code>length</code></td> <td nowrap="nowrap"><code>length</code></td>
<td nowrap="nowrap"><code>word</code></td> <td nowrap="nowrap"><code>word</code></td>
<td>Length in bytes if a file, or entries if a directory. <td>Length in bytes if a file, or entries if a directory.
<br></td> <br></td>
</tr> </tr>
<tr> <tr>
<td nowrap="nowrap"><code>0x08</code></td> <td nowrap="nowrap"><code>0x08</code></td>
<td nowrap="nowrap"><code>created</code></td> <td nowrap="nowrap"><code>created</code></td>
<td nowrap="nowrap"><code>byte[8]</code></td> <td nowrap="nowrap"><code>byte[8]</code></td>
<td>Creation time. <td>Creation time.
<br></td> <br></td>
</tr> </tr>
<tr> <tr>
<td nowrap="nowrap"><code>0x10</code></td> <td nowrap="nowrap"><code>0x10</code></td>
<td nowrap="nowrap"><code>cluster</code></td> <td nowrap="nowrap"><code>cluster</code></td>
<td nowrap="nowrap"><code>word</code></td> <td nowrap="nowrap"><code>word</code></td>
<td>First cluster of the file, or <code style="font-family: monospace">0xFFFFFFFF</code> for an empty file. <td>First cluster of the file, or <code style="font-family: monospace">0xFFFFFFFF</code> for an empty file.
In "." entries this the first cluster of this directory's parent In "." entries this the first cluster of this directory's parent
directory instead. directory instead.
@ -647,7 +647,7 @@ Relative to <code style="font-family: monospace">alloc_offset</code>.
<tr> <tr>
<td nowrap="nowrap"><code>0x14</code></td> <td nowrap="nowrap"><code>0x14</code></td>
<td nowrap="nowrap"><code>dir_entry</code></td> <td nowrap="nowrap"><code>dir_entry</code></td>
<td nowrap="nowrap"><code>word</code></td> <td nowrap="nowrap"><code>word</code></td>
<td>Only in "." entries. Entry of this directory <td>Only in "." entries. Entry of this directory
in its parent's directory. in its parent's directory.
<br></td> <br></td>
@ -655,21 +655,21 @@ in its parent's directory.
<tr> <tr>
<td nowrap="nowrap"><code>0x18</code></td> <td nowrap="nowrap"><code>0x18</code></td>
<td nowrap="nowrap"><code>modified</code></td> <td nowrap="nowrap"><code>modified</code></td>
<td nowrap="nowrap"><code>byte[8]</code></td> <td nowrap="nowrap"><code>byte[8]</code></td>
<td>Modification time. <td>Modification time.
<br></td> <br></td>
</tr> </tr>
<tr> <tr>
<td nowrap="nowrap"><code>0x20</code></td> <td nowrap="nowrap"><code>0x20</code></td>
<td nowrap="nowrap"><code>attr</code></td> <td nowrap="nowrap"><code>attr</code></td>
<td nowrap="nowrap"><code>word</code></td> <td nowrap="nowrap"><code>word</code></td>
<td>User defined attribute <td>User defined attribute
<br></td> <br></td>
</tr> </tr>
<tr> <tr>
<td nowrap="nowrap"><code>0x40</code></td> <td nowrap="nowrap"><code>0x40</code></td>
<td nowrap="nowrap"><code>name</code></td> <td nowrap="nowrap"><code>name</code></td>
<td nowrap="nowrap"><code>byte[32]</code></td> <td nowrap="nowrap"><code>byte[32]</code></td>
<td>Zero terminated name for this directory entry. <td>Zero terminated name for this directory entry.
<br></td> <br></td>
@ -698,7 +698,7 @@ in its parent's directory.
<code style="font-family: monospace">cluster</code> field which isn't used. <code style="font-family: monospace">cluster</code> field which isn't used.
</p> </p>
<div style="float: right; padding: 1em 0 1em 1em"> <div style="float: right; padding: 1em 0 1em 1em">
<table rules="all"> <table rules="all">
<caption>Time of Day (8 bytes)</caption> <caption>Time of Day (8 bytes)</caption>
<colgroup span="3" valign="top"></colgroup> <colgroup span="3" valign="top"></colgroup>
@ -754,7 +754,7 @@ in its parent's directory.
like the PS2 browser. The <code style="font-family: monospace">DF_PSX</code> flag indicates that file like the PS2 browser. The <code style="font-family: monospace">DF_PSX</code> flag indicates that file
was copied from a PSX memory card. If the <code style="font-family: monospace">DF_POCKETSTN</code> flag was copied from a PSX memory card. If the <code style="font-family: monospace">DF_POCKETSTN</code> flag
is set as well, the file is a PocketStation application file copied is set as well, the file is a PocketStation application file copied
from a PocketStation. from a PocketStation.
</p> </p>
<p>Each directory entry is a massive 512 bytes long, so only two <p>Each directory entry is a massive 512 bytes long, so only two
@ -772,7 +772,7 @@ in its parent's directory.
<h2>Error Management</h2> <h2>Error Management</h2>
<p>A number of strategies are employed in the file system to handle <p>A number of strategies are employed in the file system to handle
errors are likely to occur when using memory cards. errors are likely to occur when using memory cards.
</p> </p>
<div> <div>
@ -858,7 +858,7 @@ in its parent's directory.
<div> <div>
<h3>NAND Flash Memory</h3> <h3>NAND Flash Memory</h3>
Micron: <a href="http://download.micron.com/pdf/technotes/nand/tn2919.pdf">NAND Flash 101: An Introduction to NAND Flash and How to Design It In Micron: <a href="http://download.micron.com/pdf/technotes/nand/tn2919.pdf">NAND Flash 101: An Introduction to NAND Flash and How to Design It In
to Your Next Product</a><br> to Your Next Product</a><br>
Wikipedia: <a href="http://en.wikipedia.org/wiki/Flash_memory">Flash memory</a><br> Wikipedia: <a href="http://en.wikipedia.org/wiki/Flash_memory">Flash memory</a><br>

View File

@ -228,18 +228,18 @@ LANGUAGE LANG_SPANISH, SUBLANG_SPANISH_MODERN
// TEXTINCLUDE // TEXTINCLUDE
// //
1 TEXTINCLUDE 1 TEXTINCLUDE
BEGIN BEGIN
"resource.h\0" "resource.h\0"
END END
2 TEXTINCLUDE 2 TEXTINCLUDE
BEGIN BEGIN
"#include ""svnrev.h""\r\n" "#include ""svnrev.h""\r\n"
"#include ""afxresmw.h""\0" "#include ""afxresmw.h""\0"
END END
3 TEXTINCLUDE 3 TEXTINCLUDE
BEGIN BEGIN
"\0" "\0"
END END

View File

@ -1232,7 +1232,7 @@ static void RegWrite_VoiceAddr(u16 value)
LoopReg = &thisvoice.LoopStartA; LoopReg = &thisvoice.LoopStartA;
thisvoice.LoopMode = 1; thisvoice.LoopMode = 1;
} }
*LoopReg = (*LoopReg & 0x0F0000) | (value & 0xFFF8); *LoopReg = (*LoopReg & 0x0F0000) | (value & 0xFFF8);
} }
break; break;

View File

@ -189,12 +189,12 @@ SaveStateBase& SaveStateBase::FreezeBios()
// Check the BIOS, and issue a warning if the bios for this state // Check the BIOS, and issue a warning if the bios for this state
// doesn't match the bios currently being used (chances are it'll still // doesn't match the bios currently being used (chances are it'll still
// work fine, but some games are very picky). // work fine, but some games are very picky).
u32 bioscheck = BiosChecksum; u32 bioscheck = BiosChecksum;
char biosdesc[256]; char biosdesc[256];
memzero( biosdesc ); memzero( biosdesc );
memcpy( biosdesc, BiosDescription.c_str(), std::min( sizeof(biosdesc), BiosDescription.length() ) ); memcpy( biosdesc, BiosDescription.c_str(), std::min( sizeof(biosdesc), BiosDescription.length() ) );
Freeze( bioscheck ); Freeze( bioscheck );
Freeze( biosdesc ); Freeze( biosdesc );
@ -209,7 +209,7 @@ SaveStateBase& SaveStateBase::FreezeBios()
biosdesc, bioscheck biosdesc, bioscheck
); );
} }
return *this; return *this;
} }
@ -217,7 +217,7 @@ SaveStateBase& SaveStateBase::FreezeInternals()
{ {
// Print this until the MTVU problem in gifPathFreeze is taken care of (rama) // Print this until the MTVU problem in gifPathFreeze is taken care of (rama)
if (THREAD_VU1) Console.Warning("MTVU speedhack is enabled, saved states may not be stable"); if (THREAD_VU1) Console.Warning("MTVU speedhack is enabled, saved states may not be stable");
// Second Block - Various CPU Registers and States // Second Block - Various CPU Registers and States
// ----------------------------------------------- // -----------------------------------------------
FreezeTag( "cpuRegs" ); FreezeTag( "cpuRegs" );

View File

@ -127,7 +127,7 @@ public:
{ {
return m_memory->GetPtr(m_idx); return m_memory->GetPtr(m_idx);
} }
u8* GetPtrEnd() const u8* GetPtrEnd() const
{ {
return m_memory->GetPtrEnd(); return m_memory->GetPtrEnd();

View File

@ -85,7 +85,7 @@ static __fi bool WriteIOPtoFifo()
sif0.iop.cycles += writeSize; //1 word per cycle sif0.iop.cycles += writeSize; //1 word per cycle
sif0.iop.counter -= writeSize; sif0.iop.counter -= writeSize;
return true; return true;
} }
@ -366,13 +366,13 @@ __fi void dmaSIF0()
psHu32(SBUS_F240) |= 0x2000; psHu32(SBUS_F240) |= 0x2000;
sif0.ee.busy = true; sif0.ee.busy = true;
// Okay, this here is needed currently (r3644). // Okay, this here is needed currently (r3644).
// FFX battles in the thunder plains map die otherwise, Phantasy Star 4 as well // FFX battles in the thunder plains map die otherwise, Phantasy Star 4 as well
// These 2 games could be made playable again by increasing the time the EE or the IOP run, // These 2 games could be made playable again by increasing the time the EE or the IOP run,
// showing that this is very timing sensible. // showing that this is very timing sensible.
// Doing this DMA unfortunately brings back an old warning in Legend of Legaia though, but it still works. // Doing this DMA unfortunately brings back an old warning in Legend of Legaia though, but it still works.
//Updated 23/08/2011: The hangs are caused by the EE suspending SIF1 DMA and restarting it when in the middle //Updated 23/08/2011: The hangs are caused by the EE suspending SIF1 DMA and restarting it when in the middle
//of processing a "REFE" tag, so the hangs can be solved by forcing the ee.end to be false //of processing a "REFE" tag, so the hangs can be solved by forcing the ee.end to be false
// (as it should always be at the beginning of a DMA). using "if iop is busy" flags breaks Tom Clancy Rainbow Six. // (as it should always be at the beginning of a DMA). using "if iop is busy" flags breaks Tom Clancy Rainbow Six.
// Legend of Legaia doesn't throw a warning either :) // Legend of Legaia doesn't throw a warning either :)

View File

@ -128,7 +128,7 @@ static __fi bool SIFIOPReadTag()
// Only use the first 24 bits. // Only use the first 24 bits.
hw_dma10.madr = sif1data & 0xffffff; hw_dma10.madr = sif1data & 0xffffff;
if (sif1words > 0xFFFFC) DevCon.Warning("SIF1 Overrun %x", sif1words); if (sif1words > 0xFFFFC) DevCon.Warning("SIF1 Overrun %x", sif1words);
//Maximum transfer amount 1mb-16 also masking out top part which is a "Mode" cache stuff, we don't care :) //Maximum transfer amount 1mb-16 also masking out top part which is a "Mode" cache stuff, we don't care :)
sif1.iop.counter = sif1words & 0xFFFFC; sif1.iop.counter = sif1words & 0xFFFFC;
@ -342,13 +342,13 @@ __fi void dmaSIF1()
sif1.ee.busy = true; sif1.ee.busy = true;
// Okay, this here is needed currently (r3644). // Okay, this here is needed currently (r3644).
// FFX battles in the thunder plains map die otherwise, Phantasy Star 4 as well // FFX battles in the thunder plains map die otherwise, Phantasy Star 4 as well
// These 2 games could be made playable again by increasing the time the EE or the IOP run, // These 2 games could be made playable again by increasing the time the EE or the IOP run,
// showing that this is very timing sensible. // showing that this is very timing sensible.
// Doing this DMA unfortunately brings back an old warning in Legend of Legaia though, but it still works. // Doing this DMA unfortunately brings back an old warning in Legend of Legaia though, but it still works.
//Updated 23/08/2011: The hangs are caused by the EE suspending SIF1 DMA and restarting it when in the middle //Updated 23/08/2011: The hangs are caused by the EE suspending SIF1 DMA and restarting it when in the middle
//of processing a "REFE" tag, so the hangs can be solved by forcing the ee.end to be false //of processing a "REFE" tag, so the hangs can be solved by forcing the ee.end to be false
// (as it should always be at the beginning of a DMA). using "if iop is busy" flags breaks Tom Clancy Rainbow Six. // (as it should always be at the beginning of a DMA). using "if iop is busy" flags breaks Tom Clancy Rainbow Six.
// Legend of Legaia doesn't throw a warning either :) // Legend of Legaia doesn't throw a warning either :)
@ -360,7 +360,7 @@ __fi void dmaSIF1()
{ {
sif1.ee.end = true; sif1.ee.end = true;
} }
} }
SIF1Dma(); SIF1Dma();

View File

@ -52,7 +52,7 @@ static const u8 memcard_psx[] = {0x5A, 0x5D, 0x5C, 0x5D, 0x04, 0x00, 0x00, 0x80}
//(A 'try' in this context is the game accessing SIO) //(A 'try' in this context is the game accessing SIO)
static const int FORCED_MCD_EJECTION_MIN_TRIES =2; static const int FORCED_MCD_EJECTION_MIN_TRIES =2;
static const int FORCED_MCD_EJECTION_MAX_TRIES =128; static const int FORCED_MCD_EJECTION_MAX_TRIES =128;
static const float FORCED_MCD_EJECTION_MAX_MS_AFTER_MIN_TRIES =2800; static const float FORCED_MCD_EJECTION_MAX_MS_AFTER_MIN_TRIES =2800;
//allow timeout also for the mcd manager panel //allow timeout also for the mcd manager panel
void SetForceMcdEjectTimeoutNow( uint port, uint slot ) void SetForceMcdEjectTimeoutNow( uint port, uint slot )
@ -95,7 +95,7 @@ void sioInit()
sio.bufSize = 4; sio.bufSize = 4;
siomode = SIO_START; siomode = SIO_START;
for(int i = 0; i < 2; i++) for(int i = 0; i < 2; i++)
{ {
for(int j = 0; j < 4; j++) for(int j = 0; j < 4; j++)
@ -155,7 +155,7 @@ SIO_WRITE sioWriteStart(u8 data)
//if(size1 != size2) //if(size1 != size2)
// DevCon.Warning("SIO: Bad command length [%02X] (%02X|%02X)", data, size1, size2); // DevCon.Warning("SIO: Bad command length [%02X] (%02X|%02X)", data, size1, size2);
// On mismatch, sio2.cmdlength (size1) is smaller than what it should (Persona 3) // On mismatch, sio2.cmdlength (size1) is smaller than what it should (Persona 3)
// while size2 is the proper length. -KrossX // while size2 is the proper length. -KrossX
sio.bufSize = size2; //std::max(size1, size2); sio.bufSize = size2; //std::max(size1, size2);
@ -325,7 +325,7 @@ SIO_WRITE memcardAuth(u8 data)
{ {
switch(data) switch(data)
{ {
case 0x01: case 0x02: case 0x04: case 0x01: case 0x02: case 0x04:
case 0x0F: case 0x11: case 0x13: case 0x0F: case 0x11: case 0x13:
doXorCheck = true; doXorCheck = true;
xorResult = 0; xorResult = 0;
@ -358,7 +358,7 @@ SIO_WRITE memcardErase(u8 data)
if(data != 0x81) sio.bufCount = -1; if(data != 0x81) sio.bufCount = -1;
break; break;
case 1: case 1:
{ {
u8 header[] = {0xFF, 0xFF, 0xFF, 0x2B, mcd->term}; u8 header[] = {0xFF, 0xFF, 0xFF, 0x2B, mcd->term};
@ -407,7 +407,7 @@ SIO_WRITE memcardWrite(u8 data)
if(data != 0x81) sio.bufCount = -1; if(data != 0x81) sio.bufCount = -1;
break; break;
case 1: case 1:
{ {
u8 header[] = {0xFF, 0xFF, 0xFF, 0x2B, mcd->term}; u8 header[] = {0xFF, 0xFF, 0xFF, 0x2B, mcd->term};
@ -464,7 +464,7 @@ SIO_WRITE memcardWrite(u8 data)
else if(sio.bufCount == checksum_pos) else if(sio.bufCount == checksum_pos)
{ {
u8 xor_check = mcd->DoXor(&sio.buf[4], checksum_pos - 4); u8 xor_check = mcd->DoXor(&sio.buf[4], checksum_pos - 4);
if(xor_check != sio.buf[sio.bufCount]) if(xor_check != sio.buf[sio.bufCount])
Console.Warning("MemWrite: Checksum invalid! XOR: %02X, IN: %02X\n", xor_check, sio.buf[sio.bufCount]); Console.Warning("MemWrite: Checksum invalid! XOR: %02X, IN: %02X\n", xor_check, sio.buf[sio.bufCount]);
@ -498,7 +498,7 @@ SIO_WRITE memcardRead(u8 data)
if(data != 0x81) sio.bufCount = -1; if(data != 0x81) sio.bufCount = -1;
break; break;
case 1: case 1:
{ {
u8 header[] = {0xFF, 0xFF, 0xFF, 0x2B, mcd->term}; u8 header[] = {0xFF, 0xFF, 0xFF, 0x2B, mcd->term};
@ -563,7 +563,7 @@ SIO_WRITE memcardRead(u8 data)
SIO_WRITE memcardSector(u8 data) SIO_WRITE memcardSector(u8 data)
{ {
static u8 xor_check = 0; static u8 xor_check = 0;
switch(sio.bufCount) switch(sio.bufCount)
{ {
case 2: mcd->sectorAddr = data << 0; xor_check = data; break; case 2: mcd->sectorAddr = data << 0; xor_check = data; break;
@ -604,7 +604,7 @@ SIO_WRITE memcardInit()
forceEject = true; forceEject = true;
u32 numTimesAccessed = FORCED_MCD_EJECTION_MAX_TRIES - mcd->ForceEjection_Timeout; u32 numTimesAccessed = FORCED_MCD_EJECTION_MAX_TRIES - mcd->ForceEjection_Timeout;
//minimum tries reached. start counting millisec timeout. //minimum tries reached. start counting millisec timeout.
if(numTimesAccessed == FORCED_MCD_EJECTION_MIN_TRIES) if(numTimesAccessed == FORCED_MCD_EJECTION_MIN_TRIES)
mcd->ForceEjection_Timestamp = Common::Timer::GetCurrentValue(); mcd->ForceEjection_Timestamp = Common::Timer::GetCurrentValue();
@ -621,7 +621,7 @@ SIO_WRITE memcardInit()
if(mcd->ForceEjection_Timeout == 0 && mcd->IsPresent()) if(mcd->ForceEjection_Timeout == 0 && mcd->IsPresent())
Console.WriteLn( Color_Green, "Re-inserting auto-ejected memcard [port:%d, slot:%d]", sio.GetPort(), sio.GetSlot()); Console.WriteLn( Color_Green, "Re-inserting auto-ejected memcard [port:%d, slot:%d]", sio.GetPort(), sio.GetSlot());
} }
if(!forceEject && mcd->IsPresent()) if(!forceEject && mcd->IsPresent())
{ {
DEVICE_PLUGGED(); DEVICE_PLUGGED();
@ -633,7 +633,7 @@ SIO_WRITE memcardInit()
siomode = SIO_DUMMY; siomode = SIO_DUMMY;
} }
} }
SIO_WRITE sioWriteMemcard(u8 data) SIO_WRITE sioWriteMemcard(u8 data)

View File

@ -26,8 +26,8 @@ struct _mcd
u32 transferAddr; // Transfer address u32 transferAddr; // Transfer address
u8 FLAG; // for PSX; u8 FLAG; // for PSX;
u8 port; // port u8 port; // port
u8 slot; // and slot for this memcard u8 slot; // and slot for this memcard
// Auto Eject // Auto Eject
@ -50,13 +50,13 @@ struct _mcd
} }
// Read from memorycard to dest // Read from memorycard to dest
void Read(u8 *dest, int size) void Read(u8 *dest, int size)
{ {
FileMcd_Read(port, slot, dest, transferAddr, size); FileMcd_Read(port, slot, dest, transferAddr, size);
} }
// Write to memorycard from src // Write to memorycard from src
void Write(u8 *src, int size) void Write(u8 *src, int size)
{ {
FileMcd_Save(port, slot, src,transferAddr, size); FileMcd_Save(port, slot, src,transferAddr, size);
} }

View File

@ -148,7 +148,7 @@ void SysLogMachineCaps()
if (GIT_TAGGED_COMMIT) // Nightly builds if (GIT_TAGGED_COMMIT) // Nightly builds
{ {
// tagged commit - more modern implementation of dev build versioning // tagged commit - more modern implementation of dev build versioning
// - there is no need to include the commit - that is associated with the tag, // - there is no need to include the commit - that is associated with the tag,
// - git is implied and the tag is timestamped // - git is implied and the tag is timestamped
Console.WriteLn(Color_StrongGreen, "PCSX2 Nightly - %s Compiled on %s", GIT_TAG, __DATE__); Console.WriteLn(Color_StrongGreen, "PCSX2 Nightly - %s Compiled on %s", GIT_TAG, __DATE__);
} else { } else {

View File

@ -170,18 +170,18 @@ LANGUAGE LANG_SPANISH, SUBLANG_SPANISH_ARGENTINA
// TEXTINCLUDE // TEXTINCLUDE
// //
1 TEXTINCLUDE 1 TEXTINCLUDE
BEGIN BEGIN
"resource_usb.h\0" "resource_usb.h\0"
END END
2 TEXTINCLUDE 2 TEXTINCLUDE
BEGIN BEGIN
"#include ""WinResrc.h""\r\n" "#include ""WinResrc.h""\r\n"
"\0" "\0"
END END
3 TEXTINCLUDE 3 TEXTINCLUDE
BEGIN BEGIN
"\r\n" "\r\n"
"\0" "\0"

View File

@ -30,7 +30,7 @@
#define IDC_STATIC_USB -1 #define IDC_STATIC_USB -1
// Next default values for new objects // Next default values for new objects
// //
#ifdef APSTUDIO_INVOKED #ifdef APSTUDIO_INVOKED
#ifndef APSTUDIO_READONLY_SYMBOLS #ifndef APSTUDIO_READONLY_SYMBOLS
#define _APS_NEXT_RESOURCE_VALUE 109 #define _APS_NEXT_RESOURCE_VALUE 109

View File

@ -54,7 +54,7 @@ void USBsetLogDir(const char* dir)
std::string GetSelectedAPI(const std::pair<int, std::string>& pair) std::string GetSelectedAPI(const std::pair<int, std::string>& pair)
{ {
USBsetSettingsDir(); USBsetSettingsDir();
auto it = changedAPIs.find(pair); auto it = changedAPIs.find(pair);
if (it != changedAPIs.end()) if (it != changedAPIs.end())
return it->second; return it->second;
@ -71,7 +71,7 @@ int GetSelectedSubtype(const std::pair<int, std::string>& pair)
bool LoadSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, TSTDSTRING& value) bool LoadSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, TSTDSTRING& value)
{ {
USBsetSettingsDir(); USBsetSettingsDir();
CIniKey* key; CIniKey* key;
#ifdef _WIN32 #ifdef _WIN32
auto sect = ciniFile.GetSection(section); auto sect = ciniFile.GetSection(section);
@ -93,7 +93,7 @@ bool LoadSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TC
bool LoadSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, int32_t& value) bool LoadSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, int32_t& value)
{ {
USBsetSettingsDir(); USBsetSettingsDir();
CIniKey* key; CIniKey* key;
#ifdef _WIN32 #ifdef _WIN32
auto sect = ciniFile.GetSection(section); auto sect = ciniFile.GetSection(section);
@ -124,7 +124,7 @@ bool LoadSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TC
bool SaveSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, const TSTDSTRING& value) bool SaveSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, const TSTDSTRING& value)
{ {
USBsetSettingsDir(); USBsetSettingsDir();
#ifdef _WIN32 #ifdef _WIN32
ciniFile.SetKeyValue(section, param, value); ciniFile.SetKeyValue(section, param, value);
#else #else
@ -135,7 +135,7 @@ bool SaveSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TC
bool SaveSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, int32_t value) bool SaveSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TCHAR* param, int32_t value)
{ {
USBsetSettingsDir(); USBsetSettingsDir();
#ifdef _WIN32 #ifdef _WIN32
ciniFile.SetKeyValue(section, param, TSTDTOSTRING(value)); ciniFile.SetKeyValue(section, param, TSTDTOSTRING(value));
#else #else
@ -146,7 +146,7 @@ bool SaveSettingValue(const TSTDSTRING& ini, const TSTDSTRING& section, const TC
void SaveConfig() void SaveConfig()
{ {
USBsetSettingsDir(); USBsetSettingsDir();
#ifdef _WIN32 #ifdef _WIN32
SaveSetting(L"MAIN", L"log", conf.Log); SaveSetting(L"MAIN", L"log", conf.Log);
#else #else
@ -260,7 +260,7 @@ void ClearSection(const TCHAR* section)
void RemoveSection(const char* dev_type, int port, const std::string& key) void RemoveSection(const char* dev_type, int port, const std::string& key)
{ {
USBsetSettingsDir(); USBsetSettingsDir();
TSTDSTRING tkey; TSTDSTRING tkey;
tkey.assign(key.begin(), key.end()); tkey.assign(key.begin(), key.end());

View File

@ -15,7 +15,7 @@
// clang-format off // clang-format off
#include "icon_buzz_24.h" #include "icon_buzz_24.h"
const unsigned char icon_buzz_24[] const unsigned char icon_buzz_24[]
{ {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,

View File

@ -23,10 +23,10 @@
/** /**
* g_malloc: * g_malloc:
* @n_bytes: the number of bytes to allocate * @n_bytes: the number of bytes to allocate
* *
* Allocates @n_bytes bytes of memory. * Allocates @n_bytes bytes of memory.
* If @n_bytes is 0 it returns %NULL. * If @n_bytes is 0 it returns %NULL.
* *
* Returns: a pointer to the allocated memory * Returns: a pointer to the allocated memory
*/ */
void* my_g_malloc(size_t n_bytes) void* my_g_malloc(size_t n_bytes)
@ -51,10 +51,10 @@ void* my_g_malloc(size_t n_bytes)
/** /**
* g_malloc0: * g_malloc0:
* @n_bytes: the number of bytes to allocate * @n_bytes: the number of bytes to allocate
* *
* Allocates @n_bytes bytes of memory, initialized to 0's. * Allocates @n_bytes bytes of memory, initialized to 0's.
* If @n_bytes is 0 it returns %NULL. * If @n_bytes is 0 it returns %NULL.
* *
* Returns: a pointer to the allocated memory * Returns: a pointer to the allocated memory
*/ */
void* my_g_malloc0(size_t n_bytes) void* my_g_malloc0(size_t n_bytes)
@ -80,10 +80,10 @@ void* my_g_malloc0(size_t n_bytes)
* g_malloc_n: * g_malloc_n:
* @n_blocks: the number of blocks to allocate * @n_blocks: the number of blocks to allocate
* @n_block_bytes: the size of each block in bytes * @n_block_bytes: the size of each block in bytes
* *
* This function is similar to g_malloc(), allocating (@n_blocks * @n_block_bytes) bytes, * This function is similar to g_malloc(), allocating (@n_blocks * @n_block_bytes) bytes,
* but care is taken to detect possible overflow during multiplication. * but care is taken to detect possible overflow during multiplication.
* *
* Since: 2.24 * Since: 2.24
* Returns: a pointer to the allocated memory * Returns: a pointer to the allocated memory
*/ */
@ -103,13 +103,13 @@ void* my_g_malloc_n(size_t n_blocks,
* g_realloc: * g_realloc:
* @mem: (nullable): the memory to reallocate * @mem: (nullable): the memory to reallocate
* @n_bytes: new size of the memory in bytes * @n_bytes: new size of the memory in bytes
* *
* Reallocates the memory pointed to by @mem, so that it now has space for * Reallocates the memory pointed to by @mem, so that it now has space for
* @n_bytes bytes of memory. It returns the new address of the memory, which may * @n_bytes bytes of memory. It returns the new address of the memory, which may
* have been moved. @mem may be %NULL, in which case it's considered to * have been moved. @mem may be %NULL, in which case it's considered to
* have zero-length. @n_bytes may be 0, in which case %NULL will be returned * have zero-length. @n_bytes may be 0, in which case %NULL will be returned
* and @mem will be freed unless it is %NULL. * and @mem will be freed unless it is %NULL.
* *
* Returns: the new address of the allocated memory * Returns: the new address of the allocated memory
*/ */
void* my_g_realloc(void* mem, void* my_g_realloc(void* mem,
@ -139,10 +139,10 @@ void* my_g_realloc(void* mem,
* @mem: (nullable): the memory to reallocate * @mem: (nullable): the memory to reallocate
* @n_blocks: the number of blocks to allocate * @n_blocks: the number of blocks to allocate
* @n_block_bytes: the size of each block in bytes * @n_block_bytes: the size of each block in bytes
* *
* This function is similar to g_realloc(), allocating (@n_blocks * @n_block_bytes) bytes, * This function is similar to g_realloc(), allocating (@n_blocks * @n_block_bytes) bytes,
* but care is taken to detect possible overflow during multiplication. * but care is taken to detect possible overflow during multiplication.
* *
* Since: 2.24 * Since: 2.24
* Returns: the new address of the allocated memory * Returns: the new address of the allocated memory
*/ */

View File

@ -1,8 +1,8 @@
/* /*
* QEMU USB API * QEMU USB API
* *
* Copyright (c) 2005 Fabrice Bellard * Copyright (c) 2005 Fabrice Bellard
* *
* Permission is hereby granted, free of charge, to any person obtaining a copy * Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal * of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights * in the Software without restriction, including without limitation the rights

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