diff --git a/pcsx2/Counters.cpp b/pcsx2/Counters.cpp
index 3825b41d59..b43cf890f7 100644
--- a/pcsx2/Counters.cpp
+++ b/pcsx2/Counters.cpp
@@ -338,13 +338,13 @@ static __forceinline void VSyncStart(u32 sCycle)
 
 	if ((CSRw & 0x8)) 
 	{
-		GSCSRr|= 0x8;
+		
 		
 		if (!(GSIMR&0x800)) 
 		{
 			gsIrq();
 		}
-		CSRw &= ~0x8; //Disable the interrupt from triggering twice
+		GSCSRr|= 0x8;
 	}
 
 	hwIntcIrq(INTC_VBLANK_S);
@@ -414,13 +414,13 @@ __forceinline void rcntUpdate_hScanline()
 	else { //HBLANK END / HRENDER Begin
 		if (CSRw & 0x4) 
 		{
-			GSCSRr |= 4; // signal
+			
 			
 			if (!(GSIMR&0x400)) 
 			{
 				gsIrq();
 			}
-			CSRw &= ~0x4; //Disable the interrupt from triggering twice
+			GSCSRr |= 4; // signal
 		}
 		if (gates) rcntEndGate(false, hsyncCounter.sCycle);
 		if (psxhblankgate) psxCheckEndGate16(0);
diff --git a/pcsx2/MTGS.cpp b/pcsx2/MTGS.cpp
index 858d2536b6..131d80b150 100644
--- a/pcsx2/MTGS.cpp
+++ b/pcsx2/MTGS.cpp
@@ -139,13 +139,12 @@ static void RegHandlerSIGNAL(const u32* data)
 	
 	if ((CSRw & 0x1))
 	{
-		GSCSRr |= 1; // signal
-			
 		if (!(GSIMR&0x100) )  
 		{
 			gsIrq();
 		}
-		CSRw &= ~0x1; //Disable the interrupt from triggering twice
+
+		GSCSRr |= 1; // signal
 	}
 }
 
@@ -155,11 +154,10 @@ static void RegHandlerFINISH(const u32* data)
 
 	if ((CSRw & 0x2))
 	{
-		GSCSRr |= 2; // finish
-	
-		if (!(GSIMR&0x200) )
+		if (!(GSIMR&0x200))
 			gsIrq();
-		CSRw &= ~0x2; //Disable the interrupt from triggering twice
+
+		GSCSRr |= 2; // finish
 	}
 }