mirror of https://github.com/PCSX2/pcsx2.git
Linux: Use memcmp_mmx instead of memcmp; Add a workaround to a segfault in iVif on some games.
git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1350 96395faa-99c1-11dd-bbfe-3dabce05a288
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@ -25,8 +25,6 @@
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#include <xmmintrin.h>
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#include <emmintrin.h>
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//#define USE_OLD_IVIF_CODE
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// sse2 highly optimized vif (~200 separate functions are built) zerofrog(@gmail.com)
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extern u32 g_vif1Masks[48], g_vif0Masks[48];
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extern u32 g_vif1HasMask3[4], g_vif0HasMask3[4];
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@ -55,7 +53,10 @@ extern u8 s_maskwrite[256];
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extern "C" PCSX2_ALIGNED16(u32 s_TempDecompress[4]) = {0};
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#if defined(_MSC_VER) || !defined(USE_OLD_IVIF_CODE)
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#ifdef __LINUX__
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static void __forceinline UseOldMaskCode(u32* &vif1masks, u32 &mask);
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#endif
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void __fastcall SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask)
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{
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u32 i;
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@ -66,7 +67,13 @@ void __fastcall SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask)
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prev |= s_maskwrite[mask&0xff];
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hasmask[i] = prev;
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if( (mask&0xff) != (oldmask&0xff) ) {
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if ((mask&0xff) != (oldmask&0xff))
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#ifdef __LINUX__
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if (mask == 0) // Temporary workaround for a bug causing a segfault.
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UseOldMaskCode(vif1masks, mask);
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else
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#endif
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{
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__m128i r0, r1, r2, r3;
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r0 = _mm_load_si128((__m128i*)&s_maskarr[mask&15][0]);
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r2 = _mm_unpackhi_epi16(r0, r0);
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@ -90,47 +97,29 @@ void __fastcall SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask)
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FreezeXMMRegs(0);
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}
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#else // gcc
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// After some experimentation, I'm putting the old code back in for now for testing purposes, as the
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// other version reliably SegFaults when loading YuGiOh: Duelist of the Roses on Linux (when setting
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// r0 to _mm_load_si128, when vif1masks=0x846f670, hasmask=0x846f454, mask=0, and oldmask=5).
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// Seems to work everywhere else. It'll stay disabled for now, but it's easier for me to fiddle with if its in here. -arcum42
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void __fastcall SetNewMask(u32* vif1masks, u32* hasmask, u32 mask, u32 oldmask)
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#ifdef __LINUX__
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static void __forceinline UseOldMaskCode(u32* &vif1masks, u32 &mask)
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{
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u32 i;
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u32 prev = 0;
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FreezeXMMRegs(1);
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u8* p0 = (u8*)&s_maskarr[mask&15][0];
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u8* p1 = (u8*)&s_maskarr[(mask>>4)&15][0];
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for(i = 0; i < 4; ++i, mask >>= 8, oldmask >>= 8, vif1masks += 16) {
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prev |= s_maskwrite[mask&0xff];//((mask&3)==3)||((mask&0xc)==0xc)||((mask&0x30)==0x30)||((mask&0xc0)==0xc0);
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hasmask[i] = prev;
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if( (mask&0xff) != (oldmask&0xff) ) {
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u8* p0 = (u8*)&s_maskarr[mask&15][0];
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u8* p1 = (u8*)&s_maskarr[(mask>>4)&15][0];
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__asm__(".intel_syntax noprefix\n"
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"movaps xmm0, [%0]\n"
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"movaps xmm1, [%1]\n"
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"movaps xmm2, xmm0\n"
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"punpcklwd xmm0, xmm0\n"
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"punpckhwd xmm2, xmm2\n"
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"movaps xmm3, xmm1\n"
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"punpcklwd xmm1, xmm1\n"
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"punpckhwd xmm3, xmm3\n"
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"movq [%2], xmm0\n"
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"movq [%2+8], xmm1\n"
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"movhps [%2+16], xmm0\n"
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"movhps [%2+24], xmm1\n"
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"movq [%2+32], xmm2\n"
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"movq [%2+40], xmm3\n"
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"movhps [%2+48], xmm2\n"
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"movhps [%2+56], xmm3\n"
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".att_syntax\n" : : "r"(p0), "r"(p1), "r"(vif1masks) );
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}
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}
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FreezeXMMRegs(0);
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__asm__(".intel_syntax noprefix\n"
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"movaps xmm0, [%0]\n"
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"movaps xmm1, [%1]\n"
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"movaps xmm2, xmm0\n"
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"punpcklwd xmm0, xmm0\n"
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"punpckhwd xmm2, xmm2\n"
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"movaps xmm3, xmm1\n"
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"punpcklwd xmm1, xmm1\n"
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"punpckhwd xmm3, xmm3\n"
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"movq [%2], xmm0\n"
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"movq [%2+8], xmm1\n"
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"movhps [%2+16], xmm0\n"
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"movhps [%2+24], xmm1\n"
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"movq [%2+32], xmm2\n"
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"movq [%2+40], xmm3\n"
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"movhps [%2+48], xmm2\n"
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"movhps [%2+56], xmm3\n"
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".att_syntax\n" : : "r"(p0), "r"(p1), "r"(vif1masks) );
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}
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#endif
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@ -169,7 +169,8 @@ typedef u32 (__fastcall *mVUCall)(void*, void*);
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// that they're not guaranteeing 16-byte alignment on the structs
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// being compared. So use this function instead:
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#else
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#define mVUquickSearch(dest, src, size) (!memcmp(dest, src, size))
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//#define mVUquickSearch(dest, src, size) (!memcmp(dest, src, size))
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#define mVUquickSearch(dest, src, size) (!memcmp_mmx(dest, src, size))
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#endif
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// Misc Macros...
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