From 6f9164b986fc724429223fc9cb7d125a7556a2eb Mon Sep 17 00:00:00 2001
From: refractionpcsx2 <refraction@gmail.com>
Date: Sat, 24 Jun 2023 01:27:46 +0100
Subject: [PATCH] IPU: Slow down BDEC and IDEC so they don't outstrip DMA data
 writes

---
 pcsx2/IPU/IPU.cpp          | 9 ++++++++-
 pcsx2/IPU/IPU.h            | 1 +
 pcsx2/IPU/IPU_Fifo.cpp     | 2 +-
 pcsx2/IPU/IPU_MultiISA.cpp | 8 ++++++--
 pcsx2/IPU/IPUdma.cpp       | 5 ++++-
 5 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/pcsx2/IPU/IPU.cpp b/pcsx2/IPU/IPU.cpp
index 2b5d084b36..5c8bcde575 100644
--- a/pcsx2/IPU/IPU.cpp
+++ b/pcsx2/IPU/IPU.cpp
@@ -94,6 +94,13 @@ __fi void IPUProcessInterrupt()
 {
 	if (ipuRegs.ctrl.BUSY && !CommandExecuteQueued)
 		IPUWorker();
+
+	if (ipuRegs.ctrl.BUSY)
+	{
+		CPU_INT(IPU_PROCESS, ProcessedData ? ProcessedData : 64);
+	}
+	else
+		ProcessedData = 0;
 }
 
 /////////////////////////////////////////////////////////
@@ -460,7 +467,7 @@ __fi void IPUCMD_WRITE(u32 val)
 {
 	// don't process anything if currently busy
 	//if (ipuRegs.ctrl.BUSY) Console.WriteLn("IPU BUSY!"); // wait for thread
-
+	ProcessedData = 0;
 	ipuRegs.ctrl.ECD = 0;
 	ipuRegs.ctrl.SCD = 0;
 	ipu_cmd.clear();
diff --git a/pcsx2/IPU/IPU.h b/pcsx2/IPU/IPU.h
index 4dc8cc03ea..2b180d87a6 100644
--- a/pcsx2/IPU/IPU.h
+++ b/pcsx2/IPU/IPU.h
@@ -294,6 +294,7 @@ extern bool EnableFMV;
 alignas(16) extern tIPU_cmd ipu_cmd;
 extern uint eecount_on_last_vdec;
 extern bool CommandExecuteQueued;
+extern u32 ProcessedData;
 
 extern void ipuReset();
 
diff --git a/pcsx2/IPU/IPU_Fifo.cpp b/pcsx2/IPU/IPU_Fifo.cpp
index 3d2b30e8f0..4cb5d6cd50 100644
--- a/pcsx2/IPU/IPU_Fifo.cpp
+++ b/pcsx2/IPU/IPU_Fifo.cpp
@@ -184,7 +184,7 @@ void WriteFIFO_IPUin(const mem128_t* value)
 		if (ipuRegs.ctrl.BUSY && !CommandExecuteQueued)
 		{
 			CommandExecuteQueued = true;
-			CPU_INT(IPU_PROCESS, 1 * BIAS);
+			CPU_INT(IPU_PROCESS, 8);
 		}
 	}
 }
diff --git a/pcsx2/IPU/IPU_MultiISA.cpp b/pcsx2/IPU/IPU_MultiISA.cpp
index 70856befc7..09c0d8e469 100644
--- a/pcsx2/IPU/IPU_MultiISA.cpp
+++ b/pcsx2/IPU/IPU_MultiISA.cpp
@@ -1116,7 +1116,9 @@ __ri static bool mpeg2sliceIDEC()
 					ipu_dither(rgb32, rgb16, decoder.dte);
 					decoder.SetOutputTo(rgb16);
 				}
-				[[fallthrough]];
+				ProcessedData += decoder.ipu0_data;
+				ipu_cmd.pos[1] = 2;
+				return false;
 
 			case 2:
 			{
@@ -1498,7 +1500,9 @@ __fi static bool mpeg2_slice()
 		coded_block_pattern = decoder.coded_block_pattern;
 
 		decoder.SetOutputTo(mb16);
-		[[fallthrough]];
+		ProcessedData += decoder.ipu0_data;
+		ipu_cmd.pos[0] = 3;
+		return false;
 
 	case 3:
 	{
diff --git a/pcsx2/IPU/IPUdma.cpp b/pcsx2/IPU/IPUdma.cpp
index f87bcb9205..eebc4f6779 100644
--- a/pcsx2/IPU/IPUdma.cpp
+++ b/pcsx2/IPU/IPUdma.cpp
@@ -21,12 +21,14 @@
 
 IPUStatus IPU1Status;
 bool CommandExecuteQueued;
+u32 ProcessedData;
 
 void ipuDmaReset()
 {
 	IPU1Status.InProgress	= false;
 	IPU1Status.DMAFinished	= true;
 	CommandExecuteQueued	= false;
+	ProcessedData			= 0;
 }
 
 void SaveStateBase::ipuDmaFreeze()
@@ -199,7 +201,7 @@ void IPU0dma()
 	{
 		CommandExecuteQueued = true;
 		CPU_SET_DMASTALL(DMAC_FROM_IPU, true);
-		CPU_INT(IPU_PROCESS, 4);
+		CPU_INT(IPU_PROCESS, readsize * BIAS);
 	}
 }
 
@@ -281,6 +283,7 @@ __fi void dmaIPU1() // toIPU
 void ipuCMDProcess()
 {
 	CommandExecuteQueued = false;
+	ProcessedData = 0;
 	IPUProcessInterrupt();
 }