mirror of https://github.com/PCSX2/pcsx2.git
microVU:
- Changed 'recPass' from a template param to a function param. Halves MSVC linking-time in release modes, but still slow (from ~10 minutes to ~5 minutes to link on my PC). I'll continue working on this later... the next change will probably reduce Release link-times to 1~2 minutes (or less than 1 minute for you guys with macho-pc's ;p). git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1287 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
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71480b3124
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@ -147,8 +147,8 @@ void __fastcall mVUcleanUpVU0();
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void __fastcall mVUcleanUpVU1();
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void* __fastcall mVUcompileVU0(u32 startPC, uptr pState);
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void* __fastcall mVUcompileVU1(u32 startPC, uptr pState);
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microVUf(void) mVUopU();
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microVUf(void) mVUopL();
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microVUf(void) mVUopU(mF);
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microVUf(void) mVUopL(mF);
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// Private Functions
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microVUt(void) mVUclearProg(microVU* mVU, int progIndex);
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@ -54,8 +54,8 @@
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#define tCycles(dest, src) { dest = aMax(dest, src); }
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#define incP() { mVU->p = (mVU->p+1) & 1; }
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#define incQ() { mVU->q = (mVU->q+1) & 1; }
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#define doUpperOp() { mVUopU<vuIndex, 1>(); mVUdivSet<vuIndex>(); }
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#define doLowerOp() { incPC(-1); mVUopL<vuIndex, 1>(); incPC(1); }
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#define doUpperOp() { mVUopU<vuIndex>(1); mVUdivSet<vuIndex>(); }
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#define doLowerOp() { incPC(-1); mVUopL<vuIndex>(1); incPC(1); }
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#define doIbit() { if (curI & _Ibit_) { incPC(-1); MOV32ItoM((uptr)&mVU->regs->VI[REG_I].UL, curI); incPC(1); } }
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//------------------------------------------------------------------
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@ -188,8 +188,8 @@ microVUt(void) mVUendProgram(int qInst, int pInst, int fStatus, int fMac, int fC
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void __fastcall mVUwarning0(u32 PC) { Console::Error("microVU0 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); }
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void __fastcall mVUwarning1(u32 PC) { Console::Error("microVU1 Warning: Exiting from Possible Infinite Loop [%04x]", params PC); }
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void __fastcall mVUprintPC1(u32 PC) { Console::WriteLn("Block startPC [%04x]", params PC); }
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void __fastcall mVUprintPC2(u32 PC) { Console::WriteLn("Block endPC [%04x]\n", params PC); }
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void __fastcall mVUprintPC1(u32 PC) { Console::Write("Block PC [%04x] ", params PC); }
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void __fastcall mVUprintPC2(u32 PC) { Console::Write("[%04x]\n", params PC); }
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microVUt(void) mVUtestCycles() {
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microVU* mVU = mVUx;
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@ -250,11 +250,11 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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mVUinfo = 0;
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startLoop();
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incCycles(1);
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mVUopU<vuIndex, 0>();
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mVUopU<vuIndex>(0);
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if (curI & _Ebit_) { branch = 1; }
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if (curI & _MDTbit_) { branch = 4; }
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if (curI & _Ibit_) { mVUinfo |= _isNOP; }
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else { incPC(-1); mVUopL<vuIndex, 0>(); incPC(1); }
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else { incPC(-1); mVUopL<vuIndex>(0); incPC(1); }
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mVUsetCycles<vuIndex>();
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if (mVU->p) { mVUinfo |= _readP; }
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if (mVU->q) { mVUinfo |= _readQ; }
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@ -279,7 +279,7 @@ microVUt(void*) __fastcall mVUcompile(u32 startPC, uptr pState) {
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if (isEOB) { x = 0xffff; }
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if (isNOP) { incPC(1); doUpperOp(); doIbit(); }
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else if (!swapOps) { incPC(1); doUpperOp(); doLowerOp(); }
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else { mVUopL<vuIndex, 1>(); incPC(1); doUpperOp(); }
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else { mVUopL<vuIndex>(1); incPC(1); doUpperOp(); }
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if (doXGKICK) { mVU_XGKICK_DELAY<vuIndex>(); }
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if (!isBdelay) { incPC(1); }
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@ -206,7 +206,7 @@ microVUx(void) mVUflagPass(u32 startPC, u32 xCount) {
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incPC(1);
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if ( curI & _Ebit_ ) { branch = 1; }
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if ( curI & _MDTbit_ ) { branch = 4; }
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if (!(curI & _Ibit_) ) { incPC(-1); mVUopL<vuIndex, 3>(); incPC(1); }
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if (!(curI & _Ibit_) ) { incPC(-1); mVUopL<vuIndex>(3); incPC(1); }
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if (branch >= 2) { shortBranch(); break; }
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else if (branch == 1) { branch = 2; }
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if (mVUbranch) { branch = (mVUbranch >= 9) ? 5 : 3; aBranchAddr = branchAddr; mVUbranch = 0; }
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@ -42,7 +42,7 @@
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x86SetJ8(aJump); \
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}
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microVUf(void) mVU_DIV() {
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microVUf(void) mVU_DIV(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeFDIV<vuIndex>(_Fs_, _Fsf_, _Ft_, _Ftf_, 7); }
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pass2 {
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@ -79,7 +79,7 @@ microVUf(void) mVU_DIV() {
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pass3 { mVUlog("DIV Q, vf%02d%s, vf%02d%s", _Fs_, _Fsf_String, _Ft_, _Ftf_String); }
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}
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microVUf(void) mVU_SQRT() {
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microVUf(void) mVU_SQRT(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeFDIV<vuIndex>(0, 0, _Ft_, _Ftf_, 7); }
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pass2 {
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@ -98,7 +98,7 @@ microVUf(void) mVU_SQRT() {
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pass3 { mVUlog("SQRT Q, vf%02d%s", _Ft_, _Ftf_String); }
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}
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microVUf(void) mVU_RSQRT() {
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microVUf(void) mVU_RSQRT(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeFDIV<vuIndex>(_Fs_, _Fsf_, _Ft_, _Ftf_, 13); }
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pass2 {
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@ -169,7 +169,7 @@ microVUt(void) mVU_EATAN_() {
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SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, writeP ? 0x27 : 0xC6);
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}
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microVUf(void) mVU_EATAN() {
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microVUf(void) mVU_EATAN(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU1<vuIndex>(_Fs_, _Fsf_, 54); }
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pass2 {
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@ -186,7 +186,7 @@ microVUf(void) mVU_EATAN() {
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pass3 { mVUlog("EATAN P"); }
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}
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microVUf(void) mVU_EATANxy() {
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microVUf(void) mVU_EATANxy(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 54); }
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pass2 {
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@ -204,7 +204,7 @@ microVUf(void) mVU_EATANxy() {
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pass3 { mVUlog("EATANxy P"); }
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}
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microVUf(void) mVU_EATANxz() {
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microVUf(void) mVU_EATANxz(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 54); }
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pass2 {
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@ -229,7 +229,7 @@ microVUf(void) mVU_EATANxz() {
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SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFt); \
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}
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microVUf(void) mVU_EEXP() {
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microVUf(void) mVU_EEXP(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU1<vuIndex>(_Fs_, _Fsf_, 44); }
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pass2 {
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@ -278,7 +278,7 @@ microVUt(void) mVU_sumXYZ() {
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}
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}
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microVUf(void) mVU_ELENG() {
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microVUf(void) mVU_ELENG(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 18); }
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pass2 {
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@ -291,7 +291,7 @@ microVUf(void) mVU_ELENG() {
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pass3 { mVUlog("ELENG P"); }
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}
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microVUf(void) mVU_ERCPR() {
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microVUf(void) mVU_ERCPR(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU1<vuIndex>(_Fs_, _Fsf_, 12); }
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pass2 {
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@ -306,7 +306,7 @@ microVUf(void) mVU_ERCPR() {
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pass3 { mVUlog("ERCPR P"); }
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}
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microVUf(void) mVU_ERLENG() {
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microVUf(void) mVU_ERLENG(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 24); }
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pass2 {
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@ -322,7 +322,7 @@ microVUf(void) mVU_ERLENG() {
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pass3 { mVUlog("ERLENG P"); }
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}
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microVUf(void) mVU_ERSADD() {
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microVUf(void) mVU_ERSADD(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 18); }
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pass2 {
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@ -338,7 +338,7 @@ microVUf(void) mVU_ERSADD() {
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pass3 { mVUlog("ERSADD P"); }
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}
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microVUf(void) mVU_ERSQRT() {
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microVUf(void) mVU_ERSQRT(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU1<vuIndex>(_Fs_, _Fsf_, 18); }
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pass2 {
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@ -353,7 +353,7 @@ microVUf(void) mVU_ERSQRT() {
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pass3 { mVUlog("ERSQRT P"); }
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}
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microVUf(void) mVU_ESADD() {
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microVUf(void) mVU_ESADD(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 11); }
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pass2 {
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@ -372,7 +372,7 @@ microVUf(void) mVU_ESADD() {
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SSE_ADDSS_XMM_to_XMM(xmmPQ, xmmFs); \
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}
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microVUf(void) mVU_ESIN() {
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microVUf(void) mVU_ESIN(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 29); }
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pass2 {
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@ -399,7 +399,7 @@ microVUf(void) mVU_ESIN() {
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pass3 { mVUlog("ESIN P"); }
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}
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microVUf(void) mVU_ESQRT() {
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microVUf(void) mVU_ESQRT(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU1<vuIndex>(_Fs_, _Fsf_, 12); }
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pass2 {
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pass3 { mVUlog("ESQRT P"); }
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}
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microVUf(void) mVU_ESUM() {
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microVUf(void) mVU_ESUM(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeEFU2<vuIndex>(_Fs_, 12); }
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pass2 {
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@ -431,7 +431,7 @@ microVUf(void) mVU_ESUM() {
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// FCAND/FCEQ/FCGET/FCOR/FCSET
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//------------------------------------------------------------------
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microVUf(void) mVU_FCAND() {
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microVUf(void) mVU_FCAND(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeCflag<vuIndex>(1); }
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pass2 {
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@ -445,7 +445,7 @@ microVUf(void) mVU_FCAND() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 8); }
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}
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microVUf(void) mVU_FCEQ() {
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microVUf(void) mVU_FCEQ(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeCflag<vuIndex>(1); }
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pass2 {
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@ -459,7 +459,7 @@ microVUf(void) mVU_FCEQ() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 8); }
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}
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microVUf(void) mVU_FCGET() {
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microVUf(void) mVU_FCGET(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeCflag<vuIndex>(_It_); }
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pass2 {
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@ -471,7 +471,7 @@ microVUf(void) mVU_FCGET() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 8); }
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}
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microVUf(void) mVU_FCOR() {
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microVUf(void) mVU_FCOR(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeCflag<vuIndex>(1); }
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pass2 {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 8); }
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}
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microVUf(void) mVU_FCSET() {
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microVUf(void) mVU_FCSET(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUinfo |= _doClip; }
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pass2 {
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@ -499,7 +499,7 @@ microVUf(void) mVU_FCSET() {
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// FMAND/FMEQ/FMOR
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//------------------------------------------------------------------
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microVUf(void) mVU_FMAND() {
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microVUf(void) mVU_FMAND(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeMflag<vuIndex>(_Is_, _It_); }
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pass2 {
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@ -512,7 +512,7 @@ microVUf(void) mVU_FMAND() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 4); }
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}
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microVUf(void) mVU_FMEQ() {
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microVUf(void) mVU_FMEQ(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeMflag<vuIndex>(_Is_, _It_); }
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pass2 {
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@ -527,7 +527,7 @@ microVUf(void) mVU_FMEQ() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 4); }
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}
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microVUf(void) mVU_FMOR() {
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microVUf(void) mVU_FMOR(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeMflag<vuIndex>(_Is_, _It_); }
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pass2 {
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// FSAND/FSEQ/FSOR/FSSET
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//------------------------------------------------------------------
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microVUf(void) mVU_FSAND() {
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microVUf(void) mVU_FSAND(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeSflag<vuIndex>(_It_); }
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pass2 {
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@ -556,7 +556,7 @@ microVUf(void) mVU_FSAND() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 0); mVUsFlagHack = 0; }
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}
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microVUf(void) mVU_FSEQ() {
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microVUf(void) mVU_FSEQ(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeSflag<vuIndex>(_It_); }
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pass2 {
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@ -570,7 +570,7 @@ microVUf(void) mVU_FSEQ() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 0); mVUsFlagHack = 0; }
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}
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microVUf(void) mVU_FSOR() {
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microVUf(void) mVU_FSOR(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeSflag<vuIndex>(_It_); }
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pass2 {
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@ -582,7 +582,7 @@ microVUf(void) mVU_FSOR() {
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pass4 { mVUflagInfo |= 0xf << (/*mVUcount +*/ 0); mVUsFlagHack = 0; }
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}
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microVUf(void) mVU_FSSET() {
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microVUf(void) mVU_FSSET(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeFSSET<vuIndex>(); }
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pass2 {
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@ -600,7 +600,7 @@ microVUf(void) mVU_FSSET() {
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// IADD/IADDI/IADDIU/IAND/IOR/ISUB/ISUBIU
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//------------------------------------------------------------------
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microVUf(void) mVU_IADD() {
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microVUf(void) mVU_IADD(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeIALU1<vuIndex>(_Id_, _Is_, _It_); }
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pass2 {
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@ -615,7 +615,7 @@ microVUf(void) mVU_IADD() {
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pass3 { mVUlog("IADD vi%02d, vi%02d, vi%02d", _Fd_, _Fs_, _Ft_); }
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}
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microVUf(void) mVU_IADDI() {
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microVUf(void) mVU_IADDI(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeIALU2<vuIndex>(_Is_, _It_); }
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pass2 {
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@ -626,7 +626,7 @@ microVUf(void) mVU_IADDI() {
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pass3 { mVUlog("IADDI vi%02d, vi%02d, %d", _Ft_, _Fs_, _Imm5_); }
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}
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microVUf(void) mVU_IADDIU() {
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microVUf(void) mVU_IADDIU(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeIALU2<vuIndex>(_Is_, _It_); }
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pass2 {
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@ -637,7 +637,7 @@ microVUf(void) mVU_IADDIU() {
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pass3 { mVUlog("IADDIU vi%02d, vi%02d, %d", _Ft_, _Fs_, _Imm15_); }
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}
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microVUf(void) mVU_IAND() {
|
||||
microVUf(void) mVU_IAND(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeIALU1<vuIndex>(_Id_, _Is_, _It_); }
|
||||
pass2 {
|
||||
|
@ -651,7 +651,7 @@ microVUf(void) mVU_IAND() {
|
|||
pass3 { mVUlog("IAND vi%02d, vi%02d, vi%02d", _Fd_, _Fs_, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IOR() {
|
||||
microVUf(void) mVU_IOR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeIALU1<vuIndex>(_Id_, _Is_, _It_); }
|
||||
pass2 {
|
||||
|
@ -665,7 +665,7 @@ microVUf(void) mVU_IOR() {
|
|||
pass3 { mVUlog("IOR vi%02d, vi%02d, vi%02d", _Fd_, _Fs_, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISUB() {
|
||||
microVUf(void) mVU_ISUB(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeIALU1<vuIndex>(_Id_, _Is_, _It_); }
|
||||
pass2 {
|
||||
|
@ -684,7 +684,7 @@ microVUf(void) mVU_ISUB() {
|
|||
pass3 { mVUlog("ISUB vi%02d, vi%02d, vi%02d", _Fd_, _Fs_, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISUBIU() {
|
||||
microVUf(void) mVU_ISUBIU(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeIALU2<vuIndex>(_Is_, _It_); }
|
||||
pass2 {
|
||||
|
@ -699,7 +699,7 @@ microVUf(void) mVU_ISUBIU() {
|
|||
// MFIR/MFP/MOVE/MR32/MTIR
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_MFIR() {
|
||||
microVUf(void) mVU_MFIR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { if (!_Ft_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Is_); analyzeReg2(_Ft_, 1); }
|
||||
pass2 {
|
||||
|
@ -712,7 +712,7 @@ microVUf(void) mVU_MFIR() {
|
|||
pass3 { mVUlog("MFIR.%s vf%02d, vi%02d", _XYZW_String, _Ft_, _Fs_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MFP() {
|
||||
microVUf(void) mVU_MFP(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeMFP<vuIndex>(_Ft_); }
|
||||
pass2 {
|
||||
|
@ -722,7 +722,7 @@ microVUf(void) mVU_MFP() {
|
|||
pass3 { mVUlog("MFP.%s vf%02d, P", _XYZW_String, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MOVE() {
|
||||
microVUf(void) mVU_MOVE(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeMOVE<vuIndex>(_Fs_, _Ft_); }
|
||||
pass2 {
|
||||
|
@ -732,7 +732,7 @@ microVUf(void) mVU_MOVE() {
|
|||
pass3 { mVUlog("MOVE.%s vf%02d, vf%02d", _XYZW_String, _Ft_, _Fs_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MR32() {
|
||||
microVUf(void) mVU_MR32(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeMR32<vuIndex>(_Fs_, _Ft_); }
|
||||
pass2 {
|
||||
|
@ -743,7 +743,7 @@ microVUf(void) mVU_MR32() {
|
|||
pass3 { mVUlog("MR32.%s vf%02d, vf%02d", _XYZW_String, _Ft_, _Fs_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_MTIR() {
|
||||
microVUf(void) mVU_MTIR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { if (!_It_) { mVUinfo |= _isNOP; } analyzeReg5(_Fs_, _Fsf_); analyzeVIreg2(_It_, 1); }
|
||||
pass2 {
|
||||
|
@ -757,7 +757,7 @@ microVUf(void) mVU_MTIR() {
|
|||
// ILW/ILWR
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_ILW() {
|
||||
microVUf(void) mVU_ILW(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { if (!_It_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Is_); analyzeVIreg2(_It_, 4); }
|
||||
pass2 {
|
||||
|
@ -776,7 +776,7 @@ microVUf(void) mVU_ILW() {
|
|||
pass3 { mVUlog("ILW.%s vi%02d, vi%02d + %d", _XYZW_String, _Ft_, _Fs_, _Imm11_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ILWR() {
|
||||
microVUf(void) mVU_ILWR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { if (!_It_) { mVUinfo |= _isNOP; } analyzeVIreg1(_Is_); analyzeVIreg2(_It_, 4); }
|
||||
pass2 {
|
||||
|
@ -798,7 +798,7 @@ microVUf(void) mVU_ILWR() {
|
|||
// ISW/ISWR
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_ISW() {
|
||||
microVUf(void) mVU_ISW(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { analyzeVIreg1(_Is_); analyzeVIreg1(_It_); }
|
||||
pass2 {
|
||||
|
@ -824,7 +824,7 @@ microVUf(void) mVU_ISW() {
|
|||
pass3 { mVUlog("ISW.%s vi%02d, vi%02d + %d", _XYZW_String, _Ft_, _Fs_, _Imm11_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_ISWR() {
|
||||
microVUf(void) mVU_ISWR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { analyzeVIreg1(_Is_); analyzeVIreg1(_It_); }
|
||||
pass2 {
|
||||
|
@ -852,7 +852,7 @@ microVUf(void) mVU_ISWR() {
|
|||
// LQ/LQD/LQI
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_LQ() {
|
||||
microVUf(void) mVU_LQ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeLQ<vuIndex>(_Ft_, _Is_, 0); }
|
||||
pass2 {
|
||||
|
@ -871,7 +871,7 @@ microVUf(void) mVU_LQ() {
|
|||
pass3 { mVUlog("LQ.%s vf%02d, vi%02d + %d", _XYZW_String, _Ft_, _Fs_, _Imm11_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_LQD() {
|
||||
microVUf(void) mVU_LQD(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeLQ<vuIndex>(_Ft_, _Is_, 1); }
|
||||
pass2 {
|
||||
|
@ -893,7 +893,7 @@ microVUf(void) mVU_LQD() {
|
|||
pass3 { mVUlog("LQD.%s vf%02d, --vi%02d", _XYZW_String, _Ft_, _Is_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_LQI() {
|
||||
microVUf(void) mVU_LQI(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeLQ<vuIndex>(_Ft_, _Is_, 1); }
|
||||
pass2 {
|
||||
|
@ -920,7 +920,7 @@ microVUf(void) mVU_LQI() {
|
|||
// SQ/SQD/SQI
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_SQ() {
|
||||
microVUf(void) mVU_SQ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeSQ<vuIndex>(_Fs_, _It_, 0); }
|
||||
pass2 {
|
||||
|
@ -939,7 +939,7 @@ microVUf(void) mVU_SQ() {
|
|||
pass3 { mVUlog("SQ.%s vf%02d, vi%02d + %d", _XYZW_String, _Fs_, _Ft_, _Imm11_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_SQD() {
|
||||
microVUf(void) mVU_SQD(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeSQ<vuIndex>(_Fs_, _It_, 1); }
|
||||
pass2 {
|
||||
|
@ -959,7 +959,7 @@ microVUf(void) mVU_SQD() {
|
|||
pass3 { mVUlog("SQD.%s vf%02d, --vi%02d", _XYZW_String, _Fs_, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_SQI() {
|
||||
microVUf(void) mVU_SQI(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeSQ<vuIndex>(_Fs_, _It_, 1); }
|
||||
pass2 {
|
||||
|
@ -984,7 +984,7 @@ microVUf(void) mVU_SQI() {
|
|||
// RINIT/RGET/RNEXT/RXOR
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_RINIT() {
|
||||
microVUf(void) mVU_RINIT(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeR1<vuIndex>(_Fs_, _Fsf_); }
|
||||
pass2 {
|
||||
|
@ -1009,14 +1009,14 @@ microVUt(void) mVU_RGET_(int Rreg) {
|
|||
}
|
||||
}
|
||||
|
||||
microVUf(void) mVU_RGET() {
|
||||
microVUf(void) mVU_RGET(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeR2<vuIndex>(_Ft_, 1); }
|
||||
pass2 { MOV32MtoR(gprT1, Rmem); mVU_RGET_<vuIndex>(gprT1); }
|
||||
pass3 { mVUlog("RGET.%s vf%02d, R", _XYZW_String, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_RNEXT() {
|
||||
microVUf(void) mVU_RNEXT(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeR2<vuIndex>(_Ft_, 0); }
|
||||
pass2 {
|
||||
|
@ -1041,7 +1041,7 @@ microVUf(void) mVU_RNEXT() {
|
|||
pass3 { mVUlog("RNEXT.%s vf%02d, R", _XYZW_String, _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_RXOR() {
|
||||
microVUf(void) mVU_RXOR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeR1<vuIndex>(_Fs_, _Fsf_); }
|
||||
pass2 {
|
||||
|
@ -1058,13 +1058,13 @@ microVUf(void) mVU_RXOR() {
|
|||
// WaitP/WaitQ
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_WAITP() {
|
||||
microVUf(void) mVU_WAITP(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUstall = aMax(mVUstall, ((mVUregs.p) ? (mVUregs.p - 1) : 0)); }
|
||||
pass3 { mVUlog("WAITP"); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_WAITQ() {
|
||||
microVUf(void) mVU_WAITQ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUstall = aMax(mVUstall, mVUregs.q); }
|
||||
pass3 { mVUlog("WAITQ"); }
|
||||
|
@ -1074,7 +1074,7 @@ microVUf(void) mVU_WAITQ() {
|
|||
// XTOP/XITOP
|
||||
//------------------------------------------------------------------
|
||||
|
||||
microVUf(void) mVU_XTOP() {
|
||||
microVUf(void) mVU_XTOP(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { if (!_It_) { mVUinfo |= _isNOP; } analyzeVIreg2(_It_, 1); }
|
||||
pass2 {
|
||||
|
@ -1084,7 +1084,7 @@ microVUf(void) mVU_XTOP() {
|
|||
pass3 { mVUlog("XTOP vi%02d", _Ft_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_XITOP() {
|
||||
microVUf(void) mVU_XITOP(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { if (!_It_) { mVUinfo |= _isNOP; } analyzeVIreg2(_It_, 1); }
|
||||
pass2 {
|
||||
|
@ -1111,7 +1111,7 @@ void __fastcall mVU_XGKICK__(u32 addr) {
|
|||
GSGIFTRANSFER1((u32*)microVU1.regs->Mem, ((addr<<4)&0x3fff));
|
||||
}
|
||||
|
||||
microVUf(void) mVU_XGKICK() {
|
||||
microVUf(void) mVU_XGKICK(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeXGkick<vuIndex>(_Is_, mVU_XGKICK_CYCLES); }
|
||||
pass2 {
|
||||
|
@ -1142,13 +1142,13 @@ microVUt(void) mVU_XGKICK_DELAY() {
|
|||
pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } \
|
||||
}
|
||||
|
||||
microVUf(void) mVU_B() {
|
||||
microVUf(void) mVU_B(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(1, 0);
|
||||
pass3 { mVUlog("B [<a href=\"#addr%04x\">%04x</a>]", branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_BAL() {
|
||||
microVUf(void) mVU_BAL(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(2, _It_);
|
||||
pass1 { analyzeVIreg2(_It_, 1); }
|
||||
|
@ -1159,7 +1159,7 @@ microVUf(void) mVU_BAL() {
|
|||
pass3 { mVUlog("BAL vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Ft_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IBEQ() {
|
||||
microVUf(void) mVU_IBEQ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(3, 0);
|
||||
pass1 { mVUanalyzeBranch2<vuIndex>(_Is_, _It_); }
|
||||
|
@ -1173,7 +1173,7 @@ microVUf(void) mVU_IBEQ() {
|
|||
pass3 { mVUlog("IBEQ vi%02d, vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Ft_, _Fs_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IBGEZ() {
|
||||
microVUf(void) mVU_IBGEZ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(4, 0);
|
||||
pass1 { mVUanalyzeBranch1<vuIndex>(_Is_); }
|
||||
|
@ -1185,7 +1185,7 @@ microVUf(void) mVU_IBGEZ() {
|
|||
pass3 { mVUlog("IBGEZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IBGTZ() {
|
||||
microVUf(void) mVU_IBGTZ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(5, 0);
|
||||
pass1 { mVUanalyzeBranch1<vuIndex>(_Is_); }
|
||||
|
@ -1197,7 +1197,7 @@ microVUf(void) mVU_IBGTZ() {
|
|||
pass3 { mVUlog("IBGTZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IBLEZ() {
|
||||
microVUf(void) mVU_IBLEZ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(6, 0);
|
||||
pass1 { mVUanalyzeBranch1<vuIndex>(_Is_); }
|
||||
|
@ -1209,7 +1209,7 @@ microVUf(void) mVU_IBLEZ() {
|
|||
pass3 { mVUlog("IBLEZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IBLTZ() {
|
||||
microVUf(void) mVU_IBLTZ(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(7, 0);
|
||||
pass1 { mVUanalyzeBranch1<vuIndex>(_Is_); }
|
||||
|
@ -1221,7 +1221,7 @@ microVUf(void) mVU_IBLTZ() {
|
|||
pass3 { mVUlog("IBLTZ vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Fs_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_IBNE() {
|
||||
microVUf(void) mVU_IBNE(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
setBranchA(8, 0);
|
||||
pass1 { mVUanalyzeBranch2<vuIndex>(_Is_, _It_); }
|
||||
|
@ -1235,7 +1235,7 @@ microVUf(void) mVU_IBNE() {
|
|||
pass3 { mVUlog("IBNE vi%02d, vi%02d [<a href=\"#addr%04x\">%04x</a>]", _Ft_, _Fs_, branchAddr, branchAddr); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_JR() {
|
||||
microVUf(void) mVU_JR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
mVUbranch = 9;
|
||||
pass1 { analyzeVIreg1(_Is_); }
|
||||
|
@ -1248,7 +1248,7 @@ microVUf(void) mVU_JR() {
|
|||
pass3 { mVUlog("JR [vi%02d]", _Fs_); }
|
||||
}
|
||||
|
||||
microVUf(void) mVU_JALR() {
|
||||
microVUf(void) mVU_JALR(mF) {
|
||||
microVU* mVU = mVUx;
|
||||
mVUbranch = 10;
|
||||
pass1 { analyzeVIreg1(_Is_); analyzeVIreg2(_It_, 1); }
|
||||
|
|
|
@ -140,8 +140,11 @@ declareAllVariables
|
|||
#define mVUx (vuIndex ? µVU1 : µVU0)
|
||||
#define microVUt(aType) template<int vuIndex> __forceinline aType
|
||||
#define microVUx(aType) template<int vuIndex> aType
|
||||
#define microVUf(aType) template<int vuIndex, int recPass> aType
|
||||
#define microVUq(aType) template<int vuIndex, int recPass> __forceinline aType
|
||||
#define microVUf(aType) template<int vuIndex> aType
|
||||
#define microVUq(aType) template<int vuIndex> __forceinline aType
|
||||
|
||||
// Function Params
|
||||
#define mF int recPass
|
||||
|
||||
// Define Passes
|
||||
#define pass1 if (recPass == 0)
|
||||
|
|
|
@ -306,7 +306,7 @@ microVUt(void) mVUcheckSflag(int progIndex) {
|
|||
mVUsFlagHack = 1;
|
||||
for (u32 i = 0; i < mVU->progSize; i+=2) {
|
||||
mVU->code = mVU->prog.prog[progIndex].data[i];
|
||||
mVUopL<vuIndex, 3>();
|
||||
mVUopL<vuIndex>(3);
|
||||
}
|
||||
mVUflagInfo = bFlagInfo;
|
||||
mVU->code = bCode;
|
||||
|
|
|
@ -23,180 +23,180 @@
|
|||
//------------------------------------------------------------------
|
||||
#define mVUgetCode (vuIndex ? microVU1.code : microVU0.code)
|
||||
|
||||
microVUf(void) mVU_UPPER_FD_00();
|
||||
microVUf(void) mVU_UPPER_FD_01();
|
||||
microVUf(void) mVU_UPPER_FD_10();
|
||||
microVUf(void) mVU_UPPER_FD_11();
|
||||
microVUf(void) mVULowerOP();
|
||||
microVUf(void) mVULowerOP_T3_00();
|
||||
microVUf(void) mVULowerOP_T3_01();
|
||||
microVUf(void) mVULowerOP_T3_10();
|
||||
microVUf(void) mVULowerOP_T3_11();
|
||||
microVUf(void) mVUunknown();
|
||||
microVUf(void) mVU_UPPER_FD_00(mF);
|
||||
microVUf(void) mVU_UPPER_FD_01(mF);
|
||||
microVUf(void) mVU_UPPER_FD_10(mF);
|
||||
microVUf(void) mVU_UPPER_FD_11(mF);
|
||||
microVUf(void) mVULowerOP(mF);
|
||||
microVUf(void) mVULowerOP_T3_00(mF);
|
||||
microVUf(void) mVULowerOP_T3_01(mF);
|
||||
microVUf(void) mVULowerOP_T3_10(mF);
|
||||
microVUf(void) mVULowerOP_T3_11(mF);
|
||||
microVUf(void) mVUunknown(mF);
|
||||
//------------------------------------------------------------------
|
||||
|
||||
//------------------------------------------------------------------
|
||||
// Opcode Tables
|
||||
//------------------------------------------------------------------
|
||||
#define microVU_LOWER_OPCODE(x, y) void (* mVULOWER_OPCODE##x##y [128])() = { \
|
||||
mVU_LQ<x,y> , mVU_SQ<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_ILW<x,y> , mVU_ISW<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_IADDIU<x,y> , mVU_ISUBIU<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_FCEQ<x,y> , mVU_FCSET<x,y> , mVU_FCAND<x,y> , mVU_FCOR<x,y>, /* 0x10 */ \
|
||||
mVU_FSEQ<x,y> , mVU_FSSET<x,y> , mVU_FSAND<x,y> , mVU_FSOR<x,y>, \
|
||||
mVU_FMEQ<x,y> , mVUunknown<x,y> , mVU_FMAND<x,y> , mVU_FMOR<x,y>, \
|
||||
mVU_FCGET<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_B<x,y> , mVU_BAL<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x20 */ \
|
||||
mVU_JR<x,y> , mVU_JALR<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_IBEQ<x,y> , mVU_IBNE<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_IBLTZ<x,y> , mVU_IBGTZ<x,y> , mVU_IBLEZ<x,y> , mVU_IBGEZ<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x30 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVULowerOP<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x40*/ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x50 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x60 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x70 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
#define microVU_LOWER_OPCODE(x) void (*mVULOWER_OPCODE##x [128])(mF) = { \
|
||||
mVU_LQ<x> , mVU_SQ<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_ILW<x> , mVU_ISW<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_IADDIU<x> , mVU_ISUBIU<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_FCEQ<x> , mVU_FCSET<x> , mVU_FCAND<x> , mVU_FCOR<x>, /* 0x10 */ \
|
||||
mVU_FSEQ<x> , mVU_FSSET<x> , mVU_FSAND<x> , mVU_FSOR<x>, \
|
||||
mVU_FMEQ<x> , mVUunknown<x> , mVU_FMAND<x> , mVU_FMOR<x>, \
|
||||
mVU_FCGET<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_B<x> , mVU_BAL<x> , mVUunknown<x> , mVUunknown<x>, /* 0x20 */ \
|
||||
mVU_JR<x> , mVU_JALR<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_IBEQ<x> , mVU_IBNE<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_IBLTZ<x> , mVU_IBGTZ<x> , mVU_IBLEZ<x> , mVU_IBGEZ<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x30 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVULowerOP<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x40*/ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x50 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x60 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x70 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
};
|
||||
|
||||
#define microVU_LowerOP_T3_00_OPCODE(x, y) void (* mVULowerOP_T3_00_OPCODE##x##y [32])() = { \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_MOVE<x,y> , mVU_LQI<x,y> , mVU_DIV<x,y> , mVU_MTIR<x,y>, \
|
||||
mVU_RNEXT<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x10 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVU_MFP<x,y> , mVU_XTOP<x,y> , mVU_XGKICK<x,y>, \
|
||||
mVU_ESADD<x,y> , mVU_EATANxy<x,y> , mVU_ESQRT<x,y> , mVU_ESIN<x,y>, \
|
||||
#define microVU_LowerOP_T3_00_OPCODE(x) void (*mVULowerOP_T3_00_OPCODE##x [32])(mF) = { \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_MOVE<x> , mVU_LQI<x> , mVU_DIV<x> , mVU_MTIR<x>, \
|
||||
mVU_RNEXT<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x10 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVU_MFP<x> , mVU_XTOP<x> , mVU_XGKICK<x>, \
|
||||
mVU_ESADD<x> , mVU_EATANxy<x>, mVU_ESQRT<x> , mVU_ESIN<x>, \
|
||||
};
|
||||
|
||||
#define microVU_LowerOP_T3_01_OPCODE(x, y) void (* mVULowerOP_T3_01_OPCODE##x##y [32])() = { \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_MR32<x,y> , mVU_SQI<x,y> , mVU_SQRT<x,y> , mVU_MFIR<x,y>, \
|
||||
mVU_RGET<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x10 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVU_XITOP<x,y> , mVUunknown<x,y>, \
|
||||
mVU_ERSADD<x,y> , mVU_EATANxz<x,y> , mVU_ERSQRT<x,y> , mVU_EATAN<x,y>, \
|
||||
#define microVU_LowerOP_T3_01_OPCODE(x) void (*mVULowerOP_T3_01_OPCODE##x [32])(mF) = { \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_MR32<x> , mVU_SQI<x> , mVU_SQRT<x> , mVU_MFIR<x>, \
|
||||
mVU_RGET<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x10 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVU_XITOP<x> , mVUunknown<x>, \
|
||||
mVU_ERSADD<x> , mVU_EATANxz<x>, mVU_ERSQRT<x> , mVU_EATAN<x>, \
|
||||
};
|
||||
|
||||
#define microVU_LowerOP_T3_10_OPCODE(x, y) void (* mVULowerOP_T3_10_OPCODE##x##y [32])() = { \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVU_LQD<x,y> , mVU_RSQRT<x,y> , mVU_ILWR<x,y>, \
|
||||
mVU_RINIT<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x10 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_ELENG<x,y> , mVU_ESUM<x,y> , mVU_ERCPR<x,y> , mVU_EEXP<x,y>, \
|
||||
#define microVU_LowerOP_T3_10_OPCODE(x) void (*mVULowerOP_T3_10_OPCODE##x [32])(mF) = { \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVU_LQD<x> , mVU_RSQRT<x> , mVU_ILWR<x>, \
|
||||
mVU_RINIT<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x10 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_ELENG<x> , mVU_ESUM<x> , mVU_ERCPR<x> , mVU_EEXP<x>, \
|
||||
};
|
||||
|
||||
#define microVU_LowerOP_T3_11_OPCODE(x, y) void (* mVULowerOP_T3_11_OPCODE##x##y [32])() = { \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVU_SQD<x,y> , mVU_WAITQ<x,y> , mVU_ISWR<x,y>, \
|
||||
mVU_RXOR<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x10 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_ERLENG<x,y> , mVUunknown<x,y> , mVU_WAITP<x,y> , mVUunknown<x,y>, \
|
||||
#define microVU_LowerOP_T3_11_OPCODE(x) void (*mVULowerOP_T3_11_OPCODE##x [32])(mF) = { \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVU_SQD<x> , mVU_WAITQ<x> , mVU_ISWR<x>, \
|
||||
mVU_RXOR<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x10 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_ERLENG<x> , mVUunknown<x> , mVU_WAITP<x> , mVUunknown<x>, \
|
||||
};
|
||||
|
||||
#define microVU_LowerOP_OPCODE(x, y) void (* mVULowerOP_OPCODE##x##y [64])() = { \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x10 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x20 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_IADD<x,y> , mVU_ISUB<x,y> , mVU_IADDI<x,y> , mVUunknown<x,y>, /* 0x30 */ \
|
||||
mVU_IAND<x,y> , mVU_IOR<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVULowerOP_T3_00<x,y>, mVULowerOP_T3_01<x,y>, mVULowerOP_T3_10<x,y>, mVULowerOP_T3_11<x,y>, \
|
||||
#define microVU_LowerOP_OPCODE(x) void (*mVULowerOP_OPCODE##x [64])(mF) = { \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x10 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x20 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_IADD<x> , mVU_ISUB<x> , mVU_IADDI<x> , mVUunknown<x>, /* 0x30 */ \
|
||||
mVU_IAND<x> , mVU_IOR<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVULowerOP_T3_00<x>, mVULowerOP_T3_01<x>, mVULowerOP_T3_10<x>, mVULowerOP_T3_11<x>, \
|
||||
};
|
||||
|
||||
#define microVU_UPPER_OPCODE(x, y) void (* mVU_UPPER_OPCODE##x##y [64])() = { \
|
||||
mVU_ADDx<x,y> , mVU_ADDy<x,y> , mVU_ADDz<x,y> , mVU_ADDw<x,y>, \
|
||||
mVU_SUBx<x,y> , mVU_SUBy<x,y> , mVU_SUBz<x,y> , mVU_SUBw<x,y>, \
|
||||
mVU_MADDx<x,y> , mVU_MADDy<x,y> , mVU_MADDz<x,y> , mVU_MADDw<x,y>, \
|
||||
mVU_MSUBx<x,y> , mVU_MSUBy<x,y> , mVU_MSUBz<x,y> , mVU_MSUBw<x,y>, \
|
||||
mVU_MAXx<x,y> , mVU_MAXy<x,y> , mVU_MAXz<x,y> , mVU_MAXw<x,y>, /* 0x10 */ \
|
||||
mVU_MINIx<x,y> , mVU_MINIy<x,y> , mVU_MINIz<x,y> , mVU_MINIw<x,y>, \
|
||||
mVU_MULx<x,y> , mVU_MULy<x,y> , mVU_MULz<x,y> , mVU_MULw<x,y>, \
|
||||
mVU_MULq<x,y> , mVU_MAXi<x,y> , mVU_MULi<x,y> , mVU_MINIi<x,y>, \
|
||||
mVU_ADDq<x,y> , mVU_MADDq<x,y> , mVU_ADDi<x,y> , mVU_MADDi<x,y>, /* 0x20 */ \
|
||||
mVU_SUBq<x,y> , mVU_MSUBq<x,y> , mVU_SUBi<x,y> , mVU_MSUBi<x,y>, \
|
||||
mVU_ADD<x,y> , mVU_MADD<x,y> , mVU_MUL<x,y> , mVU_MAX<x,y>, \
|
||||
mVU_SUB<x,y> , mVU_MSUB<x,y> , mVU_OPMSUB<x,y> , mVU_MINI<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, /* 0x30 */ \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVU_UPPER_FD_00<x,y>, mVU_UPPER_FD_01<x,y>, mVU_UPPER_FD_10<x,y>, mVU_UPPER_FD_11<x,y>, \
|
||||
#define microVU_UPPER_OPCODE(x) void (*mVU_UPPER_OPCODE##x [64])(mF) = { \
|
||||
mVU_ADDx<x> , mVU_ADDy<x> , mVU_ADDz<x> , mVU_ADDw<x>, \
|
||||
mVU_SUBx<x> , mVU_SUBy<x> , mVU_SUBz<x> , mVU_SUBw<x>, \
|
||||
mVU_MADDx<x> , mVU_MADDy<x> , mVU_MADDz<x> , mVU_MADDw<x>, \
|
||||
mVU_MSUBx<x> , mVU_MSUBy<x> , mVU_MSUBz<x> , mVU_MSUBw<x>, \
|
||||
mVU_MAXx<x> , mVU_MAXy<x> , mVU_MAXz<x> , mVU_MAXw<x>, /* 0x10 */ \
|
||||
mVU_MINIx<x> , mVU_MINIy<x> , mVU_MINIz<x> , mVU_MINIw<x>, \
|
||||
mVU_MULx<x> , mVU_MULy<x> , mVU_MULz<x> , mVU_MULw<x>, \
|
||||
mVU_MULq<x> , mVU_MAXi<x> , mVU_MULi<x> , mVU_MINIi<x>, \
|
||||
mVU_ADDq<x> , mVU_MADDq<x> , mVU_ADDi<x> , mVU_MADDi<x>, /* 0x20 */ \
|
||||
mVU_SUBq<x> , mVU_MSUBq<x> , mVU_SUBi<x> , mVU_MSUBi<x>, \
|
||||
mVU_ADD<x> , mVU_MADD<x> , mVU_MUL<x> , mVU_MAX<x>, \
|
||||
mVU_SUB<x> , mVU_MSUB<x> , mVU_OPMSUB<x> , mVU_MINI<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, /* 0x30 */ \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVU_UPPER_FD_00<x>, mVU_UPPER_FD_01<x>, mVU_UPPER_FD_10<x>, mVU_UPPER_FD_11<x>, \
|
||||
};
|
||||
|
||||
#define microVU_UPPER_FD_00_TABLE(x, y) void (* mVU_UPPER_FD_00_TABLE##x##y [32])() = { \
|
||||
mVU_ADDAx<x,y> , mVU_SUBAx<x,y> , mVU_MADDAx<x,y> , mVU_MSUBAx<x,y>, \
|
||||
mVU_ITOF0<x,y> , mVU_FTOI0<x,y> , mVU_MULAx<x,y> , mVU_MULAq<x,y>, \
|
||||
mVU_ADDAq<x,y> , mVU_SUBAq<x,y> , mVU_ADDA<x,y> , mVU_SUBA<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
#define microVU_UPPER_FD_00_TABLE(x) void (*mVU_UPPER_FD_00_TABLE##x [32])(mF) = { \
|
||||
mVU_ADDAx<x> , mVU_SUBAx<x> , mVU_MADDAx<x> , mVU_MSUBAx<x>, \
|
||||
mVU_ITOF0<x> , mVU_FTOI0<x> , mVU_MULAx<x> , mVU_MULAq<x>, \
|
||||
mVU_ADDAq<x> , mVU_SUBAq<x> , mVU_ADDA<x> , mVU_SUBA<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
};
|
||||
|
||||
#define microVU_UPPER_FD_01_TABLE(x, y) void (* mVU_UPPER_FD_01_TABLE##x##y [32])() = { \
|
||||
mVU_ADDAy<x,y> , mVU_SUBAy<x,y> , mVU_MADDAy<x,y> , mVU_MSUBAy<x,y>, \
|
||||
mVU_ITOF4<x,y> , mVU_FTOI4<x,y> , mVU_MULAy<x,y> , mVU_ABS<x,y>, \
|
||||
mVU_MADDAq<x,y> , mVU_MSUBAq<x,y> , mVU_MADDA<x,y> , mVU_MSUBA<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
#define microVU_UPPER_FD_01_TABLE(x) void (* mVU_UPPER_FD_01_TABLE##x [32])(mF) = { \
|
||||
mVU_ADDAy<x> , mVU_SUBAy<x> , mVU_MADDAy<x> , mVU_MSUBAy<x>, \
|
||||
mVU_ITOF4<x> , mVU_FTOI4<x> , mVU_MULAy<x> , mVU_ABS<x>, \
|
||||
mVU_MADDAq<x> , mVU_MSUBAq<x> , mVU_MADDA<x> , mVU_MSUBA<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
};
|
||||
|
||||
#define microVU_UPPER_FD_10_TABLE(x, y) void (* mVU_UPPER_FD_10_TABLE##x##y [32])() = { \
|
||||
mVU_ADDAz<x,y> , mVU_SUBAz<x,y> , mVU_MADDAz<x,y> , mVU_MSUBAz<x,y>, \
|
||||
mVU_ITOF12<x,y> , mVU_FTOI12<x,y> , mVU_MULAz<x,y> , mVU_MULAi<x,y>, \
|
||||
mVU_ADDAi<x,y> , mVU_SUBAi<x,y> , mVU_MULA<x,y> , mVU_OPMULA<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
#define microVU_UPPER_FD_10_TABLE(x) void (* mVU_UPPER_FD_10_TABLE##x [32])(mF) = { \
|
||||
mVU_ADDAz<x> , mVU_SUBAz<x> , mVU_MADDAz<x> , mVU_MSUBAz<x>, \
|
||||
mVU_ITOF12<x> , mVU_FTOI12<x> , mVU_MULAz<x> , mVU_MULAi<x>, \
|
||||
mVU_ADDAi<x> , mVU_SUBAi<x> , mVU_MULA<x> , mVU_OPMULA<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
};
|
||||
|
||||
#define microVU_UPPER_FD_11_TABLE(x, y) void (* mVU_UPPER_FD_11_TABLE##x##y [32])() = { \
|
||||
mVU_ADDAw<x,y> , mVU_SUBAw<x,y> , mVU_MADDAw<x,y> , mVU_MSUBAw<x,y>, \
|
||||
mVU_ITOF15<x,y> , mVU_FTOI15<x,y> , mVU_MULAw<x,y> , mVU_CLIP<x,y>, \
|
||||
mVU_MADDAi<x,y> , mVU_MSUBAi<x,y> , mVUunknown<x,y> , mVU_NOP<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y> , mVUunknown<x,y>, \
|
||||
#define microVU_UPPER_FD_11_TABLE(x) void (* mVU_UPPER_FD_11_TABLE##x [32])(mF) = { \
|
||||
mVU_ADDAw<x> , mVU_SUBAw<x> , mVU_MADDAw<x> , mVU_MSUBAw<x>, \
|
||||
mVU_ITOF15<x> , mVU_FTOI15<x> , mVU_MULAw<x> , mVU_CLIP<x>, \
|
||||
mVU_MADDAi<x> , mVU_MSUBAi<x> , mVUunknown<x> , mVU_NOP<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
mVUunknown<x> , mVUunknown<x> , mVUunknown<x> , mVUunknown<x>, \
|
||||
};
|
||||
|
||||
//------------------------------------------------------------------
|
||||
|
@ -204,62 +204,42 @@ microVUf(void) mVUunknown();
|
|||
//------------------------------------------------------------------
|
||||
// Create Table Instances
|
||||
//------------------------------------------------------------------
|
||||
#define mVUcreateTable(x,y) \
|
||||
microVU_LOWER_OPCODE(x,y) \
|
||||
microVU_LowerOP_T3_00_OPCODE(x,y) \
|
||||
microVU_LowerOP_T3_01_OPCODE(x,y) \
|
||||
microVU_LowerOP_T3_10_OPCODE(x,y) \
|
||||
microVU_LowerOP_T3_11_OPCODE(x,y) \
|
||||
microVU_LowerOP_OPCODE(x,y) \
|
||||
microVU_UPPER_OPCODE(x,y) \
|
||||
microVU_UPPER_FD_00_TABLE(x,y) \
|
||||
microVU_UPPER_FD_01_TABLE(x,y) \
|
||||
microVU_UPPER_FD_10_TABLE(x,y) \
|
||||
microVU_UPPER_FD_11_TABLE(x,y)
|
||||
#define mVUcreateTable(x) \
|
||||
microVU_LOWER_OPCODE(x) \
|
||||
microVU_LowerOP_T3_00_OPCODE(x) \
|
||||
microVU_LowerOP_T3_01_OPCODE(x) \
|
||||
microVU_LowerOP_T3_10_OPCODE(x) \
|
||||
microVU_LowerOP_T3_11_OPCODE(x) \
|
||||
microVU_LowerOP_OPCODE(x) \
|
||||
microVU_UPPER_OPCODE(x) \
|
||||
microVU_UPPER_FD_00_TABLE(x) \
|
||||
microVU_UPPER_FD_01_TABLE(x) \
|
||||
microVU_UPPER_FD_10_TABLE(x) \
|
||||
microVU_UPPER_FD_11_TABLE(x)
|
||||
|
||||
mVUcreateTable(0,0)
|
||||
mVUcreateTable(0,1)
|
||||
mVUcreateTable(0,2)
|
||||
mVUcreateTable(0,3)
|
||||
mVUcreateTable(1,0)
|
||||
mVUcreateTable(1,1)
|
||||
mVUcreateTable(1,2)
|
||||
mVUcreateTable(1,3)
|
||||
mVUcreateTable(0)
|
||||
mVUcreateTable(1)
|
||||
|
||||
//------------------------------------------------------------------
|
||||
// Table Functions
|
||||
//------------------------------------------------------------------
|
||||
#define doTableStuff(tableName, args) { \
|
||||
pass1 { \
|
||||
if (vuIndex) tableName##10[ args ](); \
|
||||
else tableName##00[ args ](); \
|
||||
} \
|
||||
pass2 { \
|
||||
if (vuIndex) tableName##11[ args ](); \
|
||||
else tableName##01[ args ](); \
|
||||
} \
|
||||
pass3 { \
|
||||
if (vuIndex) tableName##12[ args ](); \
|
||||
else tableName##02[ args ](); \
|
||||
} \
|
||||
pass4 { \
|
||||
if (vuIndex) tableName##13[ args ](); \
|
||||
else tableName##03[ args ](); \
|
||||
} \
|
||||
if (vuIndex) tableName##1[ args ](recPass); \
|
||||
else tableName##0[ args ](recPass); \
|
||||
}
|
||||
|
||||
microVUf(void) mVU_UPPER_FD_00() { doTableStuff(mVU_UPPER_FD_00_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVU_UPPER_FD_01() { doTableStuff(mVU_UPPER_FD_01_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVU_UPPER_FD_10() { doTableStuff(mVU_UPPER_FD_10_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVU_UPPER_FD_11() { doTableStuff(mVU_UPPER_FD_11_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP() { doTableStuff(mVULowerOP_OPCODE, (mVUgetCode & 0x3f)); }
|
||||
microVUf(void) mVULowerOP_T3_00() { doTableStuff(mVULowerOP_T3_00_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP_T3_01() { doTableStuff(mVULowerOP_T3_01_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP_T3_10() { doTableStuff(mVULowerOP_T3_10_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP_T3_11() { doTableStuff(mVULowerOP_T3_11_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVUopU() { doTableStuff(mVU_UPPER_OPCODE, (mVUgetCode & 0x3f)); } // Gets Upper Opcode
|
||||
microVUf(void) mVUopL() { doTableStuff(mVULOWER_OPCODE, (mVUgetCode >> 25)); } // Gets Lower Opcode
|
||||
microVUf(void) mVUunknown() {
|
||||
microVUf(void) mVU_UPPER_FD_00(mF) { doTableStuff(mVU_UPPER_FD_00_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVU_UPPER_FD_01(mF) { doTableStuff(mVU_UPPER_FD_01_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVU_UPPER_FD_10(mF) { doTableStuff(mVU_UPPER_FD_10_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVU_UPPER_FD_11(mF) { doTableStuff(mVU_UPPER_FD_11_TABLE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP(mF) { doTableStuff(mVULowerOP_OPCODE, (mVUgetCode & 0x3f)); }
|
||||
microVUf(void) mVULowerOP_T3_00(mF) { doTableStuff(mVULowerOP_T3_00_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP_T3_01(mF) { doTableStuff(mVULowerOP_T3_01_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP_T3_10(mF) { doTableStuff(mVULowerOP_T3_10_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVULowerOP_T3_11(mF) { doTableStuff(mVULowerOP_T3_11_OPCODE, ((mVUgetCode >> 6) & 0x1f)); }
|
||||
microVUf(void) mVUopU(mF) { doTableStuff(mVU_UPPER_OPCODE, (mVUgetCode & 0x3f)); } // Gets Upper Opcode
|
||||
microVUf(void) mVUopL(mF) { doTableStuff(mVULOWER_OPCODE, (mVUgetCode >> 25)); } // Gets Lower Opcode
|
||||
microVUf(void) mVUunknown(mF) {
|
||||
pass2 { SysPrintf("microVU%d: Unknown Micro VU opcode called (%x)\n", vuIndex, mVUgetCode); }
|
||||
pass3 { mVUlog("Unknown", mVUgetCode); }
|
||||
}
|
||||
|
|
|
@ -469,7 +469,7 @@ microVUt(void) mVUupdateFlags(int reg, int regT1, int regT2, int xyzw, bool modX
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// Micro VU Micromode Upper instructions
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//------------------------------------------------------------------
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||||
microVUf(void) mVU_ABS() {
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microVUf(void) mVU_ABS(mF) {
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||||
microVU* mVU = mVUx;
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||||
pass1 { mVUanalyzeFMAC2<vuIndex>(_Fs_, _Ft_); }
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pass2 {
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|
@ -480,92 +480,92 @@ microVUf(void) mVU_ABS() {
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}
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||||
pass3 { mVUlog("ABS"); mVUlogFtFs(); }
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}
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||||
microVUf(void) mVU_ADD() { mVU_FMAC1 (ADD, "ADD"); }
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microVUf(void) mVU_ADDi() { mVU_FMAC6 (ADD2, "ADDi"); }
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microVUf(void) mVU_ADDq() { mVU_FMAC22(ADD, "ADDq"); }
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microVUf(void) mVU_ADDx() { mVU_FMAC3 (ADD, "ADDx"); }
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microVUf(void) mVU_ADDy() { mVU_FMAC3 (ADD, "ADDy"); }
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microVUf(void) mVU_ADDz() { mVU_FMAC3 (ADD, "ADDz"); }
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microVUf(void) mVU_ADDw() { mVU_FMAC3 (ADD, "ADDw"); }
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microVUf(void) mVU_ADDA() { mVU_FMAC4 (ADD, "ADDA"); }
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microVUf(void) mVU_ADDAi() { mVU_FMAC7 (ADD, "ADDAi"); }
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microVUf(void) mVU_ADDAq() { mVU_FMAC23(ADD, "ADDAq"); }
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microVUf(void) mVU_ADDAx() { mVU_FMAC5 (ADD, "ADDAx"); }
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microVUf(void) mVU_ADDAy() { mVU_FMAC5 (ADD, "ADDAy"); }
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microVUf(void) mVU_ADDAz() { mVU_FMAC5 (ADD, "ADDAz"); }
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microVUf(void) mVU_ADDAw() { mVU_FMAC5 (ADD, "ADDAw"); }
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microVUf(void) mVU_SUB() { mVU_FMAC1 (SUB, "SUB"); }
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microVUf(void) mVU_SUBi() { mVU_FMAC6 (SUB, "SUBi"); }
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microVUf(void) mVU_SUBq() { mVU_FMAC22(SUB, "SUBq"); }
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microVUf(void) mVU_SUBx() { mVU_FMAC3 (SUB, "SUBx"); }
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microVUf(void) mVU_SUBy() { mVU_FMAC3 (SUB, "SUBy"); }
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microVUf(void) mVU_SUBz() { mVU_FMAC3 (SUB, "SUBz"); }
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microVUf(void) mVU_SUBw() { mVU_FMAC3 (SUB, "SUBw"); }
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microVUf(void) mVU_SUBA() { mVU_FMAC4 (SUB, "SUBA"); }
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microVUf(void) mVU_SUBAi() { mVU_FMAC7 (SUB, "SUBAi"); }
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microVUf(void) mVU_SUBAq() { mVU_FMAC23(SUB, "SUBAq"); }
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microVUf(void) mVU_SUBAx() { mVU_FMAC5 (SUB, "SUBAx"); }
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microVUf(void) mVU_SUBAy() { mVU_FMAC5 (SUB, "SUBAy"); }
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microVUf(void) mVU_SUBAz() { mVU_FMAC5 (SUB, "SUBAz"); }
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microVUf(void) mVU_SUBAw() { mVU_FMAC5 (SUB, "SUBAw"); }
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microVUf(void) mVU_MUL() { mVU_FMAC1 (MUL, "MUL"); }
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microVUf(void) mVU_MULi() { mVU_FMAC6 (MUL, "MULi"); }
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microVUf(void) mVU_MULq() { mVU_FMAC22(MUL, "MULq"); }
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microVUf(void) mVU_MULx() { mVU_FMAC3 (MUL, "MULx"); }
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microVUf(void) mVU_MULy() { mVU_FMAC3 (MUL, "MULy"); }
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microVUf(void) mVU_MULz() { mVU_FMAC3 (MUL, "MULz"); }
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microVUf(void) mVU_MULw() { mVU_FMAC3 (MUL, "MULw"); }
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microVUf(void) mVU_MULA() { mVU_FMAC4 (MUL, "MULA"); }
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microVUf(void) mVU_MULAi() { mVU_FMAC7 (MUL, "MULAi"); }
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microVUf(void) mVU_MULAq() { mVU_FMAC23(MUL, "MULAq"); }
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microVUf(void) mVU_MULAx() { mVU_FMAC5 (MUL, "MULAx"); }
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microVUf(void) mVU_MULAy() { mVU_FMAC5 (MUL, "MULAy"); }
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microVUf(void) mVU_MULAz() { mVU_FMAC5 (MUL, "MULAz"); }
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microVUf(void) mVU_MULAw() { mVU_FMAC5 (MUL, "MULAw"); }
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microVUf(void) mVU_MADD() { mVU_FMAC8 (ADD, "MADD"); }
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microVUf(void) mVU_MADDi() { mVU_FMAC12(ADD, "MADDi"); }
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microVUf(void) mVU_MADDq() { mVU_FMAC24(ADD, "MADDq"); }
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microVUf(void) mVU_MADDx() { mVU_FMAC10(ADD, "MADDx"); }
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microVUf(void) mVU_MADDy() { mVU_FMAC10(ADD, "MADDy"); }
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microVUf(void) mVU_MADDz() { mVU_FMAC10(ADD, "MADDz"); }
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||||
microVUf(void) mVU_MADDw() { mVU_FMAC10(ADD, "MADDw"); }
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microVUf(void) mVU_MADDA() { mVU_FMAC14(ADD, "MADDA"); }
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microVUf(void) mVU_MADDAi() { mVU_FMAC16(ADD, "MADDAi"); }
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||||
microVUf(void) mVU_MADDAq() { mVU_FMAC26(ADD, "MADDAq"); }
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||||
microVUf(void) mVU_MADDAx() { mVU_FMAC15(ADD, "MADDAx"); }
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microVUf(void) mVU_MADDAy() { mVU_FMAC15(ADD, "MADDAy"); }
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||||
microVUf(void) mVU_MADDAz() { mVU_FMAC15(ADD, "MADDAz"); }
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||||
microVUf(void) mVU_MADDAw() { mVU_FMAC15(ADD, "MADDAw"); }
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||||
microVUf(void) mVU_MSUB() { mVU_FMAC9 (SUB, "MSUB"); }
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||||
microVUf(void) mVU_MSUBi() { mVU_FMAC13(SUB, "MSUBi"); }
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||||
microVUf(void) mVU_MSUBq() { mVU_FMAC25(SUB, "MSUBq"); }
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||||
microVUf(void) mVU_MSUBx() { mVU_FMAC11(SUB, "MSUBx"); }
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||||
microVUf(void) mVU_MSUBy() { mVU_FMAC11(SUB, "MSUBy"); }
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||||
microVUf(void) mVU_MSUBz() { mVU_FMAC11(SUB, "MSUBz"); }
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||||
microVUf(void) mVU_MSUBw() { mVU_FMAC11(SUB, "MSUBw"); }
|
||||
microVUf(void) mVU_MSUBA() { mVU_FMAC14(SUB, "MSUBA"); }
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||||
microVUf(void) mVU_MSUBAi() { mVU_FMAC16(SUB, "MSUBAi"); }
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||||
microVUf(void) mVU_MSUBAq() { mVU_FMAC26(SUB, "MSUBAq"); }
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||||
microVUf(void) mVU_MSUBAx() { mVU_FMAC15(SUB, "MSUBAx"); }
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||||
microVUf(void) mVU_MSUBAy() { mVU_FMAC15(SUB, "MSUBAy"); }
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||||
microVUf(void) mVU_MSUBAz() { mVU_FMAC15(SUB, "MSUBAz"); }
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||||
microVUf(void) mVU_MSUBAw() { mVU_FMAC15(SUB, "MSUBAw"); }
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||||
microVUf(void) mVU_MAX() { mVU_FMAC27(MAX2, "MAX"); }
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||||
microVUf(void) mVU_MAXi() { mVU_FMAC28(MAX2, "MAXi"); }
|
||||
microVUf(void) mVU_MAXx() { mVU_FMAC29(MAX2, "MAXx"); }
|
||||
microVUf(void) mVU_MAXy() { mVU_FMAC29(MAX2, "MAXy"); }
|
||||
microVUf(void) mVU_MAXz() { mVU_FMAC29(MAX2, "MAXz"); }
|
||||
microVUf(void) mVU_MAXw() { mVU_FMAC29(MAX2, "MAXw"); }
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||||
microVUf(void) mVU_MINI() { mVU_FMAC27(MIN2, "MINI"); }
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||||
microVUf(void) mVU_MINIi() { mVU_FMAC28(MIN2, "MINIi"); }
|
||||
microVUf(void) mVU_MINIx() { mVU_FMAC29(MIN2, "MINIx"); }
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||||
microVUf(void) mVU_MINIy() { mVU_FMAC29(MIN2, "MINIy"); }
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||||
microVUf(void) mVU_MINIz() { mVU_FMAC29(MIN2, "MINIz"); }
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||||
microVUf(void) mVU_MINIw() { mVU_FMAC29(MIN2, "MINIw"); }
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||||
microVUf(void) mVU_OPMULA() { mVU_FMAC18(MUL, "OPMULA"); }
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||||
microVUf(void) mVU_OPMSUB() { mVU_FMAC19(SUB, "OPMSUB"); }
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microVUf(void) mVU_NOP() { pass3 { mVUlog("NOP"); } }
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||||
microVUq(void) mVU_FTOIx(uptr addr) {
|
||||
microVUf(void) mVU_ADD(mF) { mVU_FMAC1 (ADD, "ADD"); }
|
||||
microVUf(void) mVU_ADDi(mF) { mVU_FMAC6 (ADD2, "ADDi"); }
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||||
microVUf(void) mVU_ADDq(mF) { mVU_FMAC22(ADD, "ADDq"); }
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||||
microVUf(void) mVU_ADDx(mF) { mVU_FMAC3 (ADD, "ADDx"); }
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||||
microVUf(void) mVU_ADDy(mF) { mVU_FMAC3 (ADD, "ADDy"); }
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microVUf(void) mVU_ADDz(mF) { mVU_FMAC3 (ADD, "ADDz"); }
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||||
microVUf(void) mVU_ADDw(mF) { mVU_FMAC3 (ADD, "ADDw"); }
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||||
microVUf(void) mVU_ADDA(mF) { mVU_FMAC4 (ADD, "ADDA"); }
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microVUf(void) mVU_ADDAi(mF) { mVU_FMAC7 (ADD, "ADDAi"); }
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||||
microVUf(void) mVU_ADDAq(mF) { mVU_FMAC23(ADD, "ADDAq"); }
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||||
microVUf(void) mVU_ADDAx(mF) { mVU_FMAC5 (ADD, "ADDAx"); }
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||||
microVUf(void) mVU_ADDAy(mF) { mVU_FMAC5 (ADD, "ADDAy"); }
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||||
microVUf(void) mVU_ADDAz(mF) { mVU_FMAC5 (ADD, "ADDAz"); }
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||||
microVUf(void) mVU_ADDAw(mF) { mVU_FMAC5 (ADD, "ADDAw"); }
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||||
microVUf(void) mVU_SUB(mF) { mVU_FMAC1 (SUB, "SUB"); }
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||||
microVUf(void) mVU_SUBi(mF) { mVU_FMAC6 (SUB, "SUBi"); }
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||||
microVUf(void) mVU_SUBq(mF) { mVU_FMAC22(SUB, "SUBq"); }
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||||
microVUf(void) mVU_SUBx(mF) { mVU_FMAC3 (SUB, "SUBx"); }
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||||
microVUf(void) mVU_SUBy(mF) { mVU_FMAC3 (SUB, "SUBy"); }
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||||
microVUf(void) mVU_SUBz(mF) { mVU_FMAC3 (SUB, "SUBz"); }
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||||
microVUf(void) mVU_SUBw(mF) { mVU_FMAC3 (SUB, "SUBw"); }
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||||
microVUf(void) mVU_SUBA(mF) { mVU_FMAC4 (SUB, "SUBA"); }
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||||
microVUf(void) mVU_SUBAi(mF) { mVU_FMAC7 (SUB, "SUBAi"); }
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||||
microVUf(void) mVU_SUBAq(mF) { mVU_FMAC23(SUB, "SUBAq"); }
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microVUf(void) mVU_SUBAx(mF) { mVU_FMAC5 (SUB, "SUBAx"); }
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microVUf(void) mVU_SUBAy(mF) { mVU_FMAC5 (SUB, "SUBAy"); }
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microVUf(void) mVU_SUBAz(mF) { mVU_FMAC5 (SUB, "SUBAz"); }
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microVUf(void) mVU_SUBAw(mF) { mVU_FMAC5 (SUB, "SUBAw"); }
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||||
microVUf(void) mVU_MUL(mF) { mVU_FMAC1 (MUL, "MUL"); }
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||||
microVUf(void) mVU_MULi(mF) { mVU_FMAC6 (MUL, "MULi"); }
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microVUf(void) mVU_MULq(mF) { mVU_FMAC22(MUL, "MULq"); }
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microVUf(void) mVU_MULx(mF) { mVU_FMAC3 (MUL, "MULx"); }
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microVUf(void) mVU_MULy(mF) { mVU_FMAC3 (MUL, "MULy"); }
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||||
microVUf(void) mVU_MULz(mF) { mVU_FMAC3 (MUL, "MULz"); }
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||||
microVUf(void) mVU_MULw(mF) { mVU_FMAC3 (MUL, "MULw"); }
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||||
microVUf(void) mVU_MULA(mF) { mVU_FMAC4 (MUL, "MULA"); }
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||||
microVUf(void) mVU_MULAi(mF) { mVU_FMAC7 (MUL, "MULAi"); }
|
||||
microVUf(void) mVU_MULAq(mF) { mVU_FMAC23(MUL, "MULAq"); }
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||||
microVUf(void) mVU_MULAx(mF) { mVU_FMAC5 (MUL, "MULAx"); }
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||||
microVUf(void) mVU_MULAy(mF) { mVU_FMAC5 (MUL, "MULAy"); }
|
||||
microVUf(void) mVU_MULAz(mF) { mVU_FMAC5 (MUL, "MULAz"); }
|
||||
microVUf(void) mVU_MULAw(mF) { mVU_FMAC5 (MUL, "MULAw"); }
|
||||
microVUf(void) mVU_MADD(mF) { mVU_FMAC8 (ADD, "MADD"); }
|
||||
microVUf(void) mVU_MADDi(mF) { mVU_FMAC12(ADD, "MADDi"); }
|
||||
microVUf(void) mVU_MADDq(mF) { mVU_FMAC24(ADD, "MADDq"); }
|
||||
microVUf(void) mVU_MADDx(mF) { mVU_FMAC10(ADD, "MADDx"); }
|
||||
microVUf(void) mVU_MADDy(mF) { mVU_FMAC10(ADD, "MADDy"); }
|
||||
microVUf(void) mVU_MADDz(mF) { mVU_FMAC10(ADD, "MADDz"); }
|
||||
microVUf(void) mVU_MADDw(mF) { mVU_FMAC10(ADD, "MADDw"); }
|
||||
microVUf(void) mVU_MADDA(mF) { mVU_FMAC14(ADD, "MADDA"); }
|
||||
microVUf(void) mVU_MADDAi(mF) { mVU_FMAC16(ADD, "MADDAi"); }
|
||||
microVUf(void) mVU_MADDAq(mF) { mVU_FMAC26(ADD, "MADDAq"); }
|
||||
microVUf(void) mVU_MADDAx(mF) { mVU_FMAC15(ADD, "MADDAx"); }
|
||||
microVUf(void) mVU_MADDAy(mF) { mVU_FMAC15(ADD, "MADDAy"); }
|
||||
microVUf(void) mVU_MADDAz(mF) { mVU_FMAC15(ADD, "MADDAz"); }
|
||||
microVUf(void) mVU_MADDAw(mF) { mVU_FMAC15(ADD, "MADDAw"); }
|
||||
microVUf(void) mVU_MSUB(mF) { mVU_FMAC9 (SUB, "MSUB"); }
|
||||
microVUf(void) mVU_MSUBi(mF) { mVU_FMAC13(SUB, "MSUBi"); }
|
||||
microVUf(void) mVU_MSUBq(mF) { mVU_FMAC25(SUB, "MSUBq"); }
|
||||
microVUf(void) mVU_MSUBx(mF) { mVU_FMAC11(SUB, "MSUBx"); }
|
||||
microVUf(void) mVU_MSUBy(mF) { mVU_FMAC11(SUB, "MSUBy"); }
|
||||
microVUf(void) mVU_MSUBz(mF) { mVU_FMAC11(SUB, "MSUBz"); }
|
||||
microVUf(void) mVU_MSUBw(mF) { mVU_FMAC11(SUB, "MSUBw"); }
|
||||
microVUf(void) mVU_MSUBA(mF) { mVU_FMAC14(SUB, "MSUBA"); }
|
||||
microVUf(void) mVU_MSUBAi(mF) { mVU_FMAC16(SUB, "MSUBAi"); }
|
||||
microVUf(void) mVU_MSUBAq(mF) { mVU_FMAC26(SUB, "MSUBAq"); }
|
||||
microVUf(void) mVU_MSUBAx(mF) { mVU_FMAC15(SUB, "MSUBAx"); }
|
||||
microVUf(void) mVU_MSUBAy(mF) { mVU_FMAC15(SUB, "MSUBAy"); }
|
||||
microVUf(void) mVU_MSUBAz(mF) { mVU_FMAC15(SUB, "MSUBAz"); }
|
||||
microVUf(void) mVU_MSUBAw(mF) { mVU_FMAC15(SUB, "MSUBAw"); }
|
||||
microVUf(void) mVU_MAX(mF) { mVU_FMAC27(MAX2, "MAX"); }
|
||||
microVUf(void) mVU_MAXi(mF) { mVU_FMAC28(MAX2, "MAXi"); }
|
||||
microVUf(void) mVU_MAXx(mF) { mVU_FMAC29(MAX2, "MAXx"); }
|
||||
microVUf(void) mVU_MAXy(mF) { mVU_FMAC29(MAX2, "MAXy"); }
|
||||
microVUf(void) mVU_MAXz(mF) { mVU_FMAC29(MAX2, "MAXz"); }
|
||||
microVUf(void) mVU_MAXw(mF) { mVU_FMAC29(MAX2, "MAXw"); }
|
||||
microVUf(void) mVU_MINI(mF) { mVU_FMAC27(MIN2, "MINI"); }
|
||||
microVUf(void) mVU_MINIi(mF) { mVU_FMAC28(MIN2, "MINIi"); }
|
||||
microVUf(void) mVU_MINIx(mF) { mVU_FMAC29(MIN2, "MINIx"); }
|
||||
microVUf(void) mVU_MINIy(mF) { mVU_FMAC29(MIN2, "MINIy"); }
|
||||
microVUf(void) mVU_MINIz(mF) { mVU_FMAC29(MIN2, "MINIz"); }
|
||||
microVUf(void) mVU_MINIw(mF) { mVU_FMAC29(MIN2, "MINIw"); }
|
||||
microVUf(void) mVU_OPMULA(mF) { mVU_FMAC18(MUL, "OPMULA"); }
|
||||
microVUf(void) mVU_OPMSUB(mF) { mVU_FMAC19(SUB, "OPMSUB"); }
|
||||
microVUf(void) mVU_NOP(mF) { pass3 { mVUlog("NOP"); } }
|
||||
microVUq(void) mVU_FTOIx(uptr addr, int recPass) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeFMAC2<vuIndex>(_Fs_, _Ft_); }
|
||||
pass2 {
|
||||
|
@ -586,11 +586,11 @@ microVUq(void) mVU_FTOIx(uptr addr) {
|
|||
mVUallocFMAC2b<vuIndex>(Ft);
|
||||
}
|
||||
}
|
||||
microVUf(void) mVU_FTOI0() { mVU_FTOIx<vuIndex, recPass>((uptr)0); pass3 { microVU* mVU = mVUx; mVUlog("FTOI0"); mVUlogFtFs(); } }
|
||||
microVUf(void) mVU_FTOI4() { mVU_FTOIx<vuIndex, recPass>((uptr)mVU_FTOI_4); pass3 { microVU* mVU = mVUx; mVUlog("FTOI4"); mVUlogFtFs(); } }
|
||||
microVUf(void) mVU_FTOI12() { mVU_FTOIx<vuIndex, recPass>((uptr)mVU_FTOI_12); pass3 { microVU* mVU = mVUx; mVUlog("FTOI12"); mVUlogFtFs(); } }
|
||||
microVUf(void) mVU_FTOI15() { mVU_FTOIx<vuIndex, recPass>((uptr)mVU_FTOI_15); pass3 { microVU* mVU = mVUx; mVUlog("FTOI15"); mVUlogFtFs(); } }
|
||||
microVUq(void) mVU_ITOFx(uptr addr) {
|
||||
microVUf(void) mVU_FTOI0(mF) { mVU_FTOIx<vuIndex>((uptr)0, recPass); pass3 { microVU* mVU = mVUx; mVUlog("FTOI0"); mVUlogFtFs(); } }
|
||||
microVUf(void) mVU_FTOI4(mF) { mVU_FTOIx<vuIndex>((uptr)mVU_FTOI_4, recPass); pass3 { microVU* mVU = mVUx; mVUlog("FTOI4"); mVUlogFtFs(); } }
|
||||
microVUf(void) mVU_FTOI12(mF) { mVU_FTOIx<vuIndex>((uptr)mVU_FTOI_12, recPass); pass3 { microVU* mVU = mVUx; mVUlog("FTOI12"); mVUlogFtFs(); } }
|
||||
microVUf(void) mVU_FTOI15(mF) { mVU_FTOIx<vuIndex>((uptr)mVU_FTOI_15, recPass); pass3 { microVU* mVU = mVUx; mVUlog("FTOI15"); mVUlogFtFs(); } }
|
||||
microVUq(void) mVU_ITOFx(uptr addr, int recPass) {
|
||||
microVU* mVU = mVUx;
|
||||
pass1 { mVUanalyzeFMAC2<vuIndex>(_Fs_, _Ft_); }
|
||||
pass2 {
|
||||
|
@ -604,11 +604,11 @@ microVUq(void) mVU_ITOFx(uptr addr) {
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mVUallocFMAC2b<vuIndex>(Ft);
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}
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}
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microVUf(void) mVU_ITOF0() { mVU_ITOFx<vuIndex, recPass>((uptr)0); pass3 { microVU* mVU = mVUx; mVUlog("ITOF0"); mVUlogFtFs(); } }
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microVUf(void) mVU_ITOF4() { mVU_ITOFx<vuIndex, recPass>((uptr)mVU_ITOF_4); pass3 { microVU* mVU = mVUx; mVUlog("ITOF4"); mVUlogFtFs(); } }
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microVUf(void) mVU_ITOF12() { mVU_ITOFx<vuIndex, recPass>((uptr)mVU_ITOF_12); pass3 { microVU* mVU = mVUx; mVUlog("ITOF12"); mVUlogFtFs(); } }
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microVUf(void) mVU_ITOF15() { mVU_ITOFx<vuIndex, recPass>((uptr)mVU_ITOF_15); pass3 { microVU* mVU = mVUx; mVUlog("ITOF15"); mVUlogFtFs(); } }
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microVUf(void) mVU_CLIP() {
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microVUf(void) mVU_ITOF0(mF) { mVU_ITOFx<vuIndex>((uptr)0, recPass); pass3 { microVU* mVU = mVUx; mVUlog("ITOF0"); mVUlogFtFs(); } }
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microVUf(void) mVU_ITOF4(mF) { mVU_ITOFx<vuIndex>((uptr)mVU_ITOF_4, recPass); pass3 { microVU* mVU = mVUx; mVUlog("ITOF4"); mVUlogFtFs(); } }
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microVUf(void) mVU_ITOF12(mF) { mVU_ITOFx<vuIndex>((uptr)mVU_ITOF_12, recPass); pass3 { microVU* mVU = mVUx; mVUlog("ITOF12"); mVUlogFtFs(); } }
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microVUf(void) mVU_ITOF15(mF) { mVU_ITOFx<vuIndex>((uptr)mVU_ITOF_15, recPass); pass3 { microVU* mVU = mVUx; mVUlog("ITOF15"); mVUlogFtFs(); } }
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microVUf(void) mVU_CLIP(mF) {
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microVU* mVU = mVUx;
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pass1 { mVUanalyzeFMAC4<vuIndex>(_Fs_, _Ft_); }
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pass2 {
|
||||
|
|
Loading…
Reference in New Issue