mirror of https://github.com/PCSX2/pcsx2.git
More overflow checking made optional
git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@27 a6443dda-0b58-4228-96e9-037be469359c
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@ -1338,7 +1338,7 @@ void vuFloat3(uptr x86ptr)
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void CheckForOverflow(VURegs *VU, int info, int regd)
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{
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testWhenOverflow(info, regd, EEREC_TEMP);
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//testWhenOverflow(info, regd, EEREC_TEMP);
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//CheckForOverflow_(regd, EEREC_TEMP, _X_Y_Z_W);
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if (EEREC_TEMP != regd) {
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//testWhenOverflow(info, regd, EEREC_TEMP);
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@ -3610,18 +3610,21 @@ void recVUMI_ITOF0( VURegs *VU, int info )
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VU_MERGE_REGS(EEREC_T, EEREC_TEMP);
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xmmregs[EEREC_T].mode |= MODE_WRITE;
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vuFloat2(EEREC_T, EEREC_TEMP, _X_Y_Z_W); // Clamp infinities
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_T, EEREC_TEMP, _X_Y_Z_W); // Clamp infinities
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}
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else {
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if( cpucaps.hasStreamingSIMD2Extensions ) {
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SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_T, EEREC_S);
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vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities
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}
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else {
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_deleteVFtoXMMreg(_Fs_, VU==&VU1, 1);
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SSE2EMU_CVTDQ2PS_M128_to_XMM(EEREC_T, VU_VFx_ADDR( _Fs_ ));
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xmmregs[EEREC_T].mode |= MODE_WRITE;
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vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities
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}
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}
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}
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@ -3640,7 +3643,8 @@ void recVUMI_ITOFX(VURegs *VU, int addr, int info)
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SSE_MULPS_M128_to_XMM(EEREC_TEMP, addr);
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VU_MERGE_REGS(EEREC_T, EEREC_TEMP);
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xmmregs[EEREC_T].mode |= MODE_WRITE;
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vuFloat2(EEREC_T, EEREC_TEMP, _X_Y_Z_W); // Clamp infinities
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_T, EEREC_TEMP, _X_Y_Z_W); // Clamp infinities
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} else {
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if(cpucaps.hasStreamingSIMD2Extensions) SSE2_CVTDQ2PS_XMM_to_XMM(EEREC_T, EEREC_S);
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else {
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@ -3650,7 +3654,8 @@ void recVUMI_ITOFX(VURegs *VU, int addr, int info)
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}
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SSE_MULPS_M128_to_XMM(EEREC_T, addr);
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vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_T, EEREC_TEMP, 15); // Clamp infinities
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}
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}
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@ -3891,8 +3896,8 @@ void recVUMI_DIV(VURegs *VU, int info)
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SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_T);
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}
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}
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vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP);
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}
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@ -3932,8 +3937,9 @@ void recVUMI_SQRT( VURegs *VU, int info )
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//SSE_ANDPS_M128_to_XMM(EEREC_TEMP, (u32)const_clip);
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SSE_SQRTSS_XMM_to_XMM(EEREC_TEMP, EEREC_TEMP);
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vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP);
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_freeX86reg(vftemp);
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@ -4046,8 +4052,9 @@ void recVUMI_RSQRT(VURegs *VU, int info)
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SSE_DIVSS_M32_to_XMM(EEREC_TEMP, VU_VI_ADDR(REG_Q, 0));
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}
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}
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vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_TEMP, EEREC_TEMP, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_Q, 0), EEREC_TEMP);
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_freeX86reg(vftemp);
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@ -5488,7 +5495,8 @@ void recVUMI_ESADD( VURegs *VU, int info)
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SSE_ADDSS_XMM_to_XMM(EEREC_D, EEREC_TEMP);
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}
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}
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_TEMP, EEREC_D, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP);
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@ -5526,7 +5534,8 @@ void recVUMI_ERSADD( VURegs *VU, int info )
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// don't use RCPSS (very bad precision)
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SSE_DIVSS_XMM_to_XMM(EEREC_TEMP, EEREC_D);
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vuFloat2(EEREC_TEMP, EEREC_D, 0x8);
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if (CHECK_EXTRA_OVERFLOW)
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vuFloat2(EEREC_TEMP, EEREC_D, 0x8);
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SSE_MOVSS_XMM_to_M32(VU_VI_ADDR(REG_P, 0), EEREC_TEMP);
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}
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