mirror of https://github.com/PCSX2/pcsx2.git
--This breaks linux.
--Basic vtlb code rewrite for full mapping using exceptions --This is buggy & leaks ram for now git-svn-id: http://pcsx2.googlecode.com/svn/branches/vtlb-exp@934 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
drkiiraziel
parent
c81e012e51
commit
6c88e99cf2
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@ -357,13 +357,15 @@ static void psxCheckEndGate32(int i)
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_psxCheckEndGate( i );
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}
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#include <windows.h>
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void psxVBlankStart()
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{
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cdvdVsync();
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psxHu32(0x1070) |= 1;
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if(psxvblankgate & (1 << 1)) psxCheckStartGate16(1);
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if(psxvblankgate & (1 << 3)) psxCheckStartGate32(3);
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if (GetAsyncKeyState('P'))
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Cpu->Reset();
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}
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void psxVBlankEnd()
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@ -61,6 +61,12 @@ vtlbHandler UnmappedVirtHandler1;
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vtlbHandler UnmappedPhyHandler0;
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vtlbHandler UnmappedPhyHandler1;
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#define VTLB_ALLOC_SIZE (0x2900000) //this is a bit more than required
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u8* vtlb_alloc_base; //base of the memory array
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u8* vtlb_alloc_current; //current base
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u8 vtlb_alloc_bits[VTLB_ALLOC_SIZE/16/8]; //328 kb
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/*
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__asm
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@ -91,6 +97,13 @@ callfunction:
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// Interpreter Implementations of VTLB Memory Operations.
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// See recVTLB.cpp for the dynarec versions.
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void memwritebits(u8* ptr)
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{
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u32 offs=ptr-vtlb_alloc_base;
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offs/=16;
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vtlb_alloc_bits[offs/8]|=1<<(offs%8);
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}
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// Interpreted VTLB lookup for 8, 16, and 32 bit accesses
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template<int DataSize,typename DataType>
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__forceinline DataType __fastcall MemOp_r0(u32 addr)
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@ -116,7 +129,6 @@ __forceinline DataType __fastcall MemOp_r0(u32 addr)
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jNO_DEFAULT;
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}
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}
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// Interpreterd VTLB lookup for 64 and 128 bit accesses.
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template<int DataSize,typename DataType>
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__forceinline void __fastcall MemOp_r1(u32 addr, DataType* data)
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@ -155,6 +167,7 @@ __forceinline void __fastcall MemOp_w0(u32 addr, DataType data)
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s32 ppf=addr+vmv;
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if (!(ppf<0))
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{
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//memwritebits((u8*)ppf);
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*reinterpret_cast<DataType*>(ppf)=data;
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}
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else
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@ -182,6 +195,7 @@ __forceinline void __fastcall MemOp_w1(u32 addr,const DataType* data)
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s32 ppf=addr+vmv;
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if (!(ppf<0))
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{
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//memwritebits((u8*)ppf);
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*reinterpret_cast<DataType*>(ppf)=*data;
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if (DataSize==128)
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*reinterpret_cast<DataType*>(ppf+8)=data[1];
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@ -552,6 +566,13 @@ void vtlb_Term()
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//nothing to do for now
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}
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void vtlb_alloc_mem()
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{
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u32 size=VTLB_ALLOC_SIZE;
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vtlb_alloc_base=SysMmapEx( 0, size, 0x80000000, "Vtlb");
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vtlb_alloc_current=vtlb_alloc_base;
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}
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// This function allocates memory block with are compatible with the Vtlb's requirements
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// for memory locations. The Vtlb requires the topmost bit (Sign bit) of the memory
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// pointer to be cleared. Some operating systems and/or implementations of malloc do that,
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@ -559,6 +580,17 @@ void vtlb_Term()
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// platform.
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u8* vtlb_malloc( uint size, uint align, uptr tryBaseAddress )
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{
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if (!vtlb_alloc_base)
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vtlb_alloc_mem();
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u32 realign=((uptr)vtlb_alloc_current&(align-1));
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if (realign)
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vtlb_alloc_current+=align-realign;
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u8* rv=vtlb_alloc_current;
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vtlb_alloc_current+=size;
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return rv;
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#ifdef __LINUX__
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return SysMmapEx( tryBaseAddress, size, 0x80000000, "Vtlb" );
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#else
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@ -569,6 +601,7 @@ u8* vtlb_malloc( uint size, uint align, uptr tryBaseAddress )
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void vtlb_free( void* pmem, uint size )
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{
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return;//whatever
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if( pmem == NULL ) return;
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#ifdef __LINUX__
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@ -202,10 +202,8 @@ void WinRun()
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_doPluginOverride( "DEV9", g_Startup.dev9dll, Config.DEV9 );
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#ifndef _DEBUG
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if( Config.Profiler )
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ProfilerInit();
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#endif
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InitCPUTicks();
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@ -800,7 +798,6 @@ LRESULT WINAPI MainWndProc(HWND hWnd, UINT msg, WPARAM wParam, LPARAM lParam)
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SaveConfig();
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break;
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#ifndef _DEBUG
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case ID_PROFILER:
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Config.Profiler = !Config.Profiler;
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if( Config.Profiler )
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@ -815,7 +812,6 @@ LRESULT WINAPI MainWndProc(HWND hWnd, UINT msg, WPARAM wParam, LPARAM lParam)
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}
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SaveConfig();
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break;
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#endif
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default:
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if (LOWORD(wParam) >= ID_LANGS && LOWORD(wParam) <= (ID_LANGS + langsMax))
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@ -989,9 +985,7 @@ void CreateMainMenu() {
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ADDMENUITEM(0,_("Print cdvd &Info"), ID_CDVDPRINT);
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ADDMENUITEM(0,_("Close GS Window on Esc"), ID_CLOSEGS);
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ADDSEPARATOR(0);
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#ifndef _DEBUG
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ADDMENUITEM(0,_("Enable &Profiler"), ID_PROFILER);
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#endif
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ADDMENUITEM(0,_("Enable &Patches"), ID_PATCHES);
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ADDMENUITEM(0,_("Enable &Console"), ID_CONSOLE);
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ADDSEPARATOR(0);
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@ -49,14 +49,53 @@ int SysPageFaultExceptionFilter( EXCEPTION_POINTERS* eps )
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}
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// get bad virtual address
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u32 offset = (u8*)ExceptionRecord.ExceptionInformation[1]-psM;
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uptr addr=ExceptionRecord.ExceptionInformation[1];
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if (offset>=Ps2MemSize::Base)
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return EXCEPTION_CONTINUE_SEARCH;
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//this is a *hackfix* for a bug on x64 windows kernels.They do not give correct address
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//if the error is a missaligned access (they return 0)
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if (addr==0)
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{
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if (eps->ContextRecord->Ecx & 0x80000000)
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addr=eps->ContextRecord->Ecx;
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}
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u32 offset = addr-(uptr)psM;
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if (addr&0x80000000)
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{
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uptr _vtlb_HandleRewrite(uptr code);
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u8* pcode=(u8*)ExceptionRecord.ExceptionAddress;
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mmap_ClearCpuBlock( offset );
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u32 patch_point=1;
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//01 C1
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while(pcode[-patch_point]!=0x81 || pcode[-patch_point-1]!=0xC1 || pcode[-patch_point-2]!=0x01)
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{
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patch_point++;
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}
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assert(pcode[-patch_point]==0x81);
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pcode[-patch_point]=0xF;//js32, 0x81 is add32
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pcode[-patch_point+1]=0x88;
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return EXCEPTION_CONTINUE_EXECUTION;
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//resume execution from correct point
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eps->ContextRecord->Eax-=*(u32*)&pcode[-patch_point+2];
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uptr codeloc=_vtlb_HandleRewrite(*(u32*)&pcode[-patch_point+2]);
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eps->ContextRecord->Eip=codeloc;
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*(u32*)&pcode[-patch_point+2]=codeloc-(u32)&pcode[-patch_point+6];
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SysPrintf("memop patch for full mapping @ %08X : pp %d\n",pcode,patch_point);
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return EXCEPTION_CONTINUE_EXECUTION;
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}
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else
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{
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if (offset>=Ps2MemSize::Base)
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return EXCEPTION_CONTINUE_SEARCH;
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mmap_ClearCpuBlock( offset );
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return EXCEPTION_CONTINUE_EXECUTION;
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}
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}
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@ -24,23 +24,178 @@
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#include "iCore.h"
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#include "iR5900.h"
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using namespace vtlb_private;
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u8* execohax_pos=0;
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u8* execohax_start=0;
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u32 execohx_sz;
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// NOTICE: This function *destroys* EAX!!
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// Moves 128 bits of memory from the source register ptr to the dest register ptr.
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// (used as an equivalent to movaps, when a free XMM register is unavailable for some reason)
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void MOV128_MtoM( x86IntRegType destRm, x86IntRegType srcRm )
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u8* code_pos=0;
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u8* code_start=0;
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u32 code_sz;
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using namespace vtlb_private;
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#include <windows.h>
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void execuCode(bool set)
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{
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MOV32RmtoR(EAX,srcRm);
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MOV32RtoRm(destRm,EAX);
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MOV32RmtoROffset(EAX,srcRm,4);
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MOV32RtoRmOffset(destRm,EAX,4);
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MOV32RmtoROffset(EAX,srcRm,8);
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MOV32RtoRmOffset(destRm,EAX,8);
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MOV32RmtoROffset(EAX,srcRm,12);
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MOV32RtoRmOffset(destRm,EAX,12);
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u32 used=code_pos-code_start;
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u32 free=2*1024*1024-used;
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if (code_pos == 0 || free<128)
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{
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SysPrintf("Leaking 2 megabytes of ram\n");
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code_start=code_pos=(u8*)VirtualAlloc(0,2*1024*1024,MEM_COMMIT,PAGE_EXECUTE_READWRITE);
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code_sz+=2*1024*1024;
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int i=0;
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while(i<code_sz)
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{
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//UD2 is 0xF 0xB.Fill the stream with it so that the cpu don't try to execute past branches ..
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code_start[i]=0xF;i++;
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code_start[i]=0xB;i++;
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}
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}
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static u8* old;
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if (set)
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{
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old=x86SetPtr(code_pos);
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}
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else
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{
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code_pos=x86SetPtr(old);
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u32 tt=execohx_sz-2*1024*1024+(execohax_pos-execohax_start);
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u32 tc=code_sz-free;
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SysPrintf("%d code, %d pot, %.2f%%\n",tc,tt,tc/(float)tt*100);
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}
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}
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u32* execohaxme(bool set)
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{
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u32 used=execohax_pos-execohax_start;
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u32 free=2*1024*1024-used;
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if (execohax_pos == 0 || free<128)
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{
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SysPrintf("Leaking 2 megabytes of ram\n");
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execohax_start=execohax_pos=(u8*)VirtualAlloc(0,2*1024*1024,MEM_COMMIT,PAGE_EXECUTE_READWRITE);
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execohx_sz+=2*1024*1024;
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}
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static u8* saved;
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static u8* mod;
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if (set)
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{
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write8<_EmitterId_>( 0x81 );
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ModRM<_EmitterId_>( 3, 0, EAX );
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write32<_EmitterId_>( (uptr)execohax_pos );
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saved=x86SetPtr(execohax_pos);
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mod=execohax_pos;
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write8<_EmitterId_>(0); //size, in bytes
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write32<_EmitterId_>(0); //return address
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}
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else
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{
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//x86AlignExecutable(4);
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//x86Align(64);
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execohax_pos=x86SetPtr(mod);
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write8<_EmitterId_>(execohax_pos-mod-5);
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return (u32*)x86SetPtr(saved);
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}
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return 0;
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}
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uptr _vtlb_HandleRewrite(uptr block)
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{
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u8 size=*(u8*)block;
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u32 ra=*(u32*)(block+1);
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u8* pcode=(u8*)(block+5);
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execuCode(true);
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uptr rv=(uptr)code_pos;
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while(size--)
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{
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write8<_EmitterId_>(*pcode++);
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}
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JMP32(ra-(uptr)x86Ptr[_EmitterId_]-5);
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execuCode(false);
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//do magic
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return rv;
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}
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PCSX2_ALIGNED16( static u64 g_globalXMMData[2*XMMREGS] );
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void MOVx_SSE( x86IntRegType destRm, x86IntRegType srcRm,u32 srcAddr=0,u32 dstAddr=0,bool half=false )
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{
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int reg;
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bool free_reg=false;
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if( _hasFreeXMMreg() )
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{
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free_reg=true;
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reg=_allocTempXMMreg( XMMT_INT, -1 );
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}
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else
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{
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SSE2_MOVDQA_XMM_to_M128((uptr)g_globalXMMData,XMM0);
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reg=XMM0;
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}
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if (half)
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{
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if (srcAddr)
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SSE_MOVLPS_M64_to_XMM(reg,srcAddr);
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else
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SSE_MOVLPS_RmOffset_to_XMM(reg,srcRm,0);
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if (dstAddr)
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SSE_MOVLPS_XMM_to_M64(dstAddr,reg);
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else
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SSE_MOVLPS_XMM_to_RmOffset(destRm,reg,0);
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}
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else
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{
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if (srcAddr)
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SSE2_MOVDQA_M128_to_XMM(reg,srcAddr);
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else
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SSE2_MOVDQARmtoROffset(reg,srcRm,0);
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if (dstAddr)
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SSE2_MOVDQA_XMM_to_M128(dstAddr,reg);
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else
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SSE2_MOVDQARtoRmOffset(destRm,reg,0);
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}
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if (free_reg)
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_freeXMMreg(reg);
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else
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{
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SSE2_MOVDQA_M128_to_XMM(XMM0,(uptr)g_globalXMMData);
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}
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}
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void MOV64_MMX( x86IntRegType destRm, x86IntRegType srcRm,u32 srcAddr=0,u32 dstAddr=0)
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{
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//if free xmm && fpu state then we use the SSE version.
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if( !(_hasFreeXMMreg() && (x86FpuState == FPU_STATE)) && _hasFreeMMXreg() )
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{
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const int freereg = _allocMMXreg(-1, MMX_TEMP, 0);
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if (srcAddr)
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MOVQMtoR(freereg,srcAddr);
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else
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MOVQRmtoROffset(freereg,srcRm,0);
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if (dstAddr)
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MOVQRtoM(dstAddr,freereg);
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else
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MOVQRtoRmOffset(destRm,freereg,0);
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_freeMMXreg(freereg);
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}
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else
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{
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MOVx_SSE(destRm,srcRm,srcAddr,dstAddr,true);
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}
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}
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/*
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// Pseudo-Code For the following Dynarec Implementations -->
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@ -118,38 +273,11 @@ static void _vtlb_DynGen_DirectRead( u32 bits, bool sign )
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break;
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case 64:
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if( _hasFreeMMXreg() )
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{
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const int freereg = _allocMMXreg(-1, MMX_TEMP, 0);
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MOVQRmtoROffset(freereg,ECX,0);
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MOVQRtoRmOffset(EDX,freereg,0);
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_freeMMXreg(freereg);
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}
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else
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{
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MOV32RmtoR(EAX,ECX);
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MOV32RtoRm(EDX,EAX);
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MOV32RmtoROffset(EAX,ECX,4);
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MOV32RtoRmOffset(EDX,EAX,4);
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}
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MOV64_MMX(EDX,ECX);
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break;
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case 128:
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if( _hasFreeXMMreg() )
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{
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const int freereg = _allocTempXMMreg( XMMT_INT, -1 );
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SSE2_MOVDQARmtoROffset(freereg,ECX,0);
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SSE2_MOVDQARtoRmOffset(EDX,freereg,0);
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_freeXMMreg(freereg);
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}
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else
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{
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// Could put in an MMX optimization here as well, but no point really.
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// It's almost never used since there's almost always a free XMM reg.
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MOV128_MtoM( EDX, ECX ); // dest <- src!
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}
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MOVx_SSE(EDX,ECX);
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break;
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jNO_DEFAULT
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@ -189,15 +317,16 @@ void vtlb_DynGenRead64(u32 bits)
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SHR32ItoR(EAX,VTLB_PAGE_BITS);
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MOV32RmSOffsettoR(EAX,EAX,(int)vtlbdata.vmap,2);
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ADD32RtoR(ECX,EAX);
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u8* _fullread = JS8(0);
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//u8* _direct = JMP8(0);
|
||||
execohaxme(true);
|
||||
|
||||
_vtlb_DynGen_DirectRead( bits, false );
|
||||
u8* cont = JMP8(0);
|
||||
|
||||
x86SetJ8(_fullread);
|
||||
_vtlb_DynGen_IndirectRead( bits );
|
||||
|
||||
x86SetJ8(cont);
|
||||
|
||||
u32* patch=execohaxme(false);
|
||||
|
||||
_vtlb_DynGen_DirectRead( bits, false );
|
||||
|
||||
*patch=(uptr)x86Ptr[_EmitterId_];
|
||||
}
|
||||
|
||||
// Recompiled input registers:
|
||||
|
|
@ -211,12 +340,9 @@ void vtlb_DynGenRead32(u32 bits, bool sign)
|
|||
SHR32ItoR(EAX,VTLB_PAGE_BITS);
|
||||
MOV32RmSOffsettoR(EAX,EAX,(int)vtlbdata.vmap,2);
|
||||
ADD32RtoR(ECX,EAX);
|
||||
u8* _fullread = JS8(0);
|
||||
//u8* _direct = JMP8(0);
|
||||
execohaxme(true);
|
||||
|
||||
_vtlb_DynGen_DirectRead( bits, sign );
|
||||
u8* cont = JMP8(0);
|
||||
|
||||
x86SetJ8(_fullread);
|
||||
_vtlb_DynGen_IndirectRead( bits );
|
||||
|
||||
// perform sign extension on the result:
|
||||
|
|
@ -236,7 +362,11 @@ void vtlb_DynGenRead32(u32 bits, bool sign)
|
|||
MOVZX32R16toR(EAX,EAX);
|
||||
}
|
||||
|
||||
x86SetJ8(cont);
|
||||
u32* patch=execohaxme(false);
|
||||
|
||||
_vtlb_DynGen_DirectRead( bits, sign );
|
||||
|
||||
*patch=(uptr)x86Ptr[_EmitterId_];
|
||||
}
|
||||
|
||||
//
|
||||
|
|
@ -251,39 +381,11 @@ void vtlb_DynGenRead64_Const( u32 bits, u32 addr_const )
|
|||
switch( bits )
|
||||
{
|
||||
case 64:
|
||||
if( _hasFreeMMXreg() )
|
||||
{
|
||||
const int freereg = _allocMMXreg(-1, MMX_TEMP, 0);
|
||||
MOVQMtoR(freereg,ppf);
|
||||
MOVQRtoRmOffset(EDX,freereg,0);
|
||||
_freeMMXreg(freereg);
|
||||
}
|
||||
else
|
||||
{
|
||||
MOV32MtoR(EAX,ppf);
|
||||
MOV32RtoRm(EDX,EAX);
|
||||
|
||||
MOV32MtoR(EAX,ppf+4);
|
||||
MOV32RtoRmOffset(EDX,EAX,4);
|
||||
}
|
||||
MOV64_MMX( EDX, ECX,ppf ); // dest <- src!
|
||||
break;
|
||||
|
||||
case 128:
|
||||
if( _hasFreeXMMreg() )
|
||||
{
|
||||
const int freereg = _allocTempXMMreg( XMMT_INT, -1 );
|
||||
SSE2_MOVDQA_M128_to_XMM( freereg, ppf );
|
||||
SSE2_MOVDQARtoRmOffset(EDX,freereg,0);
|
||||
_freeXMMreg(freereg);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Could put in an MMX optimization here as well, but no point really.
|
||||
// It's almost never used since there's almost always a free XMM reg.
|
||||
|
||||
MOV32ItoR( ECX, ppf );
|
||||
MOV128_MtoM( EDX, ECX ); // dest <- src!
|
||||
}
|
||||
MOVx_SSE( EDX, ECX,ppf ); // dest <- src!
|
||||
break;
|
||||
|
||||
jNO_DEFAULT
|
||||
|
|
@ -403,40 +505,16 @@ static void _vtlb_DynGen_DirectWrite( u32 bits )
|
|||
break;
|
||||
|
||||
case 64:
|
||||
if( _hasFreeMMXreg() )
|
||||
{
|
||||
const int freereg = _allocMMXreg(-1, MMX_TEMP, 0);
|
||||
MOVQRmtoROffset(freereg,EDX,0);
|
||||
MOVQRtoRmOffset(ECX,freereg,0);
|
||||
_freeMMXreg( freereg );
|
||||
}
|
||||
else
|
||||
{
|
||||
MOV32RmtoR(EAX,EDX);
|
||||
MOV32RtoRm(ECX,EAX);
|
||||
|
||||
MOV32RmtoROffset(EAX,EDX,4);
|
||||
MOV32RtoRmOffset(ECX,EAX,4);
|
||||
}
|
||||
MOV64_MMX( ECX, EDX );
|
||||
break;
|
||||
|
||||
case 128:
|
||||
if( _hasFreeXMMreg() )
|
||||
{
|
||||
const int freereg = _allocTempXMMreg( XMMT_INT, -1 );
|
||||
SSE2_MOVDQARmtoROffset(freereg,EDX,0);
|
||||
SSE2_MOVDQARtoRmOffset(ECX,freereg,0);
|
||||
_freeXMMreg( freereg );
|
||||
}
|
||||
else
|
||||
{
|
||||
// Could put in an MMX optimization here as well, but no point really.
|
||||
// It's almost never used since there's almost always a free XMM reg.
|
||||
|
||||
MOV128_MtoM( ECX, EDX ); // dest <- src!
|
||||
}
|
||||
MOVx_SSE( ECX, EDX );
|
||||
break;
|
||||
}
|
||||
|
||||
// SHR32ItoR(ECX,4);// do /16
|
||||
// BTS_wtf(asdasd,ECX);
|
||||
}
|
||||
|
||||
static void _vtlb_DynGen_IndirectWrite( u32 bits )
|
||||
|
|
@ -464,15 +542,17 @@ void vtlb_DynGenWrite(u32 sz)
|
|||
SHR32ItoR(EAX,VTLB_PAGE_BITS);
|
||||
MOV32RmSOffsettoR(EAX,EAX,(int)vtlbdata.vmap,2);
|
||||
ADD32RtoR(ECX,EAX);
|
||||
u8* _full=JS8(0);
|
||||
|
||||
_vtlb_DynGen_DirectWrite( sz );
|
||||
u8* cont = JMP8(0);
|
||||
//u8* _direct=JMP8(0);
|
||||
|
||||
x86SetJ8(_full);
|
||||
execohaxme(true);
|
||||
|
||||
_vtlb_DynGen_IndirectWrite( sz );
|
||||
|
||||
x86SetJ8(cont);
|
||||
|
||||
u32* patch=execohaxme(false);
|
||||
_vtlb_DynGen_DirectWrite( sz );
|
||||
|
||||
*patch=(uptr)x86Ptr[_EmitterId_];
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -499,39 +579,11 @@ void vtlb_DynGenWrite_Const( u32 bits, u32 addr_const )
|
|||
break;
|
||||
|
||||
case 64:
|
||||
if( _hasFreeMMXreg() )
|
||||
{
|
||||
const int freereg = _allocMMXreg(-1, MMX_TEMP, 0);
|
||||
MOVQRmtoROffset(freereg,EDX,0);
|
||||
MOVQRtoM(ppf,freereg);
|
||||
_freeMMXreg( freereg );
|
||||
}
|
||||
else
|
||||
{
|
||||
MOV32RmtoR(EAX,EDX);
|
||||
MOV32RtoM(ppf,EAX);
|
||||
|
||||
MOV32RmtoROffset(EAX,EDX,4);
|
||||
MOV32RtoM(ppf+4,EAX);
|
||||
}
|
||||
MOV64_MMX( ECX, EDX,0,ppf); // dest <- src!
|
||||
break;
|
||||
|
||||
case 128:
|
||||
if( _hasFreeXMMreg() )
|
||||
{
|
||||
const int freereg = _allocTempXMMreg( XMMT_INT, -1 );
|
||||
SSE2_MOVDQARmtoROffset(freereg,EDX,0);
|
||||
SSE2_MOVDQA_XMM_to_M128(ppf,freereg);
|
||||
_freeXMMreg( freereg );
|
||||
}
|
||||
else
|
||||
{
|
||||
// Could put in an MMX optimization here as well, but no point really.
|
||||
// It's almost never used since there's almost always a free XMM reg.
|
||||
|
||||
MOV32ItoR( ECX, ppf );
|
||||
MOV128_MtoM( ECX, EDX ); // dest <- src!
|
||||
}
|
||||
MOVx_SSE( ECX, EDX,0,ppf); // dest <- src!
|
||||
break;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@ emitterT void write64( u64 val ){
|
|||
//------------------------------------------------------------------
|
||||
// jump/align functions
|
||||
//------------------------------------------------------------------
|
||||
emitterT void ex86SetPtr( u8 *ptr );
|
||||
emitterT u8* ex86SetPtr( u8 *ptr );
|
||||
emitterT void ex86SetJ8( u8 *j8 );
|
||||
emitterT void ex86SetJ8A( u8 *j8 );
|
||||
emitterT void ex86SetJ16( u16 *j16 );
|
||||
|
|
|
|||
|
|
@ -159,9 +159,12 @@ emitterT void CMOV32MtoR( int cc, int to, uptr from )
|
|||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
emitterT void ex86SetPtr( u8* ptr )
|
||||
emitterT u8* ex86SetPtr( u8* ptr )
|
||||
{
|
||||
x86Ptr[I] = ptr;
|
||||
u8* rv= x86Ptr[I];
|
||||
if (ptr!=0)
|
||||
x86Ptr[I] = ptr;
|
||||
return rv;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////
|
||||
|
|
|
|||
Loading…
Reference in New Issue