mirror of https://github.com/PCSX2/pcsx2.git
VIF FIFO: Hacked the hack. Fixes Downtown Run. Tested all known games that need the hack, they still work *phew*
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@ -237,7 +237,7 @@ __fi void vif1FBRST(u32 value) {
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if (FBRST(value).STC) // Cancel Vif Stall.
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if (FBRST(value).STC) // Cancel Vif Stall.
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{
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{
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bool cancel = false;
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bool cancel = false;
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//DevCon.Warning("Cancel stall. Stat = %x", vif1Regs.stat._u32);
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/* Cancel stall, first check if there is a stall to cancel, and then clear VIF1_STAT VSS|VFS|VIS|INT|ER0|ER1 bits */
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/* Cancel stall, first check if there is a stall to cancel, and then clear VIF1_STAT VSS|VFS|VIS|INT|ER0|ER1 bits */
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if (vif1Regs.stat.test(VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS))
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if (vif1Regs.stat.test(VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS))
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{
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{
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@ -277,9 +277,11 @@ __fi void vif1STAT(u32 value) {
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/* Only FDR bit is writable, so mask the rest */
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/* Only FDR bit is writable, so mask the rest */
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if ((vif1Regs.stat.FDR) ^ ((tVIF_STAT&)value).FDR) {
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if ((vif1Regs.stat.FDR) ^ ((tVIF_STAT&)value).FDR) {
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bool isStalled = false;
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// different so can't be stalled
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// different so can't be stalled
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if (vif1Regs.stat.test(VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) {
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if (vif1Regs.stat.test(VIF1_STAT_INT | VIF1_STAT_VSS | VIF1_STAT_VIS | VIF1_STAT_VFS)) {
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DevCon.WriteLn("changing dir when vif1 fifo stalled done = %x qwc = %x", vif1.done, vif1ch.qwc);
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DbgCon.WriteLn("changing dir when vif1 fifo stalled done = %x qwc = %x stat = %x", vif1.done, vif1ch.qwc, vif1Regs.stat._u32);
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isStalled = true;
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}
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}
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//Hack!! Hotwheels seems to leave 1QW in the fifo and expect the DMA to be ready for a reverse FIFO
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//Hack!! Hotwheels seems to leave 1QW in the fifo and expect the DMA to be ready for a reverse FIFO
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@ -287,8 +289,10 @@ __fi void vif1STAT(u32 value) {
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//Hotwheels had this in the "direction when stalled" area, however Sled Storm seems to keep an eye on the dma
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//Hotwheels had this in the "direction when stalled" area, however Sled Storm seems to keep an eye on the dma
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//position, as we clear it and set it to the end well before the interrupt, the game assumes it's finished,
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//position, as we clear it and set it to the end well before the interrupt, the game assumes it's finished,
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//then proceeds to reverse the dma before we have even done it ourselves. So lets just make sure VIF is ready :)
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//then proceeds to reverse the dma before we have even done it ourselves. So lets just make sure VIF is ready :)
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vif1ch.chcr.STR = false;
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if (vif1ch.qwc > 0 || isStalled == false){
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cpuRegs.interrupt &= ~((1 << DMAC_VIF1) | (1 << DMAC_MFIFO_VIF));
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vif1ch.chcr.STR = false;
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cpuRegs.interrupt &= ~((1 << DMAC_VIF1) | (1 << DMAC_MFIFO_VIF));
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}
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//This is actually more important for our handling, else the DMA for reverse fifo doesnt start properly.
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//This is actually more important for our handling, else the DMA for reverse fifo doesnt start properly.
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}
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}
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@ -312,6 +316,7 @@ __fi void vif1STAT(u32 value) {
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//Sometimes the value from the GS is bigger than vif wanted, so it just sets it back and cancels it.
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//Sometimes the value from the GS is bigger than vif wanted, so it just sets it back and cancels it.
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//Other times it can read it off ;)
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//Other times it can read it off ;)
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vif1Regs.stat.FQC = 0;
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vif1Regs.stat.FQC = 0;
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if (vif1ch.chcr.STR) CPU_INT(DMAC_VIF1, 0);
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}
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}
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}
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}
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