mirror of https://github.com/PCSX2/pcsx2.git
recompiler: document the register allocation
This commit is contained in:
Gregory Hainaut
parent
224370e866
commit
6ac76c86d7
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@ -47,12 +47,15 @@ _x86regs x86regs[iREGCNT_GPR], s_saveX86regs[iREGCNT_GPR];
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static int s_xmmchecknext = 0;
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// Clear current register mapping structure
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// Clear allocation counter
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void _initXMMregs() {
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memzero( xmmregs );
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g_xmmAllocCounter = 0;
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s_xmmchecknext = 0;
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}
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// Get a pointer to the physical register (GPR / FPU / VU etc..)
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__fi void* _XMMGetAddr(int type, int reg, VURegs *VU)
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{
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switch (type) {
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@ -79,6 +82,14 @@ __fi void* _XMMGetAddr(int type, int reg, VURegs *VU)
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return NULL;
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}
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// Get the index of a free register
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// Step1: check any available register (inuse == 0)
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// Step2: check registers that are not live (both EEINST_LIVE* are cleared)
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// Step3: check registers that won't use SSE in the future (likely broken as EEINST_XMM isn't set properly)
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// Step4: take a randome register
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//
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// Note: I don't understand why we don't check register that aren't useful anymore
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// (i.e EEINST_USED is cleared)
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int _getFreeXMMreg()
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{
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int i, tempi;
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@ -140,6 +151,7 @@ int _getFreeXMMreg()
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throw Exception::FailedToAllocateRegister();
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}
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// Reserve a XMM register for temporary operation.
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int _allocTempXMMreg(XMMSSEType type, int xmmreg) {
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if (xmmreg == -1)
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xmmreg = _getFreeXMMreg();
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@ -155,6 +167,7 @@ int _allocTempXMMreg(XMMSSEType type, int xmmreg) {
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return xmmreg;
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}
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#ifndef DISABLE_SVU
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int _allocVFtoXMMreg(VURegs *VU, int xmmreg, int vfreg, int mode) {
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int i;
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int readfromreg = -1;
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@ -208,7 +221,14 @@ int _allocVFtoXMMreg(VURegs *VU, int xmmreg, int vfreg, int mode) {
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return xmmreg;
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}
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#endif
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// Search register "reg" of type "type" which is inuse
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// If register doesn't have the read flag but mode is read
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// then populate the register from the memory
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// Note: There is a special HALF mode (to handle low 64 bits copy) but it seems to be unused
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//
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// So basically it is mostly used to set the mode of the register, and load value if we need to read it
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int _checkXMMreg(int type, int reg, int mode)
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{
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int i;
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@ -238,6 +258,7 @@ int _checkXMMreg(int type, int reg, int mode)
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return -1;
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}
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#ifndef DISABLE_SVU
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int _allocACCtoXMMreg(VURegs *VU, int xmmreg, int mode) {
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int i;
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int readfromreg = -1;
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@ -294,7 +315,15 @@ int _allocACCtoXMMreg(VURegs *VU, int xmmreg, int mode) {
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return xmmreg;
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}
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#endif
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// Fully allocate a FPU register
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// first trial:
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// search an already reserved reg then populate it if we read it
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// Second trial:
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// reserve a new reg, then populate it if we read it
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//
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// Note: FPU are always in XMM register
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int _allocFPtoXMMreg(int xmmreg, int fpreg, int mode) {
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int i;
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@ -332,6 +361,8 @@ int _allocFPtoXMMreg(int xmmreg, int fpreg, int mode) {
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return xmmreg;
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}
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// In short try to allocate a GPR register. Code is an uterly mess
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// due to XMM/MMX/X86 crazyness !
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int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode)
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{
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int i;
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@ -439,6 +470,8 @@ int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode)
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return xmmreg;
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}
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// Same code as _allocFPtoXMMreg but for the FPU ACC register
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// (seriously boy you could have factorized it)
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int _allocFPACCtoXMMreg(int xmmreg, int mode)
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{
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int i;
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@ -477,6 +510,7 @@ int _allocFPACCtoXMMreg(int xmmreg, int mode)
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return xmmreg;
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}
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#ifndef DISABLE_SVU
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void _addNeededVFtoXMMreg(int vfreg) {
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int i;
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@ -489,7 +523,10 @@ void _addNeededVFtoXMMreg(int vfreg) {
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xmmregs[i].needed = 1;
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}
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}
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#endif
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// Mark reserved GPR reg as needed. It won't be evicted anymore.
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// You must use _clearNeededXMMregs to clear the flag
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void _addNeededGPRtoXMMreg(int gprreg)
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{
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int i;
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@ -505,6 +542,7 @@ void _addNeededGPRtoXMMreg(int gprreg)
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}
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}
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#ifndef DISABLE_SVU
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void _addNeededACCtoXMMreg() {
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int i;
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@ -517,7 +555,10 @@ void _addNeededACCtoXMMreg() {
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break;
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}
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}
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#endif
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// Mark reserved FPU reg as needed. It won't be evicted anymore.
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// You must use _clearNeededXMMregs to clear the flag
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void _addNeededFPtoXMMreg(int fpreg) {
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int i;
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@ -532,6 +573,8 @@ void _addNeededFPtoXMMreg(int fpreg) {
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}
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}
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// Mark reserved FPU ACC reg as needed. It won't be evicted anymore.
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// You must use _clearNeededXMMregs to clear the flag
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void _addNeededFPACCtoXMMreg() {
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int i;
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@ -545,6 +588,8 @@ void _addNeededFPACCtoXMMreg() {
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}
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}
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// Clear needed flags of all registers
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// Written register will set MODE_READ (aka data is valid, no need to load it)
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void _clearNeededXMMregs() {
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int i;
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@ -564,6 +609,7 @@ void _clearNeededXMMregs() {
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}
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}
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#ifndef DISABLE_SVU
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void _deleteVFtoXMMreg(int reg, int vu, int flush)
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{
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int i;
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@ -634,7 +680,9 @@ void _deleteVFtoXMMreg(int reg, int vu, int flush)
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}
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}
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}
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#endif
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#if 0
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void _deleteACCtoXMMreg(int vu, int flush)
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{
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int i;
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@ -695,8 +743,11 @@ void _deleteACCtoXMMreg(int vu, int flush)
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}
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}
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}
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#endif
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// when flush is 1 or 2, only commits the reg to mem (still leave its xmm entry)
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// Flush is 0: _freeXMMreg. Flush in memory if MODE_WRITE. Clear inuse
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// Flush is 1: Flush in memory. But register is still valid
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// Flush is 2: like 0 ...
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void _deleteGPRtoXMMreg(int reg, int flush)
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{
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int i;
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@ -731,6 +782,9 @@ void _deleteGPRtoXMMreg(int reg, int flush)
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}
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}
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// Flush is 0: _freeXMMreg. Flush in memory if MODE_WRITE. Clear inuse
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// Flush is 1: Flush in memory. But register is still valid
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// Flush is 2: drop register content
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void _deleteFPtoXMMreg(int reg, int flush)
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{
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int i;
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@ -758,6 +812,9 @@ void _deleteFPtoXMMreg(int reg, int flush)
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}
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}
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// Free cached register
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// Step 1: flush content in memory if MODE_WRITE
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// Step 2: clear 'inuse' field
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void _freeXMMreg(u32 xmmreg)
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{
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pxAssert( xmmreg < iREGCNT_XMM );
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@ -871,6 +928,7 @@ void _freeXMMreg(u32 xmmreg)
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xmmregs[xmmreg].inuse = 0;
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}
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// Return the number of inuse XMM register that have the MODE_WRITE flag
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int _getNumXMMwrite()
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{
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int num = 0, i;
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@ -881,6 +939,9 @@ int _getNumXMMwrite()
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return num;
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}
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// Step1: check any available register (inuse == 0)
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// Step2: check registers that are not live (both EEINST_LIVE* are cleared)
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// Step3: check registers that are not useful anymore (EEINST_USED cleared)
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u8 _hasFreeXMMreg()
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{
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int i;
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@ -911,6 +972,7 @@ u8 _hasFreeXMMreg()
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return 0;
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}
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#if 0
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void _moveXMMreg(int xmmreg)
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{
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int i;
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@ -931,7 +993,9 @@ void _moveXMMreg(int xmmreg)
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xmmregs[xmmreg].inuse = 0;
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xMOVDQA(xRegisterSSE(i), xRegisterSSE(xmmreg));
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}
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#endif
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// Flush in memory all inuse registers but registers are still valid
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void _flushXMMregs()
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{
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int i;
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@ -949,6 +1013,7 @@ void _flushXMMregs()
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}
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}
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// Flush in memory all inuse registers. All registers are invalid
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void _freeXMMregs()
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{
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int i;
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@ -1004,6 +1069,8 @@ int _signExtendXMMtoM(uptr to, x86SSERegType from, int candestroy)
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pxAssume( false );
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}
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// Seem related to the mix between XMM/x86 in order to avoid a couple of move
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// But it is quite obscure !!!
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int _allocCheckGPRtoXMM(EEINST* pinst, int gprreg, int mode)
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{
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if( pinst->regs[gprreg] & EEINST_XMM ) return _allocGPRtoXMMreg(-1, gprreg, mode);
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@ -1011,6 +1078,8 @@ int _allocCheckGPRtoXMM(EEINST* pinst, int gprreg, int mode)
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return _checkXMMreg(XMMTYPE_GPRREG, gprreg, mode);
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}
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// Seem related to the mix between XMM/x86 in order to avoid a couple of move
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// But it is quite obscure !!!
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int _allocCheckFPUtoXMM(EEINST* pinst, int fpureg, int mode)
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{
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if( pinst->fpuregs[fpureg] & EEINST_XMM ) return _allocFPtoXMMreg(-1, fpureg, mode);
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@ -1050,6 +1119,7 @@ u32 _recIsRegWritten(EEINST* pinst, int size, u8 xmmtype, u8 reg)
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return 0;
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}
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#if 0
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u32 _recIsRegUsed(EEINST* pinst, int size, u8 xmmtype, u8 reg)
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{
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u32 i, inst = 1;
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@ -1068,6 +1138,7 @@ u32 _recIsRegUsed(EEINST* pinst, int size, u8 xmmtype, u8 reg)
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return 0;
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}
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#endif
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void _recFillRegister(EEINST& pinst, int type, int reg, int write)
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{
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@ -163,19 +163,14 @@ struct _xmmregs {
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void _initXMMregs();
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int _getFreeXMMreg();
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int _allocTempXMMreg(XMMSSEType type, int xmmreg);
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int _allocVFtoXMMreg(VURegs *VU, int xmmreg, int vfreg, int mode);
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int _allocFPtoXMMreg(int xmmreg, int fpreg, int mode);
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int _allocGPRtoXMMreg(int xmmreg, int gprreg, int mode);
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int _allocACCtoXMMreg(VURegs *VU, int xmmreg, int mode);
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int _allocFPACCtoXMMreg(int xmmreg, int mode);
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int _checkXMMreg(int type, int reg, int mode);
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void _addNeededVFtoXMMreg(int vfreg);
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void _addNeededACCtoXMMreg();
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void _addNeededFPtoXMMreg(int fpreg);
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void _addNeededFPACCtoXMMreg();
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void _addNeededGPRtoXMMreg(int gprreg);
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void _clearNeededXMMregs();
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void _deleteVFtoXMMreg(int reg, int vu, int flush);
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//void _deleteACCtoXMMreg(int vu, int flush);
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void _deleteGPRtoXMMreg(int reg, int flush);
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void _deleteFPtoXMMreg(int reg, int flush);
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@ -185,6 +180,13 @@ void _flushXMMregs();
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u8 _hasFreeXMMreg();
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void _freeXMMregs();
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int _getNumXMMwrite();
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#ifndef DISABLE_SVU
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int _allocVFtoXMMreg(VURegs *VU, int xmmreg, int vfreg, int mode);
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int _allocACCtoXMMreg(VURegs *VU, int xmmreg, int mode);
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void _addNeededVFtoXMMreg(int vfreg);
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void _addNeededACCtoXMMreg();
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void _deleteVFtoXMMreg(int reg, int vu, int flush);
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#endif
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void _signExtendSFtoM(uptr mem);
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@ -196,6 +198,18 @@ int _signExtendXMMtoM(uptr to, x86SSERegType from, int candestroy); // returns t
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//////////////////////
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// Instruction Info //
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//////////////////////
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// Liveness information for the noobs :)
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// Let's take I instructions that read from RN register set and write to
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// WN register set.
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// 1/ EEINST_USED will be set in register N of instruction I1, if and only if RN or WN is used in the insruction I2 with I2 >= I1.
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// In others words, it will be set on [I0, ILast] with ILast the last instruction that use the register.
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// 2/ EEINST_LASTUSE will be set in register N the last instruction that use the register.
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// Note: EEINST_USED will be cleared after EEINST_LASTUSE
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// My guess: both variable allow to detect register that can be flushed for free
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//
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// 3/ EEINST_LIVE* is cleared when register is written. And set again when register is read.
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// My guess: the purpose is to detect the usage hole in the flow
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#define EEINST_LIVE0 1 // if var is ever used (read or write)
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#define EEINST_LIVE2 4 // if cur var's next 64 bits are needed
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#define EEINST_LASTUSE 8 // if var isn't written/read anymore
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@ -227,7 +241,7 @@ extern void _recClearInst(EEINST* pinst);
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// returns the number of insts + 1 until written (0 if not written)
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extern u32 _recIsRegWritten(EEINST* pinst, int size, u8 xmmtype, u8 reg);
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// returns the number of insts + 1 until used (0 if not used)
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extern u32 _recIsRegUsed(EEINST* pinst, int size, u8 xmmtype, u8 reg);
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//extern u32 _recIsRegUsed(EEINST* pinst, int size, u8 xmmtype, u8 reg);
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extern void _recFillRegister(EEINST& pinst, int type, int reg, int write);
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static __fi bool EEINST_ISLIVE64(u32 reg) { return !!(g_pCurInstInfo->regs[reg] & (EEINST_LIVE0)); }
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