diff --git a/pcsx2/x86/ix86-32/iR5900Arit.cpp b/pcsx2/x86/ix86-32/iR5900Arit.cpp
index 2793f3880c..0a56a3ed49 100644
--- a/pcsx2/x86/ix86-32/iR5900Arit.cpp
+++ b/pcsx2/x86/ix86-32/iR5900Arit.cpp
@@ -448,13 +448,16 @@ void recDSUBU(void)
 	recDSUB();
 }
 
-enum class LogicalOp
+namespace
 {
-	AND,
-	OR,
-	XOR,
-	NOR
-};
+	enum class LogicalOp
+	{
+		AND,
+		OR,
+		XOR,
+		NOR
+	};
+} // namespace
 
 static void recLogicalOp_constv(LogicalOp op, int info, int creg, u32 vreg)
 {
diff --git a/pcsx2/x86/ix86-32/iR5900AritImm.cpp b/pcsx2/x86/ix86-32/iR5900AritImm.cpp
index a8f553ccac..07abe0a174 100644
--- a/pcsx2/x86/ix86-32/iR5900AritImm.cpp
+++ b/pcsx2/x86/ix86-32/iR5900AritImm.cpp
@@ -224,12 +224,15 @@ void recANDI_const()
 	g_cpuConstRegs[_Rt_].UD[0] = g_cpuConstRegs[_Rs_].UD[0] & (u64)_ImmU_; // Zero-extended Immediate
 }
 
-enum class LogicalOp
+namespace
 {
-	AND,
-	OR,
-	XOR
-};
+	enum class LogicalOp
+	{
+		AND,
+		OR,
+		XOR
+	};
+} // namespace
 
 static void recLogicalOpI(int info, LogicalOp op)
 {