From 614cc7e55d31dd218fe8b3536b82e15ecafb32ca Mon Sep 17 00:00:00 2001 From: cottonvibes Date: Wed, 19 Aug 2009 04:00:53 +0000 Subject: [PATCH] microVU: minor changes... git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1651 96395faa-99c1-11dd-bbfe-3dabce05a288 --- pcsx2/x86/microVU_Analyze.inl | 28 ++++++++++++++++++++-- pcsx2/x86/microVU_Compile.inl | 9 ++++--- pcsx2/x86/microVU_Lower.inl | 45 +++++++++++++++++++---------------- 3 files changed, 57 insertions(+), 25 deletions(-) diff --git a/pcsx2/x86/microVU_Analyze.inl b/pcsx2/x86/microVU_Analyze.inl index ad6418b819..5f3a826c73 100644 --- a/pcsx2/x86/microVU_Analyze.inl +++ b/pcsx2/x86/microVU_Analyze.inl @@ -388,14 +388,28 @@ microVUt(void) analyzeBranchVI(mV, int xReg, bool &infoVar) { else iPC = bPC; } -microVUt(void) mVUanalyzeBranch1(mV, int Is) { +// Branch in Branch Delay-Slots +microVUt(void) mVUbranchCheck(mV) { + if (!mVUcount) return; + incPC(-2); + if (mVUlow.branch) { + incPC(2); + Console::Error("microVU%d Warning: Branch in Branch delay slot! [%04x]", params mVU->index, xPC); + mVUlow.isNOP = 1; + } + else incPC(2); +} + +microVUt(void) mVUanalyzeCondBranch1(mV, int Is) { + mVUbranchCheck(mVU); analyzeVIreg1(Is, mVUlow.VI_read[0]); if (!mVUstall) { analyzeBranchVI(mVU, Is, mVUlow.memReadIs); } } -microVUt(void) mVUanalyzeBranch2(mV, int Is, int It) { +microVUt(void) mVUanalyzeCondBranch2(mV, int Is, int It) { + mVUbranchCheck(mVU); analyzeVIreg1(Is, mVUlow.VI_read[0]); analyzeVIreg1(It, mVUlow.VI_read[1]); if (!mVUstall) { @@ -404,7 +418,17 @@ microVUt(void) mVUanalyzeBranch2(mV, int Is, int It) { } } +microVUt(void) mVUanalyzeNormBranch(mV, int It, bool isBAL) { + mVUbranchCheck(mVU); + if (isBAL) { + analyzeVIreg2(It, mVUlow.VI_write, 1); + setConstReg(It, bSaveAddr); + } +} + microVUt(void) mVUanalyzeJump(mV, int Is, int It, bool isJALR) { + mVUbranchCheck(mVU); + mVUlow.branch = (isJALR) ? 10 : 9; if (mVUconstReg[Is].isValid && !CHECK_VU_CONSTHACK) { mVUlow.constJump.isValid = 1; mVUlow.constJump.regValue = mVUconstReg[Is].regValue; diff --git a/pcsx2/x86/microVU_Compile.inl b/pcsx2/x86/microVU_Compile.inl index e01f7727ca..6d8a63d375 100644 --- a/pcsx2/x86/microVU_Compile.inl +++ b/pcsx2/x86/microVU_Compile.inl @@ -158,11 +158,14 @@ microVUt(void) doSwapOp(mV) { } microVUt(void) branchWarning(mV) { - if (mVUbranch) { - Console::Error("microVU%d Warning: Branch in E-bit/Branch delay slot! [%04x]", params mVU->index, xPC); + incPC(-2); + if (mVUup.eBit && mVUbranch) { + incPC(2); + Console::Error("microVU%d Warning: Branch in E-bit delay slot! [%04x]", params mVU->index, xPC); mVUlow.isNOP = 1; } - if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay + else incPC(2); + if (mVUinfo.isBdelay) { // Check if VI Reg Written to on Branch Delay Slot Instruction if (mVUlow.VI_write.reg && mVUlow.VI_write.used && !mVUlow.readFlags) { mVUlow.backupVI = 1; mVUregs.viBackUp = mVUlow.VI_write.reg; diff --git a/pcsx2/x86/microVU_Lower.inl b/pcsx2/x86/microVU_Lower.inl index 1f696e4dc3..94e5d15ad9 100644 --- a/pcsx2/x86/microVU_Lower.inl +++ b/pcsx2/x86/microVU_Lower.inl @@ -1153,21 +1153,26 @@ mVUop(mVU_XGKICK) { // Branches/Jumps //------------------------------------------------------------------ -#define setBranchA(x, _x_) { \ - pass1 { if (_Imm11_ == 1 && !_x_) { mVUlow.isNOP = 1; return; } mVUbranch = x; } \ - pass2 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } \ - pass3 { mVUbranch = x; } \ - pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } \ +void setBranchA(mP, int x, int _x_) { + pass1 { + if (_Imm11_ == 1 && !_x_) { mVUlow.isNOP = 1; return; } + mVUbranch = x; + mVUlow.branch = x; + } + pass2 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } + pass3 { mVUbranch = x; } + pass4 { if (_Imm11_ == 1 && !_x_) { return; } mVUbranch = x; } } mVUop(mVU_B) { - setBranchA(1, 0); + setBranchA(mX, 1, 0); + pass1 { mVUanalyzeNormBranch(mVU, 0, 0); } pass3 { mVUlog("B [%04x]", branchAddr, branchAddr); } } mVUop(mVU_BAL) { - setBranchA(2, _It_); - pass1 { analyzeVIreg2(_It_, mVUlow.VI_write, 1); setConstReg(_It_, bSaveAddr); } + setBranchA(mX, 2, _It_); + pass1 { mVUanalyzeNormBranch(mVU, _It_, 1); } pass2 { MOV32ItoR(gprT1, bSaveAddr); mVUallocVIb(mVU, gprT1, _It_); @@ -1176,8 +1181,8 @@ mVUop(mVU_BAL) { } mVUop(mVU_IBEQ) { - setBranchA(3, 0); - pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); } + setBranchA(mX, 3, 0); + pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1189,8 +1194,8 @@ mVUop(mVU_IBEQ) { } mVUop(mVU_IBGEZ) { - setBranchA(4, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 4, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1200,8 +1205,8 @@ mVUop(mVU_IBGEZ) { } mVUop(mVU_IBGTZ) { - setBranchA(5, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 5, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1211,8 +1216,8 @@ mVUop(mVU_IBGTZ) { } mVUop(mVU_IBLEZ) { - setBranchA(6, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 6, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1222,8 +1227,8 @@ mVUop(mVU_IBLEZ) { } mVUop(mVU_IBLTZ) { - setBranchA(7, 0); - pass1 { mVUanalyzeBranch1(mVU, _Is_); } + setBranchA(mX, 7, 0); + pass1 { mVUanalyzeCondBranch1(mVU, _Is_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_); @@ -1233,8 +1238,8 @@ mVUop(mVU_IBLTZ) { } mVUop(mVU_IBNE) { - setBranchA(8, 0); - pass1 { mVUanalyzeBranch2(mVU, _Is_, _It_); } + setBranchA(mX, 8, 0); + pass1 { mVUanalyzeCondBranch2(mVU, _Is_, _It_); } pass2 { if (mVUlow.memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup); else mVUallocVIa(mVU, gprT1, _Is_);