From 5efbf2a8023432d4ff6f9564e77eda7714c4f91d Mon Sep 17 00:00:00 2001
From: Gregory Hainaut <gregory.hainaut@gmail.com>
Date: Thu, 28 Jan 2016 21:16:20 +0100
Subject: [PATCH] dmac: madr msb bit is fixed to 0 in 8/9 channels

Fix another dmac tests :)
---
 pcsx2/ps2/LegacyDmac.cpp | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/pcsx2/ps2/LegacyDmac.cpp b/pcsx2/ps2/LegacyDmac.cpp
index 12e62e953d..01a42a3dcd 100644
--- a/pcsx2/ps2/LegacyDmac.cpp
+++ b/pcsx2/ps2/LegacyDmac.cpp
@@ -374,6 +374,20 @@ __fi bool dmacWrite32( u32 mem, mem32_t& value )
 			return false;
 		}
 
+		icase(fromSPR_MADR)
+		{
+			// SPR bit is fixed at 0 for this channel
+			psHu32(mem) = value & 0x7FFFFFFF;
+			return false;
+		}
+
+		icase(toSPR_MADR)
+		{
+			// SPR bit is fixed at 0 for this channel
+			psHu32(mem) = value & 0x7FFFFFFF;
+			return false;
+		}
+
 		icase(fromSPR_SADR)
 		{
 			// Address must be QW aligned and fit in the 16K range of SPR