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pcsx2: removed some msvc++ warnings from one of arcum42's cleanups 

microVU: minor fixes.
The ps2's VUs (and FPU) pretty much always do sqrt(abs(x)) whenever doing sqrt's.
SSE's sqrt will give you a NaN if x is negative instead, so force abs(x) before doing sqrt (unless the value is known to be positive).

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1592 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-08-01 02:44:22 +00:00
parent 3f4f3db3e6
commit 5c38811967
2 changed files with 9 additions and 7 deletions
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14
pcsx2/x86/iCore.h
View File

@ -222,7 +222,7 @@ template<memtag tag> static __forceinline bool IS_REG(s32 reg)
template<memtag tag> static __forceinline bool IS_REG(u32 reg)
{
return (reg & tag);
return !!(reg & tag);
}
#define IS_EECONSTREG(reg) IS_REG<MEM_EECONSTTAG>(reg)
@ -281,13 +281,13 @@ extern u32 _recIsRegWritten(EEINST* pinst, int size, u8 xmmtype, u8 reg);
extern u32 _recIsRegUsed(EEINST* pinst, int size, u8 xmmtype, u8 reg);
extern void _recFillRegister(EEINST& pinst, int type, int reg, int write);
static __forceinline bool EEINST_ISLIVE64(u32 reg) { return (g_pCurInstInfo->regs[reg] & (EEINST_LIVE0|EEINST_LIVE1)); }
static __forceinline bool EEINST_ISLIVEXMM(u32 reg) { return (g_pCurInstInfo->regs[reg] & (EEINST_LIVE0|EEINST_LIVE1|EEINST_LIVE2)); }
static __forceinline bool EEINST_ISLIVE1(u32 reg) { return (g_pCurInstInfo->regs[reg] & EEINST_LIVE1); }
static __forceinline bool EEINST_ISLIVE2(u32 reg) { return (g_pCurInstInfo->regs[reg] & EEINST_LIVE2); }
static __forceinline bool EEINST_ISLIVE64(u32 reg) { return !!(g_pCurInstInfo->regs[reg] & (EEINST_LIVE0|EEINST_LIVE1)); }
static __forceinline bool EEINST_ISLIVEXMM(u32 reg) { return !!(g_pCurInstInfo->regs[reg] & (EEINST_LIVE0|EEINST_LIVE1|EEINST_LIVE2)); }
static __forceinline bool EEINST_ISLIVE1(u32 reg) { return !!(g_pCurInstInfo->regs[reg] & EEINST_LIVE1); }
static __forceinline bool EEINST_ISLIVE2(u32 reg) { return !!(g_pCurInstInfo->regs[reg] & EEINST_LIVE2); }
static __forceinline bool FPUINST_ISLIVE(u32 reg) { return (g_pCurInstInfo->fpuregs[reg] & EEINST_LIVE0); }
static __forceinline bool FPUINST_LASTUSE(u32 reg) { return (g_pCurInstInfo->fpuregs[reg] & EEINST_LASTUSE); }
static __forceinline bool FPUINST_ISLIVE(u32 reg) { return !!(g_pCurInstInfo->fpuregs[reg] & EEINST_LIVE0); }
static __forceinline bool FPUINST_LASTUSE(u32 reg) { return !!(g_pCurInstInfo->fpuregs[reg] & EEINST_LASTUSE); }
// if set, then the variable at this inst really has its upper 32 bits valid
// The difference between EEINST_LIVE1 is that the latter is used in back propagation

2
pcsx2/x86/microVU_Lower.inl
View File

@ -355,6 +355,7 @@ mVUop(mVU_ERSQRT) {
pass2 {
int Fs = mVU->regAlloc->allocReg(_Fs_, 0, (1 << (3 - _Fsf_)));
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, mVUinfo.writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_ANDPS_M128_to_XMM (Fs, (uptr)mVU_absclip);
SSE_SQRTSS_XMM_to_XMM (xmmPQ, Fs);
SSE_MOVSS_M32_to_XMM (Fs, (uptr)mVU_one);
SSE_DIVSS_XMM_to_XMM (Fs, xmmPQ);
@ -417,6 +418,7 @@ mVUop(mVU_ESQRT) {
pass2 {
int Fs = mVU->regAlloc->allocReg(_Fs_, 0, (1 << (3 - _Fsf_)));
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, mVUinfo.writeP ? 0x27 : 0xC6); // Flip xmmPQ to get Valid P instance
SSE_ANDPS_M128_to_XMM (Fs, (uptr)mVU_absclip);
SSE_SQRTSS_XMM_to_XMM (xmmPQ, Fs);
SSE2_PSHUFD_XMM_to_XMM(xmmPQ, xmmPQ, mVUinfo.writeP ? 0x27 : 0xC6); // Flip back
mVU->regAlloc->clearNeeded(Fs);